blob: bb8f58012189af7651c20c2d9b1da1ed390ebcfd [file] [log] [blame]
Eric Anholt673a3942008-07-30 12:06:12 -07001/**************************************************************************
2 *
3 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27/*
28 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
29 */
30
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
Eric Anholt673a3942008-07-30 12:06:12 -070033
34#if defined(CONFIG_X86)
35static void
36drm_clflush_page(struct page *page)
37{
38 uint8_t *page_virtual;
39 unsigned int i;
Dave Airlie87229ad2012-09-19 11:12:41 +100040 const int size = boot_cpu_data.x86_clflush_size;
Eric Anholt673a3942008-07-30 12:06:12 -070041
42 if (unlikely(page == NULL))
43 return;
44
Cong Wang1c9c20f2011-11-25 23:14:20 +080045 page_virtual = kmap_atomic(page);
Dave Airlie87229ad2012-09-19 11:12:41 +100046 for (i = 0; i < PAGE_SIZE; i += size)
Eric Anholt673a3942008-07-30 12:06:12 -070047 clflush(page_virtual + i);
Cong Wang1c9c20f2011-11-25 23:14:20 +080048 kunmap_atomic(page_virtual);
Eric Anholt673a3942008-07-30 12:06:12 -070049}
Eric Anholt673a3942008-07-30 12:06:12 -070050
Dave Airliec9c97b82009-08-27 09:53:47 +100051static void drm_cache_flush_clflush(struct page *pages[],
52 unsigned long num_pages)
53{
54 unsigned long i;
55
56 mb();
57 for (i = 0; i < num_pages; i++)
58 drm_clflush_page(*pages++);
59 mb();
60}
61
62static void
63drm_clflush_ipi_handler(void *null)
64{
65 wbinvd();
66}
Dave Airliec9c97b82009-08-27 09:53:47 +100067#endif
Dave Airlieed017d92009-09-02 09:41:13 +100068
Eric Anholt673a3942008-07-30 12:06:12 -070069void
70drm_clflush_pages(struct page *pages[], unsigned long num_pages)
71{
72
73#if defined(CONFIG_X86)
74 if (cpu_has_clflush) {
Dave Airliec9c97b82009-08-27 09:53:47 +100075 drm_cache_flush_clflush(pages, num_pages);
Eric Anholt673a3942008-07-30 12:06:12 -070076 return;
77 }
Eric Anholt673a3942008-07-30 12:06:12 -070078
Dave Airliec9c97b82009-08-27 09:53:47 +100079 if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
80 printk(KERN_ERR "Timed out waiting for cache flush.\n");
81
82#elif defined(__powerpc__)
83 unsigned long i;
84 for (i = 0; i < num_pages; i++) {
85 struct page *page = pages[i];
86 void *page_virtual;
87
88 if (unlikely(page == NULL))
89 continue;
90
Cong Wang1c9c20f2011-11-25 23:14:20 +080091 page_virtual = kmap_atomic(page);
Dave Airliec9c97b82009-08-27 09:53:47 +100092 flush_dcache_range((unsigned long)page_virtual,
93 (unsigned long)page_virtual + PAGE_SIZE);
Cong Wang1c9c20f2011-11-25 23:14:20 +080094 kunmap_atomic(page_virtual);
Dave Airliec9c97b82009-08-27 09:53:47 +100095 }
96#else
Dave Airlieed017d92009-09-02 09:41:13 +100097 printk(KERN_ERR "Architecture has no drm_cache.c support\n");
98 WARN_ON_ONCE(1);
Dave Airliee0f07542008-10-07 13:41:49 +100099#endif
Eric Anholt673a3942008-07-30 12:06:12 -0700100}
101EXPORT_SYMBOL(drm_clflush_pages);
Daniel Vetter6d5cd9c2012-03-25 19:47:30 +0200102
103void
Chris Wilson9da3da62012-06-01 15:20:22 +0100104drm_clflush_sg(struct sg_table *st)
105{
106#if defined(CONFIG_X86)
107 if (cpu_has_clflush) {
Imre Deakf5ddf692013-02-18 19:28:01 +0200108 struct sg_page_iter sg_iter;
Chris Wilson9da3da62012-06-01 15:20:22 +0100109
110 mb();
Imre Deakf5ddf692013-02-18 19:28:01 +0200111 for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
Imre Deak2db76d72013-03-26 15:14:18 +0200112 drm_clflush_page(sg_page_iter_page(&sg_iter));
Chris Wilson9da3da62012-06-01 15:20:22 +0100113 mb();
114
115 return;
116 }
117
118 if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
119 printk(KERN_ERR "Timed out waiting for cache flush.\n");
120#else
121 printk(KERN_ERR "Architecture has no drm_cache.c support\n");
122 WARN_ON_ONCE(1);
123#endif
124}
125EXPORT_SYMBOL(drm_clflush_sg);
126
127void
Daniel Vetter6d5cd9c2012-03-25 19:47:30 +0200128drm_clflush_virt_range(char *addr, unsigned long length)
129{
130#if defined(CONFIG_X86)
131 if (cpu_has_clflush) {
132 char *end = addr + length;
133 mb();
134 for (; addr < end; addr += boot_cpu_data.x86_clflush_size)
135 clflush(addr);
136 clflush(end - 1);
137 mb();
138 return;
139 }
140
141 if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
142 printk(KERN_ERR "Timed out waiting for cache flush.\n");
143#else
144 printk(KERN_ERR "Architecture has no drm_cache.c support\n");
145 WARN_ON_ONCE(1);
146#endif
147}
148EXPORT_SYMBOL(drm_clflush_virt_range);