Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Intel Running Average Power Limit (RAPL) Driver |
| 3 | * Copyright (c) 2013, Intel Corporation. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms and conditions of the GNU General Public License, |
| 7 | * version 2, as published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc. |
| 16 | * |
| 17 | */ |
| 18 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 19 | |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/list.h> |
| 23 | #include <linux/types.h> |
| 24 | #include <linux/device.h> |
| 25 | #include <linux/slab.h> |
| 26 | #include <linux/log2.h> |
| 27 | #include <linux/bitmap.h> |
| 28 | #include <linux/delay.h> |
| 29 | #include <linux/sysfs.h> |
| 30 | #include <linux/cpu.h> |
| 31 | #include <linux/powercap.h> |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 32 | #include <asm/iosf_mbi.h> |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 33 | |
| 34 | #include <asm/processor.h> |
| 35 | #include <asm/cpu_device_id.h> |
| 36 | |
| 37 | /* bitmasks for RAPL MSRs, used by primitive access functions */ |
| 38 | #define ENERGY_STATUS_MASK 0xffffffff |
| 39 | |
| 40 | #define POWER_LIMIT1_MASK 0x7FFF |
| 41 | #define POWER_LIMIT1_ENABLE BIT(15) |
| 42 | #define POWER_LIMIT1_CLAMP BIT(16) |
| 43 | |
| 44 | #define POWER_LIMIT2_MASK (0x7FFFULL<<32) |
| 45 | #define POWER_LIMIT2_ENABLE BIT_ULL(47) |
| 46 | #define POWER_LIMIT2_CLAMP BIT_ULL(48) |
| 47 | #define POWER_PACKAGE_LOCK BIT_ULL(63) |
| 48 | #define POWER_PP_LOCK BIT(31) |
| 49 | |
| 50 | #define TIME_WINDOW1_MASK (0x7FULL<<17) |
| 51 | #define TIME_WINDOW2_MASK (0x7FULL<<49) |
| 52 | |
| 53 | #define POWER_UNIT_OFFSET 0 |
| 54 | #define POWER_UNIT_MASK 0x0F |
| 55 | |
| 56 | #define ENERGY_UNIT_OFFSET 0x08 |
| 57 | #define ENERGY_UNIT_MASK 0x1F00 |
| 58 | |
| 59 | #define TIME_UNIT_OFFSET 0x10 |
| 60 | #define TIME_UNIT_MASK 0xF0000 |
| 61 | |
| 62 | #define POWER_INFO_MAX_MASK (0x7fffULL<<32) |
| 63 | #define POWER_INFO_MIN_MASK (0x7fffULL<<16) |
| 64 | #define POWER_INFO_MAX_TIME_WIN_MASK (0x3fULL<<48) |
| 65 | #define POWER_INFO_THERMAL_SPEC_MASK 0x7fff |
| 66 | |
| 67 | #define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff |
| 68 | #define PP_POLICY_MASK 0x1F |
| 69 | |
| 70 | /* Non HW constants */ |
| 71 | #define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */ |
| 72 | #define RAPL_PRIMITIVE_DUMMY BIT(2) |
| 73 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 74 | #define TIME_WINDOW_MAX_MSEC 40000 |
| 75 | #define TIME_WINDOW_MIN_MSEC 250 |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 76 | #define ENERGY_UNIT_SCALE 1000 /* scale from driver unit to powercap unit */ |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 77 | enum unit_type { |
| 78 | ARBITRARY_UNIT, /* no translation */ |
| 79 | POWER_UNIT, |
| 80 | ENERGY_UNIT, |
| 81 | TIME_UNIT, |
| 82 | }; |
| 83 | |
| 84 | enum rapl_domain_type { |
| 85 | RAPL_DOMAIN_PACKAGE, /* entire package/socket */ |
| 86 | RAPL_DOMAIN_PP0, /* core power plane */ |
| 87 | RAPL_DOMAIN_PP1, /* graphics uncore */ |
| 88 | RAPL_DOMAIN_DRAM,/* DRAM control_type */ |
| 89 | RAPL_DOMAIN_MAX, |
| 90 | }; |
| 91 | |
| 92 | enum rapl_domain_msr_id { |
| 93 | RAPL_DOMAIN_MSR_LIMIT, |
| 94 | RAPL_DOMAIN_MSR_STATUS, |
| 95 | RAPL_DOMAIN_MSR_PERF, |
| 96 | RAPL_DOMAIN_MSR_POLICY, |
| 97 | RAPL_DOMAIN_MSR_INFO, |
| 98 | RAPL_DOMAIN_MSR_MAX, |
| 99 | }; |
| 100 | |
| 101 | /* per domain data, some are optional */ |
| 102 | enum rapl_primitives { |
| 103 | ENERGY_COUNTER, |
| 104 | POWER_LIMIT1, |
| 105 | POWER_LIMIT2, |
| 106 | FW_LOCK, |
| 107 | |
| 108 | PL1_ENABLE, /* power limit 1, aka long term */ |
| 109 | PL1_CLAMP, /* allow frequency to go below OS request */ |
| 110 | PL2_ENABLE, /* power limit 2, aka short term, instantaneous */ |
| 111 | PL2_CLAMP, |
| 112 | |
| 113 | TIME_WINDOW1, /* long term */ |
| 114 | TIME_WINDOW2, /* short term */ |
| 115 | THERMAL_SPEC_POWER, |
| 116 | MAX_POWER, |
| 117 | |
| 118 | MIN_POWER, |
| 119 | MAX_TIME_WINDOW, |
| 120 | THROTTLED_TIME, |
| 121 | PRIORITY_LEVEL, |
| 122 | |
| 123 | /* below are not raw primitive data */ |
| 124 | AVERAGE_POWER, |
| 125 | NR_RAPL_PRIMITIVES, |
| 126 | }; |
| 127 | |
| 128 | #define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2) |
| 129 | |
| 130 | /* Can be expanded to include events, etc.*/ |
| 131 | struct rapl_domain_data { |
| 132 | u64 primitives[NR_RAPL_PRIMITIVES]; |
| 133 | unsigned long timestamp; |
| 134 | }; |
| 135 | |
Jacob Pan | f14a139 | 2016-02-24 13:31:36 -0800 | [diff] [blame] | 136 | struct msrl_action { |
| 137 | u32 msr_no; |
| 138 | u64 clear_mask; |
| 139 | u64 set_mask; |
| 140 | int err; |
| 141 | }; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 142 | |
| 143 | #define DOMAIN_STATE_INACTIVE BIT(0) |
| 144 | #define DOMAIN_STATE_POWER_LIMIT_SET BIT(1) |
| 145 | #define DOMAIN_STATE_BIOS_LOCKED BIT(2) |
| 146 | |
| 147 | #define NR_POWER_LIMITS (2) |
| 148 | struct rapl_power_limit { |
| 149 | struct powercap_zone_constraint *constraint; |
| 150 | int prim_id; /* primitive ID used to enable */ |
| 151 | struct rapl_domain *domain; |
| 152 | const char *name; |
| 153 | }; |
| 154 | |
| 155 | static const char pl1_name[] = "long_term"; |
| 156 | static const char pl2_name[] = "short_term"; |
| 157 | |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 158 | struct rapl_package; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 159 | struct rapl_domain { |
| 160 | const char *name; |
| 161 | enum rapl_domain_type id; |
| 162 | int msrs[RAPL_DOMAIN_MSR_MAX]; |
| 163 | struct powercap_zone power_zone; |
| 164 | struct rapl_domain_data rdd; |
| 165 | struct rapl_power_limit rpl[NR_POWER_LIMITS]; |
| 166 | u64 attr_map; /* track capabilities */ |
| 167 | unsigned int state; |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 168 | unsigned int domain_energy_unit; |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 169 | struct rapl_package *rp; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 170 | }; |
| 171 | #define power_zone_to_rapl_domain(_zone) \ |
| 172 | container_of(_zone, struct rapl_domain, power_zone) |
| 173 | |
| 174 | |
| 175 | /* Each physical package contains multiple domains, these are the common |
| 176 | * data across RAPL domains within a package. |
| 177 | */ |
| 178 | struct rapl_package { |
| 179 | unsigned int id; /* physical package/socket id */ |
| 180 | unsigned int nr_domains; |
| 181 | unsigned long domain_map; /* bit map of active domains */ |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 182 | unsigned int power_unit; |
| 183 | unsigned int energy_unit; |
| 184 | unsigned int time_unit; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 185 | struct rapl_domain *domains; /* array of domains, sized at runtime */ |
| 186 | struct powercap_zone *power_zone; /* keep track of parent zone */ |
| 187 | int nr_cpus; /* active cpus on the package, topology info is lost during |
| 188 | * cpu hotplug. so we have to track ourselves. |
| 189 | */ |
| 190 | unsigned long power_limit_irq; /* keep track of package power limit |
| 191 | * notify interrupt enable status. |
| 192 | */ |
| 193 | struct list_head plist; |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 194 | int lead_cpu; /* one active cpu per package for access */ |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 195 | }; |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 196 | |
| 197 | struct rapl_defaults { |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 198 | u8 floor_freq_reg_addr; |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 199 | int (*check_unit)(struct rapl_package *rp, int cpu); |
| 200 | void (*set_floor_freq)(struct rapl_domain *rd, bool mode); |
| 201 | u64 (*compute_time_window)(struct rapl_package *rp, u64 val, |
| 202 | bool to_raw); |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 203 | unsigned int dram_domain_energy_unit; |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 204 | }; |
| 205 | static struct rapl_defaults *rapl_defaults; |
| 206 | |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 207 | /* Sideband MBI registers */ |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 208 | #define IOSF_CPU_POWER_BUDGET_CTL_BYT (0x2) |
| 209 | #define IOSF_CPU_POWER_BUDGET_CTL_TNG (0xdf) |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 210 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 211 | #define PACKAGE_PLN_INT_SAVED BIT(0) |
| 212 | #define MAX_PRIM_NAME (32) |
| 213 | |
| 214 | /* per domain data. used to describe individual knobs such that access function |
| 215 | * can be consolidated into one instead of many inline functions. |
| 216 | */ |
| 217 | struct rapl_primitive_info { |
| 218 | const char *name; |
| 219 | u64 mask; |
| 220 | int shift; |
| 221 | enum rapl_domain_msr_id id; |
| 222 | enum unit_type unit; |
| 223 | u32 flag; |
| 224 | }; |
| 225 | |
| 226 | #define PRIMITIVE_INFO_INIT(p, m, s, i, u, f) { \ |
| 227 | .name = #p, \ |
| 228 | .mask = m, \ |
| 229 | .shift = s, \ |
| 230 | .id = i, \ |
| 231 | .unit = u, \ |
| 232 | .flag = f \ |
| 233 | } |
| 234 | |
| 235 | static void rapl_init_domains(struct rapl_package *rp); |
| 236 | static int rapl_read_data_raw(struct rapl_domain *rd, |
| 237 | enum rapl_primitives prim, |
| 238 | bool xlate, u64 *data); |
| 239 | static int rapl_write_data_raw(struct rapl_domain *rd, |
| 240 | enum rapl_primitives prim, |
| 241 | unsigned long long value); |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 242 | static u64 rapl_unit_xlate(struct rapl_domain *rd, |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 243 | enum unit_type type, u64 value, |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 244 | int to_raw); |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 245 | static void package_power_limit_irq_save(struct rapl_package *rp); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 246 | |
| 247 | static LIST_HEAD(rapl_packages); /* guarded by CPU hotplug lock */ |
| 248 | |
| 249 | static const char * const rapl_domain_names[] = { |
| 250 | "package", |
| 251 | "core", |
| 252 | "uncore", |
| 253 | "dram", |
| 254 | }; |
| 255 | |
| 256 | static struct powercap_control_type *control_type; /* PowerCap Controller */ |
| 257 | |
| 258 | /* caller to ensure CPU hotplug lock is held */ |
| 259 | static struct rapl_package *find_package_by_id(int id) |
| 260 | { |
| 261 | struct rapl_package *rp; |
| 262 | |
| 263 | list_for_each_entry(rp, &rapl_packages, plist) { |
| 264 | if (rp->id == id) |
| 265 | return rp; |
| 266 | } |
| 267 | |
| 268 | return NULL; |
| 269 | } |
| 270 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 271 | /* caller must hold cpu hotplug lock */ |
| 272 | static void rapl_cleanup_data(void) |
| 273 | { |
| 274 | struct rapl_package *p, *tmp; |
| 275 | |
| 276 | list_for_each_entry_safe(p, tmp, &rapl_packages, plist) { |
| 277 | kfree(p->domains); |
| 278 | list_del(&p->plist); |
| 279 | kfree(p); |
| 280 | } |
| 281 | } |
| 282 | |
| 283 | static int get_energy_counter(struct powercap_zone *power_zone, u64 *energy_raw) |
| 284 | { |
| 285 | struct rapl_domain *rd; |
| 286 | u64 energy_now; |
| 287 | |
| 288 | /* prevent CPU hotplug, make sure the RAPL domain does not go |
| 289 | * away while reading the counter. |
| 290 | */ |
| 291 | get_online_cpus(); |
| 292 | rd = power_zone_to_rapl_domain(power_zone); |
| 293 | |
| 294 | if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now)) { |
| 295 | *energy_raw = energy_now; |
| 296 | put_online_cpus(); |
| 297 | |
| 298 | return 0; |
| 299 | } |
| 300 | put_online_cpus(); |
| 301 | |
| 302 | return -EIO; |
| 303 | } |
| 304 | |
| 305 | static int get_max_energy_counter(struct powercap_zone *pcd_dev, u64 *energy) |
| 306 | { |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 307 | struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev); |
| 308 | |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 309 | *energy = rapl_unit_xlate(rd, ENERGY_UNIT, ENERGY_STATUS_MASK, 0); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 310 | return 0; |
| 311 | } |
| 312 | |
| 313 | static int release_zone(struct powercap_zone *power_zone) |
| 314 | { |
| 315 | struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 316 | struct rapl_package *rp = rd->rp; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 317 | |
| 318 | /* package zone is the last zone of a package, we can free |
| 319 | * memory here since all children has been unregistered. |
| 320 | */ |
| 321 | if (rd->id == RAPL_DOMAIN_PACKAGE) { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 322 | kfree(rd); |
| 323 | rp->domains = NULL; |
| 324 | } |
| 325 | |
| 326 | return 0; |
| 327 | |
| 328 | } |
| 329 | |
| 330 | static int find_nr_power_limit(struct rapl_domain *rd) |
| 331 | { |
| 332 | int i; |
| 333 | |
| 334 | for (i = 0; i < NR_POWER_LIMITS; i++) { |
| 335 | if (rd->rpl[i].name == NULL) |
| 336 | break; |
| 337 | } |
| 338 | |
| 339 | return i; |
| 340 | } |
| 341 | |
| 342 | static int set_domain_enable(struct powercap_zone *power_zone, bool mode) |
| 343 | { |
| 344 | struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 345 | |
| 346 | if (rd->state & DOMAIN_STATE_BIOS_LOCKED) |
| 347 | return -EACCES; |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 348 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 349 | get_online_cpus(); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 350 | rapl_write_data_raw(rd, PL1_ENABLE, mode); |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 351 | if (rapl_defaults->set_floor_freq) |
| 352 | rapl_defaults->set_floor_freq(rd, mode); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 353 | put_online_cpus(); |
| 354 | |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | static int get_domain_enable(struct powercap_zone *power_zone, bool *mode) |
| 359 | { |
| 360 | struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); |
| 361 | u64 val; |
| 362 | |
| 363 | if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { |
| 364 | *mode = false; |
| 365 | return 0; |
| 366 | } |
| 367 | get_online_cpus(); |
| 368 | if (rapl_read_data_raw(rd, PL1_ENABLE, true, &val)) { |
| 369 | put_online_cpus(); |
| 370 | return -EIO; |
| 371 | } |
| 372 | *mode = val; |
| 373 | put_online_cpus(); |
| 374 | |
| 375 | return 0; |
| 376 | } |
| 377 | |
| 378 | /* per RAPL domain ops, in the order of rapl_domain_type */ |
Julia Lawall | 600c395 | 2015-12-23 22:59:55 +0100 | [diff] [blame] | 379 | static const struct powercap_zone_ops zone_ops[] = { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 380 | /* RAPL_DOMAIN_PACKAGE */ |
| 381 | { |
| 382 | .get_energy_uj = get_energy_counter, |
| 383 | .get_max_energy_range_uj = get_max_energy_counter, |
| 384 | .release = release_zone, |
| 385 | .set_enable = set_domain_enable, |
| 386 | .get_enable = get_domain_enable, |
| 387 | }, |
| 388 | /* RAPL_DOMAIN_PP0 */ |
| 389 | { |
| 390 | .get_energy_uj = get_energy_counter, |
| 391 | .get_max_energy_range_uj = get_max_energy_counter, |
| 392 | .release = release_zone, |
| 393 | .set_enable = set_domain_enable, |
| 394 | .get_enable = get_domain_enable, |
| 395 | }, |
| 396 | /* RAPL_DOMAIN_PP1 */ |
| 397 | { |
| 398 | .get_energy_uj = get_energy_counter, |
| 399 | .get_max_energy_range_uj = get_max_energy_counter, |
| 400 | .release = release_zone, |
| 401 | .set_enable = set_domain_enable, |
| 402 | .get_enable = get_domain_enable, |
| 403 | }, |
| 404 | /* RAPL_DOMAIN_DRAM */ |
| 405 | { |
| 406 | .get_energy_uj = get_energy_counter, |
| 407 | .get_max_energy_range_uj = get_max_energy_counter, |
| 408 | .release = release_zone, |
| 409 | .set_enable = set_domain_enable, |
| 410 | .get_enable = get_domain_enable, |
| 411 | }, |
| 412 | }; |
| 413 | |
| 414 | static int set_power_limit(struct powercap_zone *power_zone, int id, |
| 415 | u64 power_limit) |
| 416 | { |
| 417 | struct rapl_domain *rd; |
| 418 | struct rapl_package *rp; |
| 419 | int ret = 0; |
| 420 | |
| 421 | get_online_cpus(); |
| 422 | rd = power_zone_to_rapl_domain(power_zone); |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 423 | rp = rd->rp; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 424 | |
| 425 | if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { |
| 426 | dev_warn(&power_zone->dev, "%s locked by BIOS, monitoring only\n", |
| 427 | rd->name); |
| 428 | ret = -EACCES; |
| 429 | goto set_exit; |
| 430 | } |
| 431 | |
| 432 | switch (rd->rpl[id].prim_id) { |
| 433 | case PL1_ENABLE: |
| 434 | rapl_write_data_raw(rd, POWER_LIMIT1, power_limit); |
| 435 | break; |
| 436 | case PL2_ENABLE: |
| 437 | rapl_write_data_raw(rd, POWER_LIMIT2, power_limit); |
| 438 | break; |
| 439 | default: |
| 440 | ret = -EINVAL; |
| 441 | } |
| 442 | if (!ret) |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 443 | package_power_limit_irq_save(rp); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 444 | set_exit: |
| 445 | put_online_cpus(); |
| 446 | return ret; |
| 447 | } |
| 448 | |
| 449 | static int get_current_power_limit(struct powercap_zone *power_zone, int id, |
| 450 | u64 *data) |
| 451 | { |
| 452 | struct rapl_domain *rd; |
| 453 | u64 val; |
| 454 | int prim; |
| 455 | int ret = 0; |
| 456 | |
| 457 | get_online_cpus(); |
| 458 | rd = power_zone_to_rapl_domain(power_zone); |
| 459 | switch (rd->rpl[id].prim_id) { |
| 460 | case PL1_ENABLE: |
| 461 | prim = POWER_LIMIT1; |
| 462 | break; |
| 463 | case PL2_ENABLE: |
| 464 | prim = POWER_LIMIT2; |
| 465 | break; |
| 466 | default: |
| 467 | put_online_cpus(); |
| 468 | return -EINVAL; |
| 469 | } |
| 470 | if (rapl_read_data_raw(rd, prim, true, &val)) |
| 471 | ret = -EIO; |
| 472 | else |
| 473 | *data = val; |
| 474 | |
| 475 | put_online_cpus(); |
| 476 | |
| 477 | return ret; |
| 478 | } |
| 479 | |
| 480 | static int set_time_window(struct powercap_zone *power_zone, int id, |
| 481 | u64 window) |
| 482 | { |
| 483 | struct rapl_domain *rd; |
| 484 | int ret = 0; |
| 485 | |
| 486 | get_online_cpus(); |
| 487 | rd = power_zone_to_rapl_domain(power_zone); |
| 488 | switch (rd->rpl[id].prim_id) { |
| 489 | case PL1_ENABLE: |
| 490 | rapl_write_data_raw(rd, TIME_WINDOW1, window); |
| 491 | break; |
| 492 | case PL2_ENABLE: |
| 493 | rapl_write_data_raw(rd, TIME_WINDOW2, window); |
| 494 | break; |
| 495 | default: |
| 496 | ret = -EINVAL; |
| 497 | } |
| 498 | put_online_cpus(); |
| 499 | return ret; |
| 500 | } |
| 501 | |
| 502 | static int get_time_window(struct powercap_zone *power_zone, int id, u64 *data) |
| 503 | { |
| 504 | struct rapl_domain *rd; |
| 505 | u64 val; |
| 506 | int ret = 0; |
| 507 | |
| 508 | get_online_cpus(); |
| 509 | rd = power_zone_to_rapl_domain(power_zone); |
| 510 | switch (rd->rpl[id].prim_id) { |
| 511 | case PL1_ENABLE: |
| 512 | ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val); |
| 513 | break; |
| 514 | case PL2_ENABLE: |
| 515 | ret = rapl_read_data_raw(rd, TIME_WINDOW2, true, &val); |
| 516 | break; |
| 517 | default: |
| 518 | put_online_cpus(); |
| 519 | return -EINVAL; |
| 520 | } |
| 521 | if (!ret) |
| 522 | *data = val; |
| 523 | put_online_cpus(); |
| 524 | |
| 525 | return ret; |
| 526 | } |
| 527 | |
| 528 | static const char *get_constraint_name(struct powercap_zone *power_zone, int id) |
| 529 | { |
| 530 | struct rapl_power_limit *rpl; |
| 531 | struct rapl_domain *rd; |
| 532 | |
| 533 | rd = power_zone_to_rapl_domain(power_zone); |
| 534 | rpl = (struct rapl_power_limit *) &rd->rpl[id]; |
| 535 | |
| 536 | return rpl->name; |
| 537 | } |
| 538 | |
| 539 | |
| 540 | static int get_max_power(struct powercap_zone *power_zone, int id, |
| 541 | u64 *data) |
| 542 | { |
| 543 | struct rapl_domain *rd; |
| 544 | u64 val; |
| 545 | int prim; |
| 546 | int ret = 0; |
| 547 | |
| 548 | get_online_cpus(); |
| 549 | rd = power_zone_to_rapl_domain(power_zone); |
| 550 | switch (rd->rpl[id].prim_id) { |
| 551 | case PL1_ENABLE: |
| 552 | prim = THERMAL_SPEC_POWER; |
| 553 | break; |
| 554 | case PL2_ENABLE: |
| 555 | prim = MAX_POWER; |
| 556 | break; |
| 557 | default: |
| 558 | put_online_cpus(); |
| 559 | return -EINVAL; |
| 560 | } |
| 561 | if (rapl_read_data_raw(rd, prim, true, &val)) |
| 562 | ret = -EIO; |
| 563 | else |
| 564 | *data = val; |
| 565 | |
| 566 | put_online_cpus(); |
| 567 | |
| 568 | return ret; |
| 569 | } |
| 570 | |
Julia Lawall | 600c395 | 2015-12-23 22:59:55 +0100 | [diff] [blame] | 571 | static const struct powercap_zone_constraint_ops constraint_ops = { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 572 | .set_power_limit_uw = set_power_limit, |
| 573 | .get_power_limit_uw = get_current_power_limit, |
| 574 | .set_time_window_us = set_time_window, |
| 575 | .get_time_window_us = get_time_window, |
| 576 | .get_max_power_uw = get_max_power, |
| 577 | .get_name = get_constraint_name, |
| 578 | }; |
| 579 | |
| 580 | /* called after domain detection and package level data are set */ |
| 581 | static void rapl_init_domains(struct rapl_package *rp) |
| 582 | { |
| 583 | int i; |
| 584 | struct rapl_domain *rd = rp->domains; |
| 585 | |
| 586 | for (i = 0; i < RAPL_DOMAIN_MAX; i++) { |
| 587 | unsigned int mask = rp->domain_map & (1 << i); |
| 588 | switch (mask) { |
| 589 | case BIT(RAPL_DOMAIN_PACKAGE): |
| 590 | rd->name = rapl_domain_names[RAPL_DOMAIN_PACKAGE]; |
| 591 | rd->id = RAPL_DOMAIN_PACKAGE; |
| 592 | rd->msrs[0] = MSR_PKG_POWER_LIMIT; |
| 593 | rd->msrs[1] = MSR_PKG_ENERGY_STATUS; |
| 594 | rd->msrs[2] = MSR_PKG_PERF_STATUS; |
| 595 | rd->msrs[3] = 0; |
| 596 | rd->msrs[4] = MSR_PKG_POWER_INFO; |
| 597 | rd->rpl[0].prim_id = PL1_ENABLE; |
| 598 | rd->rpl[0].name = pl1_name; |
| 599 | rd->rpl[1].prim_id = PL2_ENABLE; |
| 600 | rd->rpl[1].name = pl2_name; |
| 601 | break; |
| 602 | case BIT(RAPL_DOMAIN_PP0): |
| 603 | rd->name = rapl_domain_names[RAPL_DOMAIN_PP0]; |
| 604 | rd->id = RAPL_DOMAIN_PP0; |
| 605 | rd->msrs[0] = MSR_PP0_POWER_LIMIT; |
| 606 | rd->msrs[1] = MSR_PP0_ENERGY_STATUS; |
| 607 | rd->msrs[2] = 0; |
| 608 | rd->msrs[3] = MSR_PP0_POLICY; |
| 609 | rd->msrs[4] = 0; |
| 610 | rd->rpl[0].prim_id = PL1_ENABLE; |
| 611 | rd->rpl[0].name = pl1_name; |
| 612 | break; |
| 613 | case BIT(RAPL_DOMAIN_PP1): |
| 614 | rd->name = rapl_domain_names[RAPL_DOMAIN_PP1]; |
| 615 | rd->id = RAPL_DOMAIN_PP1; |
| 616 | rd->msrs[0] = MSR_PP1_POWER_LIMIT; |
| 617 | rd->msrs[1] = MSR_PP1_ENERGY_STATUS; |
| 618 | rd->msrs[2] = 0; |
| 619 | rd->msrs[3] = MSR_PP1_POLICY; |
| 620 | rd->msrs[4] = 0; |
| 621 | rd->rpl[0].prim_id = PL1_ENABLE; |
| 622 | rd->rpl[0].name = pl1_name; |
| 623 | break; |
| 624 | case BIT(RAPL_DOMAIN_DRAM): |
| 625 | rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM]; |
| 626 | rd->id = RAPL_DOMAIN_DRAM; |
| 627 | rd->msrs[0] = MSR_DRAM_POWER_LIMIT; |
| 628 | rd->msrs[1] = MSR_DRAM_ENERGY_STATUS; |
| 629 | rd->msrs[2] = MSR_DRAM_PERF_STATUS; |
| 630 | rd->msrs[3] = 0; |
| 631 | rd->msrs[4] = MSR_DRAM_POWER_INFO; |
| 632 | rd->rpl[0].prim_id = PL1_ENABLE; |
| 633 | rd->rpl[0].name = pl1_name; |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 634 | rd->domain_energy_unit = |
| 635 | rapl_defaults->dram_domain_energy_unit; |
| 636 | if (rd->domain_energy_unit) |
| 637 | pr_info("DRAM domain energy unit %dpj\n", |
| 638 | rd->domain_energy_unit); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 639 | break; |
| 640 | } |
| 641 | if (mask) { |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 642 | rd->rp = rp; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 643 | rd++; |
| 644 | } |
| 645 | } |
| 646 | } |
| 647 | |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 648 | static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type type, |
| 649 | u64 value, int to_raw) |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 650 | { |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 651 | u64 units = 1; |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 652 | struct rapl_package *rp = rd->rp; |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 653 | u64 scale = 1; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 654 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 655 | switch (type) { |
| 656 | case POWER_UNIT: |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 657 | units = rp->power_unit; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 658 | break; |
| 659 | case ENERGY_UNIT: |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 660 | scale = ENERGY_UNIT_SCALE; |
| 661 | /* per domain unit takes precedence */ |
| 662 | if (rd && rd->domain_energy_unit) |
| 663 | units = rd->domain_energy_unit; |
| 664 | else |
| 665 | units = rp->energy_unit; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 666 | break; |
| 667 | case TIME_UNIT: |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 668 | return rapl_defaults->compute_time_window(rp, value, to_raw); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 669 | case ARBITRARY_UNIT: |
| 670 | default: |
| 671 | return value; |
| 672 | }; |
| 673 | |
| 674 | if (to_raw) |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 675 | return div64_u64(value, units) * scale; |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 676 | |
| 677 | value *= units; |
| 678 | |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 679 | return div64_u64(value, scale); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 680 | } |
| 681 | |
| 682 | /* in the order of enum rapl_primitives */ |
| 683 | static struct rapl_primitive_info rpi[] = { |
| 684 | /* name, mask, shift, msr index, unit divisor */ |
| 685 | PRIMITIVE_INFO_INIT(ENERGY_COUNTER, ENERGY_STATUS_MASK, 0, |
| 686 | RAPL_DOMAIN_MSR_STATUS, ENERGY_UNIT, 0), |
| 687 | PRIMITIVE_INFO_INIT(POWER_LIMIT1, POWER_LIMIT1_MASK, 0, |
| 688 | RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0), |
| 689 | PRIMITIVE_INFO_INIT(POWER_LIMIT2, POWER_LIMIT2_MASK, 32, |
| 690 | RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0), |
| 691 | PRIMITIVE_INFO_INIT(FW_LOCK, POWER_PP_LOCK, 31, |
| 692 | RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), |
| 693 | PRIMITIVE_INFO_INIT(PL1_ENABLE, POWER_LIMIT1_ENABLE, 15, |
| 694 | RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), |
| 695 | PRIMITIVE_INFO_INIT(PL1_CLAMP, POWER_LIMIT1_CLAMP, 16, |
| 696 | RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), |
| 697 | PRIMITIVE_INFO_INIT(PL2_ENABLE, POWER_LIMIT2_ENABLE, 47, |
| 698 | RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), |
| 699 | PRIMITIVE_INFO_INIT(PL2_CLAMP, POWER_LIMIT2_CLAMP, 48, |
| 700 | RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0), |
| 701 | PRIMITIVE_INFO_INIT(TIME_WINDOW1, TIME_WINDOW1_MASK, 17, |
| 702 | RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0), |
| 703 | PRIMITIVE_INFO_INIT(TIME_WINDOW2, TIME_WINDOW2_MASK, 49, |
| 704 | RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0), |
| 705 | PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER, POWER_INFO_THERMAL_SPEC_MASK, |
| 706 | 0, RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0), |
| 707 | PRIMITIVE_INFO_INIT(MAX_POWER, POWER_INFO_MAX_MASK, 32, |
| 708 | RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0), |
| 709 | PRIMITIVE_INFO_INIT(MIN_POWER, POWER_INFO_MIN_MASK, 16, |
| 710 | RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0), |
| 711 | PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW, POWER_INFO_MAX_TIME_WIN_MASK, 48, |
| 712 | RAPL_DOMAIN_MSR_INFO, TIME_UNIT, 0), |
| 713 | PRIMITIVE_INFO_INIT(THROTTLED_TIME, PERF_STATUS_THROTTLE_TIME_MASK, 0, |
| 714 | RAPL_DOMAIN_MSR_PERF, TIME_UNIT, 0), |
| 715 | PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0, |
| 716 | RAPL_DOMAIN_MSR_POLICY, ARBITRARY_UNIT, 0), |
| 717 | /* non-hardware */ |
| 718 | PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT, |
| 719 | RAPL_PRIMITIVE_DERIVED), |
| 720 | {NULL, 0, 0, 0}, |
| 721 | }; |
| 722 | |
| 723 | /* Read primitive data based on its related struct rapl_primitive_info. |
| 724 | * if xlate flag is set, return translated data based on data units, i.e. |
| 725 | * time, energy, and power. |
| 726 | * RAPL MSRs are non-architectual and are laid out not consistently across |
| 727 | * domains. Here we use primitive info to allow writing consolidated access |
| 728 | * functions. |
| 729 | * For a given primitive, it is processed by MSR mask and shift. Unit conversion |
| 730 | * is pre-assigned based on RAPL unit MSRs read at init time. |
| 731 | * 63-------------------------- 31--------------------------- 0 |
| 732 | * | xxxxx (mask) | |
| 733 | * | |<- shift ----------------| |
| 734 | * 63-------------------------- 31--------------------------- 0 |
| 735 | */ |
| 736 | static int rapl_read_data_raw(struct rapl_domain *rd, |
| 737 | enum rapl_primitives prim, |
| 738 | bool xlate, u64 *data) |
| 739 | { |
| 740 | u64 value, final; |
| 741 | u32 msr; |
| 742 | struct rapl_primitive_info *rp = &rpi[prim]; |
| 743 | int cpu; |
| 744 | |
| 745 | if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY) |
| 746 | return -EINVAL; |
| 747 | |
| 748 | msr = rd->msrs[rp->id]; |
| 749 | if (!msr) |
| 750 | return -EINVAL; |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 751 | |
| 752 | cpu = rd->rp->lead_cpu; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 753 | |
| 754 | /* special-case package domain, which uses a different bit*/ |
| 755 | if (prim == FW_LOCK && rd->id == RAPL_DOMAIN_PACKAGE) { |
| 756 | rp->mask = POWER_PACKAGE_LOCK; |
| 757 | rp->shift = 63; |
| 758 | } |
| 759 | /* non-hardware data are collected by the polling thread */ |
| 760 | if (rp->flag & RAPL_PRIMITIVE_DERIVED) { |
| 761 | *data = rd->rdd.primitives[prim]; |
| 762 | return 0; |
| 763 | } |
| 764 | |
| 765 | if (rdmsrl_safe_on_cpu(cpu, msr, &value)) { |
| 766 | pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu); |
| 767 | return -EIO; |
| 768 | } |
| 769 | |
| 770 | final = value & rp->mask; |
| 771 | final = final >> rp->shift; |
| 772 | if (xlate) |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 773 | *data = rapl_unit_xlate(rd, rp->unit, final, 0); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 774 | else |
| 775 | *data = final; |
| 776 | |
| 777 | return 0; |
| 778 | } |
| 779 | |
Jacob Pan | f14a139 | 2016-02-24 13:31:36 -0800 | [diff] [blame] | 780 | |
| 781 | static int msrl_update_safe(u32 msr_no, u64 clear_mask, u64 set_mask) |
| 782 | { |
| 783 | int err; |
| 784 | u64 val; |
| 785 | |
| 786 | err = rdmsrl_safe(msr_no, &val); |
| 787 | if (err) |
| 788 | goto out; |
| 789 | |
| 790 | val &= ~clear_mask; |
| 791 | val |= set_mask; |
| 792 | |
| 793 | err = wrmsrl_safe(msr_no, val); |
| 794 | |
| 795 | out: |
| 796 | return err; |
| 797 | } |
| 798 | |
| 799 | static void msrl_update_func(void *info) |
| 800 | { |
| 801 | struct msrl_action *ma = info; |
| 802 | |
| 803 | ma->err = msrl_update_safe(ma->msr_no, ma->clear_mask, ma->set_mask); |
| 804 | } |
| 805 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 806 | /* Similar use of primitive info in the read counterpart */ |
| 807 | static int rapl_write_data_raw(struct rapl_domain *rd, |
| 808 | enum rapl_primitives prim, |
| 809 | unsigned long long value) |
| 810 | { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 811 | struct rapl_primitive_info *rp = &rpi[prim]; |
| 812 | int cpu; |
Jacob Pan | f14a139 | 2016-02-24 13:31:36 -0800 | [diff] [blame] | 813 | u64 bits; |
| 814 | struct msrl_action ma; |
| 815 | int ret; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 816 | |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 817 | cpu = rd->rp->lead_cpu; |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 818 | bits = rapl_unit_xlate(rd, rp->unit, value, 1); |
Jacob Pan | f14a139 | 2016-02-24 13:31:36 -0800 | [diff] [blame] | 819 | bits |= bits << rp->shift; |
| 820 | memset(&ma, 0, sizeof(ma)); |
| 821 | |
| 822 | ma.msr_no = rd->msrs[rp->id]; |
| 823 | ma.clear_mask = rp->mask; |
| 824 | ma.set_mask = bits; |
| 825 | |
| 826 | ret = smp_call_function_single(cpu, msrl_update_func, &ma, 1); |
| 827 | if (ret) |
| 828 | WARN_ON_ONCE(ret); |
| 829 | else |
| 830 | ret = ma.err; |
| 831 | |
| 832 | return ret; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 833 | } |
| 834 | |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 835 | /* |
| 836 | * Raw RAPL data stored in MSRs are in certain scales. We need to |
| 837 | * convert them into standard units based on the units reported in |
| 838 | * the RAPL unit MSRs. This is specific to CPUs as the method to |
| 839 | * calculate units differ on different CPUs. |
| 840 | * We convert the units to below format based on CPUs. |
| 841 | * i.e. |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 842 | * energy unit: picoJoules : Represented in picoJoules by default |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 843 | * power unit : microWatts : Represented in milliWatts by default |
| 844 | * time unit : microseconds: Represented in seconds by default |
| 845 | */ |
| 846 | static int rapl_check_unit_core(struct rapl_package *rp, int cpu) |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 847 | { |
| 848 | u64 msr_val; |
| 849 | u32 value; |
| 850 | |
| 851 | if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) { |
| 852 | pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n", |
| 853 | MSR_RAPL_POWER_UNIT, cpu); |
| 854 | return -ENODEV; |
| 855 | } |
| 856 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 857 | value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 858 | rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 859 | |
| 860 | value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET; |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 861 | rp->power_unit = 1000000 / (1 << value); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 862 | |
| 863 | value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET; |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 864 | rp->time_unit = 1000000 / (1 << value); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 865 | |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 866 | pr_debug("Core CPU package %d energy=%dpJ, time=%dus, power=%duW\n", |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 867 | rp->id, rp->energy_unit, rp->time_unit, rp->power_unit); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 868 | |
| 869 | return 0; |
| 870 | } |
| 871 | |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 872 | static int rapl_check_unit_atom(struct rapl_package *rp, int cpu) |
| 873 | { |
| 874 | u64 msr_val; |
| 875 | u32 value; |
| 876 | |
| 877 | if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) { |
| 878 | pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n", |
| 879 | MSR_RAPL_POWER_UNIT, cpu); |
| 880 | return -ENODEV; |
| 881 | } |
| 882 | value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 883 | rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value; |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 884 | |
| 885 | value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET; |
| 886 | rp->power_unit = (1 << value) * 1000; |
| 887 | |
| 888 | value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET; |
| 889 | rp->time_unit = 1000000 / (1 << value); |
| 890 | |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 891 | pr_debug("Atom package %d energy=%dpJ, time=%dus, power=%duW\n", |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 892 | rp->id, rp->energy_unit, rp->time_unit, rp->power_unit); |
| 893 | |
| 894 | return 0; |
| 895 | } |
| 896 | |
Jacob Pan | f14a139 | 2016-02-24 13:31:36 -0800 | [diff] [blame] | 897 | static void power_limit_irq_save_cpu(void *info) |
| 898 | { |
| 899 | u32 l, h = 0; |
| 900 | struct rapl_package *rp = (struct rapl_package *)info; |
| 901 | |
| 902 | /* save the state of PLN irq mask bit before disabling it */ |
| 903 | rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h); |
| 904 | if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) { |
| 905 | rp->power_limit_irq = l & PACKAGE_THERM_INT_PLN_ENABLE; |
| 906 | rp->power_limit_irq |= PACKAGE_PLN_INT_SAVED; |
| 907 | } |
| 908 | l &= ~PACKAGE_THERM_INT_PLN_ENABLE; |
| 909 | wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); |
| 910 | } |
| 911 | |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 912 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 913 | /* REVISIT: |
| 914 | * When package power limit is set artificially low by RAPL, LVT |
| 915 | * thermal interrupt for package power limit should be ignored |
| 916 | * since we are not really exceeding the real limit. The intention |
| 917 | * is to avoid excessive interrupts while we are trying to save power. |
| 918 | * A useful feature might be routing the package_power_limit interrupt |
| 919 | * to userspace via eventfd. once we have a usecase, this is simple |
| 920 | * to do by adding an atomic notifier. |
| 921 | */ |
| 922 | |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 923 | static void package_power_limit_irq_save(struct rapl_package *rp) |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 924 | { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 925 | if (!boot_cpu_has(X86_FEATURE_PTS) || !boot_cpu_has(X86_FEATURE_PLN)) |
| 926 | return; |
| 927 | |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 928 | smp_call_function_single(rp->lead_cpu, power_limit_irq_save_cpu, rp, 1); |
Jacob Pan | f14a139 | 2016-02-24 13:31:36 -0800 | [diff] [blame] | 929 | } |
| 930 | |
| 931 | static void power_limit_irq_restore_cpu(void *info) |
| 932 | { |
| 933 | u32 l, h = 0; |
| 934 | struct rapl_package *rp = (struct rapl_package *)info; |
| 935 | |
| 936 | rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h); |
| 937 | |
| 938 | if (rp->power_limit_irq & PACKAGE_THERM_INT_PLN_ENABLE) |
| 939 | l |= PACKAGE_THERM_INT_PLN_ENABLE; |
| 940 | else |
| 941 | l &= ~PACKAGE_THERM_INT_PLN_ENABLE; |
| 942 | |
| 943 | wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 944 | } |
| 945 | |
| 946 | /* restore per package power limit interrupt enable state */ |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 947 | static void package_power_limit_irq_restore(struct rapl_package *rp) |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 948 | { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 949 | if (!boot_cpu_has(X86_FEATURE_PTS) || !boot_cpu_has(X86_FEATURE_PLN)) |
| 950 | return; |
| 951 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 952 | /* irq enable state not saved, nothing to restore */ |
| 953 | if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) |
| 954 | return; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 955 | |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 956 | smp_call_function_single(rp->lead_cpu, power_limit_irq_restore_cpu, rp, 1); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 957 | } |
| 958 | |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 959 | static void set_floor_freq_default(struct rapl_domain *rd, bool mode) |
| 960 | { |
| 961 | int nr_powerlimit = find_nr_power_limit(rd); |
| 962 | |
| 963 | /* always enable clamp such that p-state can go below OS requested |
| 964 | * range. power capping priority over guranteed frequency. |
| 965 | */ |
| 966 | rapl_write_data_raw(rd, PL1_CLAMP, mode); |
| 967 | |
| 968 | /* some domains have pl2 */ |
| 969 | if (nr_powerlimit > 1) { |
| 970 | rapl_write_data_raw(rd, PL2_ENABLE, mode); |
| 971 | rapl_write_data_raw(rd, PL2_CLAMP, mode); |
| 972 | } |
| 973 | } |
| 974 | |
| 975 | static void set_floor_freq_atom(struct rapl_domain *rd, bool enable) |
| 976 | { |
| 977 | static u32 power_ctrl_orig_val; |
| 978 | u32 mdata; |
| 979 | |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 980 | if (!rapl_defaults->floor_freq_reg_addr) { |
| 981 | pr_err("Invalid floor frequency config register\n"); |
| 982 | return; |
| 983 | } |
| 984 | |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 985 | if (!power_ctrl_orig_val) |
Andy Shevchenko | 4077a38 | 2015-11-11 19:59:29 +0200 | [diff] [blame] | 986 | iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_CR_READ, |
| 987 | rapl_defaults->floor_freq_reg_addr, |
| 988 | &power_ctrl_orig_val); |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 989 | mdata = power_ctrl_orig_val; |
| 990 | if (enable) { |
| 991 | mdata &= ~(0x7f << 8); |
| 992 | mdata |= 1 << 8; |
| 993 | } |
Andy Shevchenko | 4077a38 | 2015-11-11 19:59:29 +0200 | [diff] [blame] | 994 | iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_CR_WRITE, |
| 995 | rapl_defaults->floor_freq_reg_addr, mdata); |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 996 | } |
| 997 | |
| 998 | static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value, |
| 999 | bool to_raw) |
| 1000 | { |
| 1001 | u64 f, y; /* fraction and exp. used for time unit */ |
| 1002 | |
| 1003 | /* |
| 1004 | * Special processing based on 2^Y*(1+F/4), refer |
| 1005 | * to Intel Software Developer's manual Vol.3B: CH 14.9.3. |
| 1006 | */ |
| 1007 | if (!to_raw) { |
| 1008 | f = (value & 0x60) >> 5; |
| 1009 | y = value & 0x1f; |
| 1010 | value = (1 << y) * (4 + f) * rp->time_unit / 4; |
| 1011 | } else { |
| 1012 | do_div(value, rp->time_unit); |
| 1013 | y = ilog2(value); |
| 1014 | f = div64_u64(4 * (value - (1 << y)), 1 << y); |
| 1015 | value = (y & 0x1f) | ((f & 0x3) << 5); |
| 1016 | } |
| 1017 | return value; |
| 1018 | } |
| 1019 | |
| 1020 | static u64 rapl_compute_time_window_atom(struct rapl_package *rp, u64 value, |
| 1021 | bool to_raw) |
| 1022 | { |
| 1023 | /* |
| 1024 | * Atom time unit encoding is straight forward val * time_unit, |
| 1025 | * where time_unit is default to 1 sec. Never 0. |
| 1026 | */ |
| 1027 | if (!to_raw) |
| 1028 | return (value) ? value *= rp->time_unit : rp->time_unit; |
| 1029 | else |
| 1030 | value = div64_u64(value, rp->time_unit); |
| 1031 | |
| 1032 | return value; |
| 1033 | } |
| 1034 | |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1035 | static const struct rapl_defaults rapl_defaults_core = { |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 1036 | .floor_freq_reg_addr = 0, |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 1037 | .check_unit = rapl_check_unit_core, |
| 1038 | .set_floor_freq = set_floor_freq_default, |
| 1039 | .compute_time_window = rapl_compute_time_window_core, |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1040 | }; |
| 1041 | |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 1042 | static const struct rapl_defaults rapl_defaults_hsw_server = { |
| 1043 | .check_unit = rapl_check_unit_core, |
| 1044 | .set_floor_freq = set_floor_freq_default, |
| 1045 | .compute_time_window = rapl_compute_time_window_core, |
| 1046 | .dram_domain_energy_unit = 15300, |
| 1047 | }; |
| 1048 | |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 1049 | static const struct rapl_defaults rapl_defaults_byt = { |
| 1050 | .floor_freq_reg_addr = IOSF_CPU_POWER_BUDGET_CTL_BYT, |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 1051 | .check_unit = rapl_check_unit_atom, |
| 1052 | .set_floor_freq = set_floor_freq_atom, |
| 1053 | .compute_time_window = rapl_compute_time_window_atom, |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1054 | }; |
| 1055 | |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 1056 | static const struct rapl_defaults rapl_defaults_tng = { |
| 1057 | .floor_freq_reg_addr = IOSF_CPU_POWER_BUDGET_CTL_TNG, |
| 1058 | .check_unit = rapl_check_unit_atom, |
| 1059 | .set_floor_freq = set_floor_freq_atom, |
| 1060 | .compute_time_window = rapl_compute_time_window_atom, |
| 1061 | }; |
| 1062 | |
| 1063 | static const struct rapl_defaults rapl_defaults_ann = { |
| 1064 | .floor_freq_reg_addr = 0, |
| 1065 | .check_unit = rapl_check_unit_atom, |
| 1066 | .set_floor_freq = NULL, |
| 1067 | .compute_time_window = rapl_compute_time_window_atom, |
| 1068 | }; |
| 1069 | |
| 1070 | static const struct rapl_defaults rapl_defaults_cht = { |
| 1071 | .floor_freq_reg_addr = 0, |
| 1072 | .check_unit = rapl_check_unit_atom, |
| 1073 | .set_floor_freq = NULL, |
| 1074 | .compute_time_window = rapl_compute_time_window_atom, |
| 1075 | }; |
| 1076 | |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1077 | #define RAPL_CPU(_model, _ops) { \ |
| 1078 | .vendor = X86_VENDOR_INTEL, \ |
| 1079 | .family = 6, \ |
| 1080 | .model = _model, \ |
| 1081 | .driver_data = (kernel_ulong_t)&_ops, \ |
| 1082 | } |
| 1083 | |
Mathias Krause | ea85dbc | 2015-03-25 22:15:52 +0100 | [diff] [blame] | 1084 | static const struct x86_cpu_id rapl_ids[] __initconst = { |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1085 | RAPL_CPU(0x2a, rapl_defaults_core),/* Sandy Bridge */ |
| 1086 | RAPL_CPU(0x2d, rapl_defaults_core),/* Sandy Bridge EP */ |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 1087 | RAPL_CPU(0x37, rapl_defaults_byt),/* Valleyview */ |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1088 | RAPL_CPU(0x3a, rapl_defaults_core),/* Ivy Bridge */ |
| 1089 | RAPL_CPU(0x3c, rapl_defaults_core),/* Haswell */ |
| 1090 | RAPL_CPU(0x3d, rapl_defaults_core),/* Broadwell */ |
Jacob Pan | d474a4d | 2015-03-13 03:48:56 -0700 | [diff] [blame] | 1091 | RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */ |
Jacob Pan | 34dfa36 | 2015-04-07 05:50:35 -0700 | [diff] [blame] | 1092 | RAPL_CPU(0x4f, rapl_defaults_hsw_server),/* Broadwell servers */ |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1093 | RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */ |
Srinivas Pandruvada | 462d808 | 2016-03-26 05:03:38 -0700 | [diff] [blame] | 1094 | RAPL_CPU(0x46, rapl_defaults_core),/* Haswell */ |
Radivoje Jovanovic | 4e0bec9 | 2015-07-31 08:07:36 -0700 | [diff] [blame] | 1095 | RAPL_CPU(0x47, rapl_defaults_core),/* Broadwell-H */ |
Brian Bian | 5fa0fa4 | 2015-04-14 10:53:35 -0700 | [diff] [blame] | 1096 | RAPL_CPU(0x4E, rapl_defaults_core),/* Skylake */ |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 1097 | RAPL_CPU(0x4C, rapl_defaults_cht),/* Braswell/Cherryview */ |
| 1098 | RAPL_CPU(0x4A, rapl_defaults_tng),/* Tangier */ |
Jacob Pan | d72be77 | 2014-12-16 09:52:47 -0800 | [diff] [blame] | 1099 | RAPL_CPU(0x56, rapl_defaults_core),/* Future Xeon */ |
Ajay Thomas | 51b6340 | 2015-04-30 01:43:23 +0530 | [diff] [blame] | 1100 | RAPL_CPU(0x5A, rapl_defaults_ann),/* Annidale */ |
Amy Wiles | 89e7b25 | 2015-10-14 08:09:15 -0700 | [diff] [blame] | 1101 | RAPL_CPU(0X5C, rapl_defaults_core),/* Broxton */ |
Radivoje Jovanovic | 2cac1f7 | 2015-07-31 08:07:10 -0700 | [diff] [blame] | 1102 | RAPL_CPU(0x5E, rapl_defaults_core),/* Skylake-H/S */ |
Dasaratharaman Chandramouli | 6f066d4 | 2015-05-19 15:37:49 -0700 | [diff] [blame] | 1103 | RAPL_CPU(0x57, rapl_defaults_hsw_server),/* Knights Landing */ |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1104 | {} |
| 1105 | }; |
| 1106 | MODULE_DEVICE_TABLE(x86cpu, rapl_ids); |
| 1107 | |
| 1108 | /* read once for all raw primitive data for all packages, domains */ |
| 1109 | static void rapl_update_domain_data(void) |
| 1110 | { |
| 1111 | int dmn, prim; |
| 1112 | u64 val; |
| 1113 | struct rapl_package *rp; |
| 1114 | |
| 1115 | list_for_each_entry(rp, &rapl_packages, plist) { |
| 1116 | for (dmn = 0; dmn < rp->nr_domains; dmn++) { |
| 1117 | pr_debug("update package %d domain %s data\n", rp->id, |
| 1118 | rp->domains[dmn].name); |
| 1119 | /* exclude non-raw primitives */ |
| 1120 | for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++) |
| 1121 | if (!rapl_read_data_raw(&rp->domains[dmn], prim, |
| 1122 | rpi[prim].unit, |
| 1123 | &val)) |
| 1124 | rp->domains[dmn].rdd.primitives[prim] = |
| 1125 | val; |
| 1126 | } |
| 1127 | } |
| 1128 | |
| 1129 | } |
| 1130 | |
| 1131 | static int rapl_unregister_powercap(void) |
| 1132 | { |
| 1133 | struct rapl_package *rp; |
| 1134 | struct rapl_domain *rd, *rd_package = NULL; |
| 1135 | |
| 1136 | /* unregister all active rapl packages from the powercap layer, |
| 1137 | * hotplug lock held |
| 1138 | */ |
| 1139 | list_for_each_entry(rp, &rapl_packages, plist) { |
Jacob Pan | 309557f | 2016-02-24 13:31:37 -0800 | [diff] [blame] | 1140 | package_power_limit_irq_restore(rp); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1141 | |
| 1142 | for (rd = rp->domains; rd < rp->domains + rp->nr_domains; |
| 1143 | rd++) { |
| 1144 | pr_debug("remove package, undo power limit on %d: %s\n", |
| 1145 | rp->id, rd->name); |
| 1146 | rapl_write_data_raw(rd, PL1_ENABLE, 0); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1147 | rapl_write_data_raw(rd, PL1_CLAMP, 0); |
Seiichi Ikarashi | 5021282 | 2015-08-19 14:26:03 +0900 | [diff] [blame] | 1148 | if (find_nr_power_limit(rd) > 1) { |
| 1149 | rapl_write_data_raw(rd, PL2_ENABLE, 0); |
| 1150 | rapl_write_data_raw(rd, PL2_CLAMP, 0); |
| 1151 | } |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1152 | if (rd->id == RAPL_DOMAIN_PACKAGE) { |
| 1153 | rd_package = rd; |
| 1154 | continue; |
| 1155 | } |
| 1156 | powercap_unregister_zone(control_type, &rd->power_zone); |
| 1157 | } |
| 1158 | /* do the package zone last */ |
| 1159 | if (rd_package) |
| 1160 | powercap_unregister_zone(control_type, |
| 1161 | &rd_package->power_zone); |
| 1162 | } |
| 1163 | powercap_unregister_control_type(control_type); |
| 1164 | |
| 1165 | return 0; |
| 1166 | } |
| 1167 | |
| 1168 | static int rapl_package_register_powercap(struct rapl_package *rp) |
| 1169 | { |
| 1170 | struct rapl_domain *rd; |
| 1171 | int ret = 0; |
| 1172 | char dev_name[17]; /* max domain name = 7 + 1 + 8 for int + 1 for null*/ |
| 1173 | struct powercap_zone *power_zone = NULL; |
| 1174 | int nr_pl; |
| 1175 | |
| 1176 | /* first we register package domain as the parent zone*/ |
| 1177 | for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { |
| 1178 | if (rd->id == RAPL_DOMAIN_PACKAGE) { |
| 1179 | nr_pl = find_nr_power_limit(rd); |
| 1180 | pr_debug("register socket %d package domain %s\n", |
| 1181 | rp->id, rd->name); |
| 1182 | memset(dev_name, 0, sizeof(dev_name)); |
| 1183 | snprintf(dev_name, sizeof(dev_name), "%s-%d", |
| 1184 | rd->name, rp->id); |
| 1185 | power_zone = powercap_register_zone(&rd->power_zone, |
| 1186 | control_type, |
| 1187 | dev_name, NULL, |
| 1188 | &zone_ops[rd->id], |
| 1189 | nr_pl, |
| 1190 | &constraint_ops); |
| 1191 | if (IS_ERR(power_zone)) { |
| 1192 | pr_debug("failed to register package, %d\n", |
| 1193 | rp->id); |
| 1194 | ret = PTR_ERR(power_zone); |
| 1195 | goto exit_package; |
| 1196 | } |
| 1197 | /* track parent zone in per package/socket data */ |
| 1198 | rp->power_zone = power_zone; |
| 1199 | /* done, only one package domain per socket */ |
| 1200 | break; |
| 1201 | } |
| 1202 | } |
| 1203 | if (!power_zone) { |
| 1204 | pr_err("no package domain found, unknown topology!\n"); |
| 1205 | ret = -ENODEV; |
| 1206 | goto exit_package; |
| 1207 | } |
| 1208 | /* now register domains as children of the socket/package*/ |
| 1209 | for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { |
| 1210 | if (rd->id == RAPL_DOMAIN_PACKAGE) |
| 1211 | continue; |
| 1212 | /* number of power limits per domain varies */ |
| 1213 | nr_pl = find_nr_power_limit(rd); |
| 1214 | power_zone = powercap_register_zone(&rd->power_zone, |
| 1215 | control_type, rd->name, |
| 1216 | rp->power_zone, |
| 1217 | &zone_ops[rd->id], nr_pl, |
| 1218 | &constraint_ops); |
| 1219 | |
| 1220 | if (IS_ERR(power_zone)) { |
| 1221 | pr_debug("failed to register power_zone, %d:%s:%s\n", |
| 1222 | rp->id, rd->name, dev_name); |
| 1223 | ret = PTR_ERR(power_zone); |
| 1224 | goto err_cleanup; |
| 1225 | } |
| 1226 | } |
| 1227 | |
| 1228 | exit_package: |
| 1229 | return ret; |
| 1230 | err_cleanup: |
| 1231 | /* clean up previously initialized domains within the package if we |
| 1232 | * failed after the first domain setup. |
| 1233 | */ |
| 1234 | while (--rd >= rp->domains) { |
| 1235 | pr_debug("unregister package %d domain %s\n", rp->id, rd->name); |
| 1236 | powercap_unregister_zone(control_type, &rd->power_zone); |
| 1237 | } |
| 1238 | |
| 1239 | return ret; |
| 1240 | } |
| 1241 | |
| 1242 | static int rapl_register_powercap(void) |
| 1243 | { |
| 1244 | struct rapl_domain *rd; |
| 1245 | struct rapl_package *rp; |
| 1246 | int ret = 0; |
| 1247 | |
| 1248 | control_type = powercap_register_control_type(NULL, "intel-rapl", NULL); |
| 1249 | if (IS_ERR(control_type)) { |
| 1250 | pr_debug("failed to register powercap control_type.\n"); |
| 1251 | return PTR_ERR(control_type); |
| 1252 | } |
| 1253 | /* read the initial data */ |
| 1254 | rapl_update_domain_data(); |
| 1255 | list_for_each_entry(rp, &rapl_packages, plist) |
| 1256 | if (rapl_package_register_powercap(rp)) |
| 1257 | goto err_cleanup_package; |
| 1258 | return ret; |
| 1259 | |
| 1260 | err_cleanup_package: |
| 1261 | /* clean up previously initialized packages */ |
| 1262 | list_for_each_entry_continue_reverse(rp, &rapl_packages, plist) { |
| 1263 | for (rd = rp->domains; rd < rp->domains + rp->nr_domains; |
| 1264 | rd++) { |
| 1265 | pr_debug("unregister zone/package %d, %s domain\n", |
| 1266 | rp->id, rd->name); |
| 1267 | powercap_unregister_zone(control_type, &rd->power_zone); |
| 1268 | } |
| 1269 | } |
| 1270 | |
| 1271 | return ret; |
| 1272 | } |
| 1273 | |
| 1274 | static int rapl_check_domain(int cpu, int domain) |
| 1275 | { |
| 1276 | unsigned msr; |
Jacob Pan | 9d31c67 | 2014-04-29 15:33:06 -0700 | [diff] [blame] | 1277 | u64 val = 0; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1278 | |
| 1279 | switch (domain) { |
| 1280 | case RAPL_DOMAIN_PACKAGE: |
| 1281 | msr = MSR_PKG_ENERGY_STATUS; |
| 1282 | break; |
| 1283 | case RAPL_DOMAIN_PP0: |
| 1284 | msr = MSR_PP0_ENERGY_STATUS; |
| 1285 | break; |
| 1286 | case RAPL_DOMAIN_PP1: |
| 1287 | msr = MSR_PP1_ENERGY_STATUS; |
| 1288 | break; |
| 1289 | case RAPL_DOMAIN_DRAM: |
| 1290 | msr = MSR_DRAM_ENERGY_STATUS; |
| 1291 | break; |
| 1292 | default: |
| 1293 | pr_err("invalid domain id %d\n", domain); |
| 1294 | return -EINVAL; |
| 1295 | } |
Jacob Pan | 9d31c67 | 2014-04-29 15:33:06 -0700 | [diff] [blame] | 1296 | /* make sure domain counters are available and contains non-zero |
| 1297 | * values, otherwise skip it. |
| 1298 | */ |
| 1299 | if (rdmsrl_safe_on_cpu(cpu, msr, &val) || !val) |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1300 | return -ENODEV; |
| 1301 | |
Jacob Pan | 9d31c67 | 2014-04-29 15:33:06 -0700 | [diff] [blame] | 1302 | return 0; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1303 | } |
| 1304 | |
| 1305 | /* Detect active and valid domains for the given CPU, caller must |
| 1306 | * ensure the CPU belongs to the targeted package and CPU hotlug is disabled. |
| 1307 | */ |
| 1308 | static int rapl_detect_domains(struct rapl_package *rp, int cpu) |
| 1309 | { |
| 1310 | int i; |
| 1311 | int ret = 0; |
| 1312 | struct rapl_domain *rd; |
| 1313 | u64 locked; |
| 1314 | |
| 1315 | for (i = 0; i < RAPL_DOMAIN_MAX; i++) { |
| 1316 | /* use physical package id to read counters */ |
Jacob Pan | fcdf179 | 2014-09-02 02:55:21 -0700 | [diff] [blame] | 1317 | if (!rapl_check_domain(cpu, i)) { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1318 | rp->domain_map |= 1 << i; |
Jacob Pan | fcdf179 | 2014-09-02 02:55:21 -0700 | [diff] [blame] | 1319 | pr_info("Found RAPL domain %s\n", rapl_domain_names[i]); |
| 1320 | } |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1321 | } |
| 1322 | rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_MAX); |
| 1323 | if (!rp->nr_domains) { |
| 1324 | pr_err("no valid rapl domains found in package %d\n", rp->id); |
| 1325 | ret = -ENODEV; |
| 1326 | goto done; |
| 1327 | } |
| 1328 | pr_debug("found %d domains on package %d\n", rp->nr_domains, rp->id); |
| 1329 | |
| 1330 | rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct rapl_domain), |
| 1331 | GFP_KERNEL); |
| 1332 | if (!rp->domains) { |
| 1333 | ret = -ENOMEM; |
| 1334 | goto done; |
| 1335 | } |
| 1336 | rapl_init_domains(rp); |
| 1337 | |
| 1338 | for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { |
| 1339 | /* check if the domain is locked by BIOS */ |
Prarit Bhargava | 79a21db | 2015-12-09 08:31:12 -0500 | [diff] [blame] | 1340 | ret = rapl_read_data_raw(rd, FW_LOCK, false, &locked); |
| 1341 | if (ret) |
| 1342 | return ret; |
| 1343 | if (locked) { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1344 | pr_info("RAPL package %d domain %s locked by BIOS\n", |
| 1345 | rp->id, rd->name); |
Prarit Bhargava | 79a21db | 2015-12-09 08:31:12 -0500 | [diff] [blame] | 1346 | rd->state |= DOMAIN_STATE_BIOS_LOCKED; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1347 | } |
| 1348 | } |
| 1349 | |
| 1350 | |
| 1351 | done: |
| 1352 | return ret; |
| 1353 | } |
| 1354 | |
| 1355 | static bool is_package_new(int package) |
| 1356 | { |
| 1357 | struct rapl_package *rp; |
| 1358 | |
| 1359 | /* caller prevents cpu hotplug, there will be no new packages added |
| 1360 | * or deleted while traversing the package list, no need for locking. |
| 1361 | */ |
| 1362 | list_for_each_entry(rp, &rapl_packages, plist) |
| 1363 | if (package == rp->id) |
| 1364 | return false; |
| 1365 | |
| 1366 | return true; |
| 1367 | } |
| 1368 | |
| 1369 | /* RAPL interface can be made of a two-level hierarchy: package level and domain |
| 1370 | * level. We first detect the number of packages then domains of each package. |
| 1371 | * We have to consider the possiblity of CPU online/offline due to hotplug and |
| 1372 | * other scenarios. |
| 1373 | */ |
| 1374 | static int rapl_detect_topology(void) |
| 1375 | { |
| 1376 | int i; |
| 1377 | int phy_package_id; |
| 1378 | struct rapl_package *new_package, *rp; |
| 1379 | |
| 1380 | for_each_online_cpu(i) { |
| 1381 | phy_package_id = topology_physical_package_id(i); |
| 1382 | if (is_package_new(phy_package_id)) { |
| 1383 | new_package = kzalloc(sizeof(*rp), GFP_KERNEL); |
| 1384 | if (!new_package) { |
| 1385 | rapl_cleanup_data(); |
| 1386 | return -ENOMEM; |
| 1387 | } |
| 1388 | /* add the new package to the list */ |
| 1389 | new_package->id = phy_package_id; |
| 1390 | new_package->nr_cpus = 1; |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 1391 | /* use the first active cpu of the package to access */ |
| 1392 | new_package->lead_cpu = i; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1393 | /* check if the package contains valid domains */ |
| 1394 | if (rapl_detect_domains(new_package, i) || |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 1395 | rapl_defaults->check_unit(new_package, i)) { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1396 | kfree(new_package->domains); |
| 1397 | kfree(new_package); |
| 1398 | /* free up the packages already initialized */ |
| 1399 | rapl_cleanup_data(); |
| 1400 | return -ENODEV; |
| 1401 | } |
| 1402 | INIT_LIST_HEAD(&new_package->plist); |
| 1403 | list_add(&new_package->plist, &rapl_packages); |
| 1404 | } else { |
| 1405 | rp = find_package_by_id(phy_package_id); |
| 1406 | if (rp) |
| 1407 | ++rp->nr_cpus; |
| 1408 | } |
| 1409 | } |
| 1410 | |
| 1411 | return 0; |
| 1412 | } |
| 1413 | |
| 1414 | /* called from CPU hotplug notifier, hotplug lock held */ |
| 1415 | static void rapl_remove_package(struct rapl_package *rp) |
| 1416 | { |
| 1417 | struct rapl_domain *rd, *rd_package = NULL; |
| 1418 | |
| 1419 | for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { |
| 1420 | if (rd->id == RAPL_DOMAIN_PACKAGE) { |
| 1421 | rd_package = rd; |
| 1422 | continue; |
| 1423 | } |
| 1424 | pr_debug("remove package %d, %s domain\n", rp->id, rd->name); |
| 1425 | powercap_unregister_zone(control_type, &rd->power_zone); |
| 1426 | } |
| 1427 | /* do parent zone last */ |
| 1428 | powercap_unregister_zone(control_type, &rd_package->power_zone); |
| 1429 | list_del(&rp->plist); |
| 1430 | kfree(rp); |
| 1431 | } |
| 1432 | |
| 1433 | /* called from CPU hotplug notifier, hotplug lock held */ |
| 1434 | static int rapl_add_package(int cpu) |
| 1435 | { |
| 1436 | int ret = 0; |
| 1437 | int phy_package_id; |
| 1438 | struct rapl_package *rp; |
| 1439 | |
| 1440 | phy_package_id = topology_physical_package_id(cpu); |
| 1441 | rp = kzalloc(sizeof(struct rapl_package), GFP_KERNEL); |
| 1442 | if (!rp) |
| 1443 | return -ENOMEM; |
| 1444 | |
| 1445 | /* add the new package to the list */ |
| 1446 | rp->id = phy_package_id; |
| 1447 | rp->nr_cpus = 1; |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 1448 | rp->lead_cpu = cpu; |
| 1449 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1450 | /* check if the package contains valid domains */ |
| 1451 | if (rapl_detect_domains(rp, cpu) || |
Jacob Pan | 3c2c084 | 2014-11-07 09:29:26 -0800 | [diff] [blame] | 1452 | rapl_defaults->check_unit(rp, cpu)) { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1453 | ret = -ENODEV; |
| 1454 | goto err_free_package; |
| 1455 | } |
| 1456 | if (!rapl_package_register_powercap(rp)) { |
| 1457 | INIT_LIST_HEAD(&rp->plist); |
| 1458 | list_add(&rp->plist, &rapl_packages); |
| 1459 | return ret; |
| 1460 | } |
| 1461 | |
| 1462 | err_free_package: |
| 1463 | kfree(rp->domains); |
| 1464 | kfree(rp); |
| 1465 | |
| 1466 | return ret; |
| 1467 | } |
| 1468 | |
| 1469 | /* Handles CPU hotplug on multi-socket systems. |
| 1470 | * If a CPU goes online as the first CPU of the physical package |
| 1471 | * we add the RAPL package to the system. Similarly, when the last |
| 1472 | * CPU of the package is removed, we remove the RAPL package and its |
| 1473 | * associated domains. Cooling devices are handled accordingly at |
| 1474 | * per-domain level. |
| 1475 | */ |
| 1476 | static int rapl_cpu_callback(struct notifier_block *nfb, |
| 1477 | unsigned long action, void *hcpu) |
| 1478 | { |
| 1479 | unsigned long cpu = (unsigned long)hcpu; |
| 1480 | int phy_package_id; |
| 1481 | struct rapl_package *rp; |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 1482 | int lead_cpu; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1483 | |
| 1484 | phy_package_id = topology_physical_package_id(cpu); |
| 1485 | switch (action) { |
| 1486 | case CPU_ONLINE: |
| 1487 | case CPU_ONLINE_FROZEN: |
| 1488 | case CPU_DOWN_FAILED: |
| 1489 | case CPU_DOWN_FAILED_FROZEN: |
| 1490 | rp = find_package_by_id(phy_package_id); |
| 1491 | if (rp) |
| 1492 | ++rp->nr_cpus; |
| 1493 | else |
| 1494 | rapl_add_package(cpu); |
| 1495 | break; |
| 1496 | case CPU_DOWN_PREPARE: |
| 1497 | case CPU_DOWN_PREPARE_FROZEN: |
| 1498 | rp = find_package_by_id(phy_package_id); |
| 1499 | if (!rp) |
| 1500 | break; |
| 1501 | if (--rp->nr_cpus == 0) |
| 1502 | rapl_remove_package(rp); |
Jacob Pan | 323ee64 | 2016-02-24 13:31:38 -0800 | [diff] [blame] | 1503 | else if (cpu == rp->lead_cpu) { |
| 1504 | /* choose another active cpu in the package */ |
| 1505 | lead_cpu = cpumask_any_but(topology_core_cpumask(cpu), cpu); |
| 1506 | if (lead_cpu < nr_cpu_ids) |
| 1507 | rp->lead_cpu = lead_cpu; |
| 1508 | else /* should never go here */ |
| 1509 | pr_err("no active cpu available for package %d\n", |
| 1510 | phy_package_id); |
| 1511 | } |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1512 | } |
| 1513 | |
| 1514 | return NOTIFY_OK; |
| 1515 | } |
| 1516 | |
| 1517 | static struct notifier_block rapl_cpu_notifier = { |
| 1518 | .notifier_call = rapl_cpu_callback, |
| 1519 | }; |
| 1520 | |
| 1521 | static int __init rapl_init(void) |
| 1522 | { |
| 1523 | int ret = 0; |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1524 | const struct x86_cpu_id *id; |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1525 | |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1526 | id = x86_match_cpu(rapl_ids); |
| 1527 | if (!id) { |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1528 | pr_err("driver does not support CPU family %d model %d\n", |
| 1529 | boot_cpu_data.x86, boot_cpu_data.x86_model); |
| 1530 | |
| 1531 | return -ENODEV; |
| 1532 | } |
Srivatsa S. Bhat | 009f225 | 2014-03-11 02:09:26 +0530 | [diff] [blame] | 1533 | |
Jacob Pan | 087e9cb | 2014-11-07 09:29:25 -0800 | [diff] [blame] | 1534 | rapl_defaults = (struct rapl_defaults *)id->driver_data; |
| 1535 | |
Srivatsa S. Bhat | 009f225 | 2014-03-11 02:09:26 +0530 | [diff] [blame] | 1536 | cpu_notifier_register_begin(); |
| 1537 | |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1538 | /* prevent CPU hotplug during detection */ |
| 1539 | get_online_cpus(); |
| 1540 | ret = rapl_detect_topology(); |
| 1541 | if (ret) |
| 1542 | goto done; |
| 1543 | |
| 1544 | if (rapl_register_powercap()) { |
| 1545 | rapl_cleanup_data(); |
| 1546 | ret = -ENODEV; |
| 1547 | goto done; |
| 1548 | } |
Srivatsa S. Bhat | 009f225 | 2014-03-11 02:09:26 +0530 | [diff] [blame] | 1549 | __register_hotcpu_notifier(&rapl_cpu_notifier); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1550 | done: |
| 1551 | put_online_cpus(); |
Srivatsa S. Bhat | 009f225 | 2014-03-11 02:09:26 +0530 | [diff] [blame] | 1552 | cpu_notifier_register_done(); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1553 | |
| 1554 | return ret; |
| 1555 | } |
| 1556 | |
| 1557 | static void __exit rapl_exit(void) |
| 1558 | { |
Srivatsa S. Bhat | 009f225 | 2014-03-11 02:09:26 +0530 | [diff] [blame] | 1559 | cpu_notifier_register_begin(); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1560 | get_online_cpus(); |
Srivatsa S. Bhat | 009f225 | 2014-03-11 02:09:26 +0530 | [diff] [blame] | 1561 | __unregister_hotcpu_notifier(&rapl_cpu_notifier); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1562 | rapl_unregister_powercap(); |
| 1563 | rapl_cleanup_data(); |
| 1564 | put_online_cpus(); |
Srivatsa S. Bhat | 009f225 | 2014-03-11 02:09:26 +0530 | [diff] [blame] | 1565 | cpu_notifier_register_done(); |
Jacob Pan | 2d281d8 | 2013-10-17 10:28:35 -0700 | [diff] [blame] | 1566 | } |
| 1567 | |
| 1568 | module_init(rapl_init); |
| 1569 | module_exit(rapl_exit); |
| 1570 | |
| 1571 | MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit)"); |
| 1572 | MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>"); |
| 1573 | MODULE_LICENSE("GPL v2"); |