Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 2004, 2005 by Ralf Baechle |
| 7 | * Copyright (C) 2005 by MIPS Technologies, Inc. |
| 8 | */ |
| 9 | #include <linux/oprofile.h> |
| 10 | #include <linux/interrupt.h> |
| 11 | #include <linux/smp.h> |
| 12 | |
| 13 | #include "op_impl.h" |
| 14 | |
| 15 | #define M_PERFCTL_EXL (1UL << 0) |
| 16 | #define M_PERFCTL_KERNEL (1UL << 1) |
| 17 | #define M_PERFCTL_SUPERVISOR (1UL << 2) |
| 18 | #define M_PERFCTL_USER (1UL << 3) |
| 19 | #define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) |
| 20 | #define M_PERFCTL_EVENT(event) ((event) << 5) |
| 21 | #define M_PERFCTL_WIDE (1UL << 30) |
| 22 | #define M_PERFCTL_MORE (1UL << 31) |
| 23 | |
| 24 | #define M_COUNTER_OVERFLOW (1UL << 31) |
| 25 | |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 26 | struct op_mips_model op_model_mipsxx_ops; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 27 | |
| 28 | static struct mipsxx_register_config { |
| 29 | unsigned int control[4]; |
| 30 | unsigned int counter[4]; |
| 31 | } reg; |
| 32 | |
| 33 | /* Compute all of the registers in preparation for enabling profiling. */ |
| 34 | |
| 35 | static void mipsxx_reg_setup(struct op_counter_config *ctr) |
| 36 | { |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 37 | unsigned int counters = op_model_mipsxx_ops.num_counters; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 38 | int i; |
| 39 | |
| 40 | /* Compute the performance counter control word. */ |
| 41 | /* For now count kernel and user mode */ |
| 42 | for (i = 0; i < counters; i++) { |
| 43 | reg.control[i] = 0; |
| 44 | reg.counter[i] = 0; |
| 45 | |
| 46 | if (!ctr[i].enabled) |
| 47 | continue; |
| 48 | |
| 49 | reg.control[i] = M_PERFCTL_EVENT(ctr[i].event) | |
| 50 | M_PERFCTL_INTERRUPT_ENABLE; |
| 51 | if (ctr[i].kernel) |
| 52 | reg.control[i] |= M_PERFCTL_KERNEL; |
| 53 | if (ctr[i].user) |
| 54 | reg.control[i] |= M_PERFCTL_USER; |
| 55 | if (ctr[i].exl) |
| 56 | reg.control[i] |= M_PERFCTL_EXL; |
| 57 | reg.counter[i] = 0x80000000 - ctr[i].count; |
| 58 | } |
| 59 | } |
| 60 | |
| 61 | /* Program all of the registers in preparation for enabling profiling. */ |
| 62 | |
| 63 | static void mipsxx_cpu_setup (void *args) |
| 64 | { |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 65 | unsigned int counters = op_model_mipsxx_ops.num_counters; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 66 | |
| 67 | switch (counters) { |
| 68 | case 4: |
| 69 | write_c0_perfctrl3(0); |
| 70 | write_c0_perfcntr3(reg.counter[3]); |
| 71 | case 3: |
| 72 | write_c0_perfctrl2(0); |
| 73 | write_c0_perfcntr2(reg.counter[2]); |
| 74 | case 2: |
| 75 | write_c0_perfctrl1(0); |
| 76 | write_c0_perfcntr1(reg.counter[1]); |
| 77 | case 1: |
| 78 | write_c0_perfctrl0(0); |
| 79 | write_c0_perfcntr0(reg.counter[0]); |
| 80 | } |
| 81 | } |
| 82 | |
| 83 | /* Start all counters on current CPU */ |
| 84 | static void mipsxx_cpu_start(void *args) |
| 85 | { |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 86 | unsigned int counters = op_model_mipsxx_ops.num_counters; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 87 | |
| 88 | switch (counters) { |
| 89 | case 4: |
| 90 | write_c0_perfctrl3(reg.control[3]); |
| 91 | case 3: |
| 92 | write_c0_perfctrl2(reg.control[2]); |
| 93 | case 2: |
| 94 | write_c0_perfctrl1(reg.control[1]); |
| 95 | case 1: |
| 96 | write_c0_perfctrl0(reg.control[0]); |
| 97 | } |
| 98 | } |
| 99 | |
| 100 | /* Stop all counters on current CPU */ |
| 101 | static void mipsxx_cpu_stop(void *args) |
| 102 | { |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 103 | unsigned int counters = op_model_mipsxx_ops.num_counters; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 104 | |
| 105 | switch (counters) { |
| 106 | case 4: |
| 107 | write_c0_perfctrl3(0); |
| 108 | case 3: |
| 109 | write_c0_perfctrl2(0); |
| 110 | case 2: |
| 111 | write_c0_perfctrl1(0); |
| 112 | case 1: |
| 113 | write_c0_perfctrl0(0); |
| 114 | } |
| 115 | } |
| 116 | |
Ralf Baechle | ba339c0 | 2005-12-09 12:29:38 +0000 | [diff] [blame] | 117 | static int mipsxx_perfcount_handler(struct pt_regs *regs) |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 118 | { |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 119 | unsigned int counters = op_model_mipsxx_ops.num_counters; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 120 | unsigned int control; |
| 121 | unsigned int counter; |
Ralf Baechle | ba339c0 | 2005-12-09 12:29:38 +0000 | [diff] [blame] | 122 | int handled = 0; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 123 | |
| 124 | switch (counters) { |
| 125 | #define HANDLE_COUNTER(n) \ |
| 126 | case n + 1: \ |
| 127 | control = read_c0_perfctrl ## n(); \ |
| 128 | counter = read_c0_perfcntr ## n(); \ |
| 129 | if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \ |
| 130 | (counter & M_COUNTER_OVERFLOW)) { \ |
| 131 | oprofile_add_sample(regs, n); \ |
| 132 | write_c0_perfcntr ## n(reg.counter[n]); \ |
Ralf Baechle | ba339c0 | 2005-12-09 12:29:38 +0000 | [diff] [blame] | 133 | handled = 1; \ |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 134 | } |
| 135 | HANDLE_COUNTER(3) |
| 136 | HANDLE_COUNTER(2) |
| 137 | HANDLE_COUNTER(1) |
| 138 | HANDLE_COUNTER(0) |
| 139 | } |
Ralf Baechle | ba339c0 | 2005-12-09 12:29:38 +0000 | [diff] [blame] | 140 | |
| 141 | return handled; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 142 | } |
| 143 | |
| 144 | #define M_CONFIG1_PC (1 << 4) |
| 145 | |
| 146 | static inline int n_counters(void) |
| 147 | { |
| 148 | if (!(read_c0_config1() & M_CONFIG1_PC)) |
| 149 | return 0; |
| 150 | if (!(read_c0_perfctrl0() & M_PERFCTL_MORE)) |
| 151 | return 1; |
| 152 | if (!(read_c0_perfctrl1() & M_PERFCTL_MORE)) |
| 153 | return 2; |
| 154 | if (!(read_c0_perfctrl2() & M_PERFCTL_MORE)) |
| 155 | return 3; |
| 156 | |
| 157 | return 4; |
| 158 | } |
| 159 | |
| 160 | static inline void reset_counters(int counters) |
| 161 | { |
| 162 | switch (counters) { |
| 163 | case 4: |
| 164 | write_c0_perfctrl3(0); |
| 165 | write_c0_perfcntr3(0); |
| 166 | case 3: |
| 167 | write_c0_perfctrl2(0); |
| 168 | write_c0_perfcntr2(0); |
| 169 | case 2: |
| 170 | write_c0_perfctrl1(0); |
| 171 | write_c0_perfcntr1(0); |
| 172 | case 1: |
| 173 | write_c0_perfctrl0(0); |
| 174 | write_c0_perfcntr0(0); |
| 175 | } |
| 176 | } |
| 177 | |
| 178 | static int __init mipsxx_init(void) |
| 179 | { |
| 180 | int counters; |
| 181 | |
| 182 | counters = n_counters(); |
Ralf Baechle | 9efeae9 | 2005-12-09 12:34:45 +0000 | [diff] [blame] | 183 | if (counters == 0) { |
| 184 | printk(KERN_ERR "Oprofile: CPU has no performance counters\n"); |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 185 | return -ENODEV; |
Ralf Baechle | 9efeae9 | 2005-12-09 12:34:45 +0000 | [diff] [blame] | 186 | } |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 187 | |
| 188 | reset_counters(counters); |
| 189 | |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 190 | op_model_mipsxx_ops.num_counters = counters; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 191 | switch (current_cpu_data.cputype) { |
Ralf Baechle | 2065988 | 2005-12-09 12:42:13 +0000 | [diff] [blame] | 192 | case CPU_20KC: |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 193 | op_model_mipsxx_ops.cpu_type = "mips/20K"; |
Ralf Baechle | 2065988 | 2005-12-09 12:42:13 +0000 | [diff] [blame] | 194 | break; |
| 195 | |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 196 | case CPU_24K: |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 197 | op_model_mipsxx_ops.cpu_type = "mips/24K"; |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 198 | break; |
| 199 | |
Ralf Baechle | 2065988 | 2005-12-09 12:42:13 +0000 | [diff] [blame] | 200 | case CPU_25KF: |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 201 | op_model_mipsxx_ops.cpu_type = "mips/25K"; |
Ralf Baechle | 2065988 | 2005-12-09 12:42:13 +0000 | [diff] [blame] | 202 | break; |
| 203 | |
Ralf Baechle | fcfd980 | 2006-02-01 17:54:30 +0000 | [diff] [blame] | 204 | #ifndef CONFIG_SMP |
| 205 | case CPU_34K: |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 206 | op_model_mipsxx_ops.cpu_type = "mips/34K"; |
Ralf Baechle | fcfd980 | 2006-02-01 17:54:30 +0000 | [diff] [blame] | 207 | break; |
Chris Dearman | c620953 | 2006-05-02 14:08:46 +0100 | [diff] [blame] | 208 | |
| 209 | case CPU_74K: |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 210 | op_model_mipsxx_ops.cpu_type = "mips/74K"; |
Chris Dearman | c620953 | 2006-05-02 14:08:46 +0100 | [diff] [blame] | 211 | break; |
Ralf Baechle | fcfd980 | 2006-02-01 17:54:30 +0000 | [diff] [blame] | 212 | #endif |
| 213 | |
Ralf Baechle | 2065988 | 2005-12-09 12:42:13 +0000 | [diff] [blame] | 214 | case CPU_5KC: |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 215 | op_model_mipsxx_ops.cpu_type = "mips/5K"; |
Ralf Baechle | 2065988 | 2005-12-09 12:42:13 +0000 | [diff] [blame] | 216 | break; |
| 217 | |
Mark Mason | c03bc12 | 2006-01-17 12:06:32 -0800 | [diff] [blame] | 218 | case CPU_SB1: |
| 219 | case CPU_SB1A: |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 220 | op_model_mipsxx_ops.cpu_type = "mips/sb1"; |
Mark Mason | c03bc12 | 2006-01-17 12:06:32 -0800 | [diff] [blame] | 221 | break; |
| 222 | |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 223 | default: |
| 224 | printk(KERN_ERR "Profiling unsupported for this CPU\n"); |
| 225 | |
| 226 | return -ENODEV; |
| 227 | } |
| 228 | |
| 229 | perf_irq = mipsxx_perfcount_handler; |
| 230 | |
| 231 | return 0; |
| 232 | } |
| 233 | |
| 234 | static void mipsxx_exit(void) |
| 235 | { |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 236 | reset_counters(op_model_mipsxx_ops.num_counters); |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 237 | |
| 238 | perf_irq = null_perf_irq; |
| 239 | } |
| 240 | |
Atsushi Nemoto | 1acf1ca | 2006-05-23 16:42:38 +0900 | [diff] [blame] | 241 | struct op_mips_model op_model_mipsxx_ops = { |
Ralf Baechle | 5417673 | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 242 | .reg_setup = mipsxx_reg_setup, |
| 243 | .cpu_setup = mipsxx_cpu_setup, |
| 244 | .init = mipsxx_init, |
| 245 | .exit = mipsxx_exit, |
| 246 | .cpu_start = mipsxx_cpu_start, |
| 247 | .cpu_stop = mipsxx_cpu_stop, |
| 248 | }; |