Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
| 3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] |
| 4 | * |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
| 6 | * cards with the tda10046 DVB-T channel decoder |
| 7 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | */ |
| 22 | |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/list.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/kernel.h> |
| 27 | #include <linux/slab.h> |
| 28 | #include <linux/delay.h> |
| 29 | #include <linux/kthread.h> |
| 30 | #include <linux/suspend.h> |
| 31 | |
| 32 | #include "saa7134-reg.h" |
| 33 | #include "saa7134.h" |
Michael Krufky | 5e453dc | 2006-01-09 15:32:31 -0200 | [diff] [blame] | 34 | #include <media/v4l2-common.h> |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 35 | #include "dvb-pll.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Michael Krufky | 29780bb | 2005-07-27 11:45:59 -0700 | [diff] [blame] | 37 | #ifdef HAVE_MT352 |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 38 | # include "mt352.h" |
| 39 | # include "mt352_priv.h" /* FIXME */ |
| 40 | #endif |
Michael Krufky | 29780bb | 2005-07-27 11:45:59 -0700 | [diff] [blame] | 41 | #ifdef HAVE_TDA1004X |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 42 | # include "tda1004x.h" |
| 43 | #endif |
Michael Krufky | 3b64e8e | 2005-11-08 21:38:20 -0800 | [diff] [blame] | 44 | #ifdef HAVE_NXT200X |
| 45 | # include "nxt200x.h" |
Michael Krufky | 3b64e8e | 2005-11-08 21:38:20 -0800 | [diff] [blame] | 46 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
| 48 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
| 49 | MODULE_LICENSE("GPL"); |
| 50 | |
| 51 | static unsigned int antenna_pwr = 0; |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 52 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | module_param(antenna_pwr, int, 0444); |
| 54 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); |
| 55 | |
| 56 | /* ------------------------------------------------------------------ */ |
| 57 | |
Michael Krufky | 29780bb | 2005-07-27 11:45:59 -0700 | [diff] [blame] | 58 | #ifdef HAVE_MT352 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
| 60 | { |
| 61 | u32 ok; |
| 62 | |
| 63 | if (!on) { |
| 64 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); |
| 65 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); |
| 66 | return 0; |
| 67 | } |
| 68 | |
| 69 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); |
| 70 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); |
| 71 | udelay(10); |
| 72 | |
| 73 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); |
| 74 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); |
| 75 | udelay(10); |
| 76 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); |
| 77 | udelay(10); |
| 78 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); |
| 79 | printk("%s: %s %s\n", dev->name, __FUNCTION__, |
| 80 | ok ? "on" : "off"); |
| 81 | |
| 82 | if (!ok) |
| 83 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); |
| 84 | return ok; |
| 85 | } |
| 86 | |
| 87 | static int mt352_pinnacle_init(struct dvb_frontend* fe) |
| 88 | { |
| 89 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; |
| 90 | static u8 reset [] = { RESET, 0x80 }; |
| 91 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; |
| 92 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; |
| 93 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; |
| 94 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; |
| 95 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; |
| 96 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; |
| 97 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; |
| 98 | struct saa7134_dev *dev= fe->dvb->priv; |
| 99 | |
| 100 | printk("%s: %s called\n",dev->name,__FUNCTION__); |
| 101 | |
| 102 | mt352_write(fe, clock_config, sizeof(clock_config)); |
| 103 | udelay(200); |
| 104 | mt352_write(fe, reset, sizeof(reset)); |
| 105 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); |
| 106 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); |
| 107 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); |
| 108 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); |
| 109 | |
| 110 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); |
| 111 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); |
| 112 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); |
Hartmut Hackmann | df8cf70 | 2006-03-03 12:09:26 -0300 | [diff] [blame] | 113 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 114 | return 0; |
| 115 | } |
| 116 | |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 117 | static int mt352_aver777_init(struct dvb_frontend* fe) |
| 118 | { |
| 119 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
| 120 | static u8 reset [] = { RESET, 0x80 }; |
| 121 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; |
| 122 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; |
| 123 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
| 124 | |
| 125 | mt352_write(fe, clock_config, sizeof(clock_config)); |
| 126 | udelay(200); |
| 127 | mt352_write(fe, reset, sizeof(reset)); |
| 128 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); |
| 129 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); |
| 130 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); |
| 131 | |
| 132 | return 0; |
| 133 | } |
| 134 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | static int mt352_pinnacle_pll_set(struct dvb_frontend* fe, |
| 136 | struct dvb_frontend_parameters* params, |
| 137 | u8* pllbuf) |
| 138 | { |
Hartmut Hackmann | df8cf70 | 2006-03-03 12:09:26 -0300 | [diff] [blame] | 139 | u8 off[] = { 0x00, 0xf1}; |
| 140 | u8 on[] = { 0x00, 0x71}; |
| 141 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; |
| 142 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | struct saa7134_dev *dev = fe->dvb->priv; |
| 144 | struct v4l2_frequency f; |
| 145 | |
| 146 | /* set frequency (mt2050) */ |
| 147 | f.tuner = 0; |
| 148 | f.type = V4L2_TUNER_DIGITAL_TV; |
| 149 | f.frequency = params->frequency / 1000 * 16 / 1000; |
Hartmut Hackmann | df8cf70 | 2006-03-03 12:09:26 -0300 | [diff] [blame] | 150 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f); |
Hartmut Hackmann | df8cf70 | 2006-03-03 12:09:26 -0300 | [diff] [blame] | 152 | msg.buf = on; |
| 153 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | |
| 155 | pinnacle_antenna_pwr(dev, antenna_pwr); |
| 156 | |
| 157 | /* mt352 setup */ |
| 158 | mt352_pinnacle_init(fe); |
| 159 | pllbuf[0] = 0xc2; |
| 160 | pllbuf[1] = 0x00; |
| 161 | pllbuf[2] = 0x00; |
| 162 | pllbuf[3] = 0x80; |
| 163 | pllbuf[4] = 0x00; |
| 164 | return 0; |
| 165 | } |
| 166 | |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 167 | static int mt352_aver777_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf) |
| 168 | { |
| 169 | pllbuf[0] = 0xc2; |
| 170 | dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1, |
| 171 | params->frequency, |
| 172 | params->u.ofdm.bandwidth); |
| 173 | return 0; |
| 174 | } |
| 175 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 176 | static struct mt352_config pinnacle_300i = { |
| 177 | .demod_address = 0x3c >> 1, |
| 178 | .adc_clock = 20333, |
| 179 | .if2 = 36150, |
| 180 | .no_tuner = 1, |
| 181 | .demod_init = mt352_pinnacle_init, |
| 182 | .pll_set = mt352_pinnacle_pll_set, |
| 183 | }; |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 184 | |
| 185 | static struct mt352_config avermedia_777 = { |
| 186 | .demod_address = 0xf, |
| 187 | .demod_init = mt352_aver777_init, |
| 188 | .pll_set = mt352_aver777_pll_set, |
| 189 | }; |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 190 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | |
| 192 | /* ------------------------------------------------------------------ */ |
| 193 | |
Michael Krufky | 29780bb | 2005-07-27 11:45:59 -0700 | [diff] [blame] | 194 | #ifdef HAVE_TDA1004X |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 196 | static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 197 | { |
| 198 | struct saa7134_dev *dev = fe->dvb->priv; |
| 199 | u8 tuner_buf[4]; |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 200 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 201 | sizeof(tuner_buf) }; |
| 202 | int tuner_frequency = 0; |
| 203 | u8 band, cp, filter; |
| 204 | |
| 205 | /* determine charge pump */ |
| 206 | tuner_frequency = params->frequency + 36166000; |
| 207 | if (tuner_frequency < 87000000) |
| 208 | return -EINVAL; |
| 209 | else if (tuner_frequency < 130000000) |
| 210 | cp = 3; |
| 211 | else if (tuner_frequency < 160000000) |
| 212 | cp = 5; |
| 213 | else if (tuner_frequency < 200000000) |
| 214 | cp = 6; |
| 215 | else if (tuner_frequency < 290000000) |
| 216 | cp = 3; |
| 217 | else if (tuner_frequency < 420000000) |
| 218 | cp = 5; |
| 219 | else if (tuner_frequency < 480000000) |
| 220 | cp = 6; |
| 221 | else if (tuner_frequency < 620000000) |
| 222 | cp = 3; |
| 223 | else if (tuner_frequency < 830000000) |
| 224 | cp = 5; |
| 225 | else if (tuner_frequency < 895000000) |
| 226 | cp = 7; |
| 227 | else |
| 228 | return -EINVAL; |
| 229 | |
| 230 | /* determine band */ |
| 231 | if (params->frequency < 49000000) |
| 232 | return -EINVAL; |
| 233 | else if (params->frequency < 161000000) |
| 234 | band = 1; |
| 235 | else if (params->frequency < 444000000) |
| 236 | band = 2; |
| 237 | else if (params->frequency < 861000000) |
| 238 | band = 4; |
| 239 | else |
| 240 | return -EINVAL; |
| 241 | |
| 242 | /* setup PLL filter */ |
| 243 | switch (params->u.ofdm.bandwidth) { |
| 244 | case BANDWIDTH_6_MHZ: |
| 245 | filter = 0; |
| 246 | break; |
| 247 | |
| 248 | case BANDWIDTH_7_MHZ: |
| 249 | filter = 0; |
| 250 | break; |
| 251 | |
| 252 | case BANDWIDTH_8_MHZ: |
| 253 | filter = 1; |
| 254 | break; |
| 255 | |
| 256 | default: |
| 257 | return -EINVAL; |
| 258 | } |
| 259 | |
| 260 | /* calculate divisor |
| 261 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) |
| 262 | */ |
| 263 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
| 264 | |
| 265 | /* setup tuner buffer */ |
| 266 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; |
| 267 | tuner_buf[1] = tuner_frequency & 0xff; |
| 268 | tuner_buf[2] = 0xca; |
| 269 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; |
| 270 | |
| 271 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
| 272 | return -EIO; |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 273 | msleep(1); |
| 274 | return 0; |
| 275 | } |
| 276 | |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 277 | static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe) |
| 278 | { |
| 279 | struct saa7134_dev *dev = fe->dvb->priv; |
| 280 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
| 281 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; |
| 282 | |
| 283 | /* setup PLL configuration */ |
| 284 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
| 285 | return -EIO; |
| 286 | msleep(1); |
| 287 | |
| 288 | return 0; |
| 289 | } |
| 290 | |
| 291 | /* ------------------------------------------------------------------ */ |
| 292 | |
| 293 | static int philips_tu1216_pll_60_init(struct dvb_frontend *fe) |
| 294 | { |
| 295 | return philips_tda6651_pll_init(0x60, fe); |
| 296 | } |
| 297 | |
| 298 | static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 299 | { |
| 300 | return philips_tda6651_pll_set(0x60, fe, params); |
| 301 | } |
| 302 | |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 303 | static int philips_tu1216_request_firmware(struct dvb_frontend *fe, |
| 304 | const struct firmware **fw, char *name) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | { |
| 306 | struct saa7134_dev *dev = fe->dvb->priv; |
| 307 | return request_firmware(fw, name, &dev->pci->dev); |
| 308 | } |
| 309 | |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 310 | static struct tda1004x_config philips_tu1216_60_config = { |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 311 | |
| 312 | .demod_address = 0x8, |
| 313 | .invert = 1, |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 314 | .invert_oclk = 0, |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 315 | .xtal_freq = TDA10046_XTAL_4M, |
| 316 | .agc_config = TDA10046_AGC_DEFAULT, |
| 317 | .if_freq = TDA10046_FREQ_3617, |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 318 | .pll_init = philips_tu1216_pll_60_init, |
| 319 | .pll_set = philips_tu1216_pll_60_set, |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 320 | .pll_sleep = NULL, |
| 321 | .request_firmware = philips_tu1216_request_firmware, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 322 | }; |
| 323 | |
| 324 | /* ------------------------------------------------------------------ */ |
| 325 | |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 326 | static int philips_tu1216_pll_61_init(struct dvb_frontend *fe) |
| 327 | { |
| 328 | return philips_tda6651_pll_init(0x61, fe); |
| 329 | } |
| 330 | |
| 331 | static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 332 | { |
| 333 | return philips_tda6651_pll_set(0x61, fe, params); |
| 334 | } |
| 335 | |
| 336 | static struct tda1004x_config philips_tu1216_61_config = { |
| 337 | |
| 338 | .demod_address = 0x8, |
| 339 | .invert = 1, |
| 340 | .invert_oclk = 0, |
| 341 | .xtal_freq = TDA10046_XTAL_4M, |
| 342 | .agc_config = TDA10046_AGC_DEFAULT, |
| 343 | .if_freq = TDA10046_FREQ_3617, |
| 344 | .pll_init = philips_tu1216_pll_61_init, |
| 345 | .pll_set = philips_tu1216_pll_61_set, |
| 346 | .pll_sleep = NULL, |
| 347 | .request_firmware = philips_tu1216_request_firmware, |
| 348 | }; |
| 349 | |
| 350 | /* ------------------------------------------------------------------ */ |
| 351 | |
| 352 | static int philips_europa_pll_init(struct dvb_frontend *fe) |
| 353 | { |
| 354 | struct saa7134_dev *dev = fe->dvb->priv; |
| 355 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
| 356 | struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
| 357 | |
| 358 | /* setup PLL configuration */ |
| 359 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
| 360 | return -EIO; |
| 361 | msleep(1); |
| 362 | |
| 363 | /* switch the board to dvb mode */ |
| 364 | init_msg.addr = 0x43; |
| 365 | init_msg.len = 0x02; |
| 366 | msg[0] = 0x00; |
| 367 | msg[1] = 0x40; |
| 368 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
| 369 | return -EIO; |
| 370 | |
| 371 | return 0; |
| 372 | } |
| 373 | |
| 374 | static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 375 | { |
| 376 | return philips_tda6651_pll_set(0x61, fe, params); |
| 377 | } |
| 378 | |
| 379 | static void philips_europa_analog(struct dvb_frontend *fe) |
| 380 | { |
| 381 | struct saa7134_dev *dev = fe->dvb->priv; |
| 382 | /* this message actually turns the tuner back to analog mode */ |
| 383 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; |
| 384 | struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
| 385 | |
| 386 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
| 387 | msleep(1); |
| 388 | |
| 389 | /* switch the board to analog mode */ |
| 390 | analog_msg.addr = 0x43; |
| 391 | analog_msg.len = 0x02; |
| 392 | msg[0] = 0x00; |
| 393 | msg[1] = 0x14; |
| 394 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
| 395 | } |
| 396 | |
| 397 | static struct tda1004x_config philips_europa_config = { |
| 398 | |
| 399 | .demod_address = 0x8, |
| 400 | .invert = 0, |
| 401 | .invert_oclk = 0, |
| 402 | .xtal_freq = TDA10046_XTAL_4M, |
| 403 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, |
| 404 | .if_freq = TDA10046_FREQ_052, |
| 405 | .pll_init = philips_europa_pll_init, |
| 406 | .pll_set = philips_td1316_pll_set, |
| 407 | .pll_sleep = philips_europa_analog, |
| 408 | .request_firmware = NULL, |
| 409 | }; |
| 410 | |
| 411 | /* ------------------------------------------------------------------ */ |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 412 | |
| 413 | static int philips_fmd1216_pll_init(struct dvb_frontend *fe) |
| 414 | { |
| 415 | struct saa7134_dev *dev = fe->dvb->priv; |
| 416 | /* this message is to set up ATC and ALC */ |
| 417 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 }; |
| 418 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; |
| 419 | |
| 420 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
| 421 | return -EIO; |
| 422 | msleep(1); |
| 423 | |
| 424 | return 0; |
| 425 | } |
| 426 | |
| 427 | static void philips_fmd1216_analog(struct dvb_frontend *fe) |
| 428 | { |
| 429 | struct saa7134_dev *dev = fe->dvb->priv; |
| 430 | /* this message actually turns the tuner back to analog mode */ |
| 431 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 }; |
| 432 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; |
| 433 | |
| 434 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
| 435 | msleep(1); |
| 436 | fmd1216_init[2] = 0x86; |
| 437 | fmd1216_init[3] = 0x54; |
| 438 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
| 439 | msleep(1); |
| 440 | } |
| 441 | |
| 442 | static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 443 | { |
| 444 | struct saa7134_dev *dev = fe->dvb->priv; |
| 445 | u8 tuner_buf[4]; |
| 446 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len = |
| 447 | sizeof(tuner_buf) }; |
| 448 | int tuner_frequency = 0; |
| 449 | int divider = 0; |
| 450 | u8 band, mode, cp; |
| 451 | |
| 452 | /* determine charge pump */ |
| 453 | tuner_frequency = params->frequency + 36130000; |
| 454 | if (tuner_frequency < 87000000) |
| 455 | return -EINVAL; |
| 456 | /* low band */ |
| 457 | else if (tuner_frequency < 180000000) { |
| 458 | band = 1; |
| 459 | mode = 7; |
| 460 | cp = 0; |
| 461 | } else if (tuner_frequency < 195000000) { |
| 462 | band = 1; |
| 463 | mode = 6; |
| 464 | cp = 1; |
| 465 | /* mid band */ |
| 466 | } else if (tuner_frequency < 366000000) { |
| 467 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { |
| 468 | band = 10; |
| 469 | } else { |
| 470 | band = 2; |
| 471 | } |
| 472 | mode = 7; |
| 473 | cp = 0; |
| 474 | } else if (tuner_frequency < 478000000) { |
| 475 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { |
| 476 | band = 10; |
| 477 | } else { |
| 478 | band = 2; |
| 479 | } |
| 480 | mode = 6; |
| 481 | cp = 1; |
| 482 | /* high band */ |
| 483 | } else if (tuner_frequency < 662000000) { |
| 484 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { |
| 485 | band = 12; |
| 486 | } else { |
| 487 | band = 4; |
| 488 | } |
| 489 | mode = 7; |
| 490 | cp = 0; |
| 491 | } else if (tuner_frequency < 840000000) { |
| 492 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { |
| 493 | band = 12; |
| 494 | } else { |
| 495 | band = 4; |
| 496 | } |
| 497 | mode = 6; |
| 498 | cp = 1; |
| 499 | } else { |
| 500 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { |
| 501 | band = 12; |
| 502 | } else { |
| 503 | band = 4; |
| 504 | } |
| 505 | mode = 7; |
| 506 | cp = 1; |
| 507 | |
| 508 | } |
| 509 | /* calculate divisor */ |
| 510 | /* ((36166000 + Finput) / 166666) rounded! */ |
| 511 | divider = (tuner_frequency + 83333) / 166667; |
| 512 | |
| 513 | /* setup tuner buffer */ |
| 514 | tuner_buf[0] = (divider >> 8) & 0x7f; |
| 515 | tuner_buf[1] = divider & 0xff; |
| 516 | tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4; |
| 517 | tuner_buf[3] = 0x40 | band; |
| 518 | |
| 519 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
| 520 | return -EIO; |
| 521 | return 0; |
| 522 | } |
| 523 | |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 524 | static struct tda1004x_config medion_cardbus = { |
| 525 | .demod_address = 0x08, |
| 526 | .invert = 1, |
| 527 | .invert_oclk = 0, |
| 528 | .xtal_freq = TDA10046_XTAL_16M, |
| 529 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, |
| 530 | .if_freq = TDA10046_FREQ_3613, |
| 531 | .pll_init = philips_fmd1216_pll_init, |
| 532 | .pll_set = philips_fmd1216_pll_set, |
| 533 | .pll_sleep = philips_fmd1216_analog, |
| 534 | .request_firmware = NULL, |
| 535 | }; |
| 536 | |
| 537 | /* ------------------------------------------------------------------ */ |
| 538 | |
| 539 | struct tda827x_data { |
| 540 | u32 lomax; |
| 541 | u8 spd; |
| 542 | u8 bs; |
| 543 | u8 bp; |
| 544 | u8 cp; |
| 545 | u8 gc3; |
| 546 | u8 div1p5; |
| 547 | }; |
| 548 | |
| 549 | static struct tda827x_data tda827x_dvbt[] = { |
| 550 | { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1}, |
| 551 | { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1}, |
| 552 | { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0}, |
| 553 | { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0}, |
| 554 | { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 555 | { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 556 | { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 557 | { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1}, |
| 558 | { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1}, |
| 559 | { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 560 | { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 561 | { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0}, |
| 562 | { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 563 | { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 564 | { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1}, |
| 565 | { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1}, |
| 566 | { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 567 | { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 568 | { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 569 | { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 570 | { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1}, |
| 571 | { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1}, |
| 572 | { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, |
| 573 | { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, |
| 574 | { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, |
| 575 | { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0}, |
| 576 | { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, |
| 577 | { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0}, |
| 578 | { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0} |
| 579 | }; |
| 580 | |
| 581 | static int philips_tda827x_pll_init(struct dvb_frontend *fe) |
| 582 | { |
| 583 | return 0; |
| 584 | } |
| 585 | |
| 586 | static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 587 | { |
| 588 | struct saa7134_dev *dev = fe->dvb->priv; |
| 589 | u8 tuner_buf[14]; |
| 590 | |
| 591 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf, |
Mauro Carvalho Chehab | f2421ca | 2005-11-08 21:37:45 -0800 | [diff] [blame] | 592 | .len = sizeof(tuner_buf) }; |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 593 | int i, tuner_freq, if_freq; |
| 594 | u32 N; |
| 595 | switch (params->u.ofdm.bandwidth) { |
| 596 | case BANDWIDTH_6_MHZ: |
| 597 | if_freq = 4000000; |
| 598 | break; |
| 599 | case BANDWIDTH_7_MHZ: |
| 600 | if_freq = 4500000; |
| 601 | break; |
| 602 | default: /* 8 MHz or Auto */ |
| 603 | if_freq = 5000000; |
| 604 | break; |
| 605 | } |
| 606 | tuner_freq = params->frequency + if_freq; |
| 607 | |
| 608 | i = 0; |
| 609 | while (tda827x_dvbt[i].lomax < tuner_freq) { |
| 610 | if(tda827x_dvbt[i + 1].lomax == 0) |
| 611 | break; |
| 612 | i++; |
| 613 | } |
| 614 | |
| 615 | N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2); |
| 616 | tuner_buf[0] = 0; |
| 617 | tuner_buf[1] = (N>>8) | 0x40; |
| 618 | tuner_buf[2] = N & 0xff; |
| 619 | tuner_buf[3] = 0; |
| 620 | tuner_buf[4] = 0x52; |
| 621 | tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) + |
| 622 | (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp; |
| 623 | tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f; |
| 624 | tuner_buf[7] = 0xbf; |
| 625 | tuner_buf[8] = 0x2a; |
| 626 | tuner_buf[9] = 0x05; |
| 627 | tuner_buf[10] = 0xff; |
| 628 | tuner_buf[11] = 0x00; |
| 629 | tuner_buf[12] = 0x00; |
| 630 | tuner_buf[13] = 0x40; |
| 631 | |
| 632 | tuner_msg.len = 14; |
| 633 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
| 634 | return -EIO; |
| 635 | |
| 636 | msleep(500); |
| 637 | /* correct CP value */ |
| 638 | tuner_buf[0] = 0x30; |
| 639 | tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp; |
| 640 | tuner_msg.len = 2; |
| 641 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
| 642 | |
| 643 | return 0; |
| 644 | } |
| 645 | |
| 646 | static void philips_tda827x_pll_sleep(struct dvb_frontend *fe) |
| 647 | { |
| 648 | struct saa7134_dev *dev = fe->dvb->priv; |
| 649 | static u8 tda827x_sleep[] = { 0x30, 0xd0}; |
| 650 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep, |
Mauro Carvalho Chehab | f2421ca | 2005-11-08 21:37:45 -0800 | [diff] [blame] | 651 | .len = sizeof(tda827x_sleep) }; |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 652 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
| 653 | } |
| 654 | |
| 655 | static struct tda1004x_config tda827x_lifeview_config = { |
| 656 | .demod_address = 0x08, |
| 657 | .invert = 1, |
| 658 | .invert_oclk = 0, |
| 659 | .xtal_freq = TDA10046_XTAL_16M, |
| 660 | .agc_config = TDA10046_AGC_TDA827X, |
| 661 | .if_freq = TDA10046_FREQ_045, |
| 662 | .pll_init = philips_tda827x_pll_init, |
| 663 | .pll_set = philips_tda827x_pll_set, |
| 664 | .pll_sleep = philips_tda827x_pll_sleep, |
| 665 | .request_firmware = NULL, |
| 666 | }; |
Hartmut Hackmann | 90e9df7 | 2005-11-08 21:38:42 -0800 | [diff] [blame] | 667 | |
| 668 | /* ------------------------------------------------------------------ */ |
| 669 | |
| 670 | struct tda827xa_data { |
| 671 | u32 lomax; |
| 672 | u8 svco; |
| 673 | u8 spd; |
| 674 | u8 scr; |
| 675 | u8 sbs; |
| 676 | u8 gc3; |
| 677 | }; |
| 678 | |
| 679 | static struct tda827xa_data tda827xa_dvbt[] = { |
| 680 | { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1}, |
| 681 | { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1}, |
| 682 | { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1}, |
| 683 | { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1}, |
| 684 | { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1}, |
| 685 | { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1}, |
| 686 | { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1}, |
| 687 | { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1}, |
| 688 | { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1}, |
| 689 | { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1}, |
| 690 | { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1}, |
| 691 | { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1}, |
| 692 | { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1}, |
| 693 | { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1}, |
| 694 | { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1}, |
| 695 | { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1}, |
| 696 | { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1}, |
| 697 | { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1}, |
| 698 | { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1}, |
| 699 | { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0}, |
| 700 | { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0}, |
| 701 | { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0}, |
| 702 | { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0}, |
| 703 | { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0}, |
| 704 | { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0}, |
| 705 | { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0}, |
| 706 | { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}}; |
| 707 | |
| 708 | |
| 709 | static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 710 | { |
| 711 | struct saa7134_dev *dev = fe->dvb->priv; |
| 712 | u8 tuner_buf[14]; |
| 713 | unsigned char reg2[2]; |
| 714 | |
| 715 | struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf}; |
| 716 | int i, tuner_freq, if_freq; |
| 717 | u32 N; |
| 718 | |
| 719 | switch (params->u.ofdm.bandwidth) { |
| 720 | case BANDWIDTH_6_MHZ: |
| 721 | if_freq = 4000000; |
| 722 | break; |
| 723 | case BANDWIDTH_7_MHZ: |
| 724 | if_freq = 4500000; |
| 725 | break; |
| 726 | default: /* 8 MHz or Auto */ |
| 727 | if_freq = 5000000; |
| 728 | break; |
| 729 | } |
| 730 | tuner_freq = params->frequency + if_freq; |
| 731 | |
| 732 | i = 0; |
| 733 | while (tda827xa_dvbt[i].lomax < tuner_freq) { |
| 734 | if(tda827xa_dvbt[i + 1].lomax == 0) |
| 735 | break; |
| 736 | i++; |
| 737 | } |
| 738 | |
| 739 | N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd; |
| 740 | tuner_buf[0] = 0; // subaddress |
| 741 | tuner_buf[1] = N >> 8; |
| 742 | tuner_buf[2] = N & 0xff; |
| 743 | tuner_buf[3] = 0; |
| 744 | tuner_buf[4] = 0x16; |
| 745 | tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) + |
| 746 | tda827xa_dvbt[i].sbs; |
| 747 | tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4); |
| 748 | tuner_buf[7] = 0x0c; |
| 749 | tuner_buf[8] = 0x06; |
| 750 | tuner_buf[9] = 0x24; |
| 751 | tuner_buf[10] = 0xff; |
| 752 | tuner_buf[11] = 0x60; |
| 753 | tuner_buf[12] = 0x00; |
| 754 | tuner_buf[13] = 0x39; // lpsel |
| 755 | msg.len = 14; |
| 756 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) |
| 757 | return -EIO; |
| 758 | |
| 759 | msg.buf= reg2; |
| 760 | msg.len = 2; |
| 761 | reg2[0] = 0x60; |
| 762 | reg2[1] = 0x3c; |
| 763 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
| 764 | |
| 765 | reg2[0] = 0xa0; |
| 766 | reg2[1] = 0x40; |
| 767 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
| 768 | |
| 769 | msleep(2); |
| 770 | /* correct CP value */ |
| 771 | reg2[0] = 0x30; |
| 772 | reg2[1] = 0x10 + tda827xa_dvbt[i].scr; |
| 773 | msg.len = 2; |
| 774 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
| 775 | |
| 776 | msleep(550); |
| 777 | reg2[0] = 0x50; |
| 778 | reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4); |
| 779 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
| 780 | |
| 781 | return 0; |
| 782 | |
| 783 | } |
| 784 | |
| 785 | static void philips_tda827xa_pll_sleep(u8 addr, struct dvb_frontend *fe) |
| 786 | { |
| 787 | struct saa7134_dev *dev = fe->dvb->priv; |
| 788 | static u8 tda827xa_sleep[] = { 0x30, 0x90}; |
| 789 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep, |
Tyler Trafford | f1bcef8 | 2005-11-08 21:38:46 -0800 | [diff] [blame] | 790 | .len = sizeof(tda827xa_sleep) }; |
Hartmut Hackmann | 90e9df7 | 2005-11-08 21:38:42 -0800 | [diff] [blame] | 791 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
| 792 | |
| 793 | } |
| 794 | |
| 795 | /* ------------------------------------------------------------------ */ |
| 796 | |
| 797 | static int philips_tiger_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 798 | { |
| 799 | int ret; |
| 800 | struct saa7134_dev *dev = fe->dvb->priv; |
| 801 | static u8 tda8290_close[] = { 0x21, 0xc0}; |
| 802 | static u8 tda8290_open[] = { 0x21, 0x80}; |
| 803 | struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2}; |
| 804 | /* close tda8290 i2c bridge */ |
| 805 | tda8290_msg.buf = tda8290_close; |
| 806 | ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1); |
| 807 | if (ret != 1) |
| 808 | return -EIO; |
| 809 | msleep(20); |
| 810 | ret = philips_tda827xa_pll_set(0x61, fe, params); |
| 811 | if (ret != 0) |
| 812 | return ret; |
| 813 | /* open tda8290 i2c bridge */ |
| 814 | tda8290_msg.buf = tda8290_open; |
| 815 | i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1); |
| 816 | return ret; |
Hartmut Hackmann | 2d6b5f6 | 2006-02-27 21:14:36 -0300 | [diff] [blame] | 817 | } |
Hartmut Hackmann | 90e9df7 | 2005-11-08 21:38:42 -0800 | [diff] [blame] | 818 | |
| 819 | static int philips_tiger_dvb_mode(struct dvb_frontend *fe) |
| 820 | { |
| 821 | struct saa7134_dev *dev = fe->dvb->priv; |
| 822 | static u8 data[] = { 0x3c, 0x33, 0x6a}; |
| 823 | struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)}; |
| 824 | |
| 825 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) |
| 826 | return -EIO; |
| 827 | return 0; |
| 828 | } |
| 829 | |
| 830 | static void philips_tiger_analog_mode(struct dvb_frontend *fe) |
| 831 | { |
| 832 | struct saa7134_dev *dev = fe->dvb->priv; |
| 833 | static u8 data[] = { 0x3c, 0x33, 0x68}; |
| 834 | struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)}; |
| 835 | |
| 836 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
| 837 | philips_tda827xa_pll_sleep( 0x61, fe); |
| 838 | } |
| 839 | |
| 840 | static struct tda1004x_config philips_tiger_config = { |
| 841 | .demod_address = 0x08, |
| 842 | .invert = 1, |
| 843 | .invert_oclk = 0, |
| 844 | .xtal_freq = TDA10046_XTAL_16M, |
| 845 | .agc_config = TDA10046_AGC_TDA827X, |
| 846 | .if_freq = TDA10046_FREQ_045, |
| 847 | .pll_init = philips_tiger_dvb_mode, |
| 848 | .pll_set = philips_tiger_pll_set, |
| 849 | .pll_sleep = philips_tiger_analog_mode, |
| 850 | .request_firmware = NULL, |
| 851 | }; |
| 852 | |
Hartmut Hackmann | df42eaf | 2006-02-07 06:49:10 -0200 | [diff] [blame] | 853 | /* ------------------------------------------------------------------ */ |
| 854 | |
Nico Sabbi | 420f32f | 2006-03-03 12:11:28 -0300 | [diff] [blame] | 855 | static int lifeview_trio_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 856 | { |
| 857 | int ret; |
| 858 | |
| 859 | ret = philips_tda827xa_pll_set(0x60, fe, params); |
| 860 | return ret; |
| 861 | } |
| 862 | |
| 863 | static int lifeview_trio_dvb_mode(struct dvb_frontend *fe) |
| 864 | { |
| 865 | return 0; |
| 866 | } |
| 867 | |
| 868 | static void lifeview_trio_analog_mode(struct dvb_frontend *fe) |
| 869 | { |
| 870 | philips_tda827xa_pll_sleep(0x60, fe); |
| 871 | } |
| 872 | |
| 873 | static struct tda1004x_config lifeview_trio_config = { |
| 874 | .demod_address = 0x09, |
| 875 | .invert = 1, |
| 876 | .invert_oclk = 0, |
| 877 | .xtal_freq = TDA10046_XTAL_16M, |
| 878 | .agc_config = TDA10046_AGC_TDA827X_GPL, |
| 879 | .if_freq = TDA10046_FREQ_045, |
| 880 | .pll_init = lifeview_trio_dvb_mode, |
| 881 | .pll_set = lifeview_trio_pll_set, |
| 882 | .pll_sleep = lifeview_trio_analog_mode, |
| 883 | .request_firmware = NULL, |
| 884 | }; |
| 885 | |
| 886 | /* ------------------------------------------------------------------ */ |
| 887 | |
Hartmut Hackmann | df42eaf | 2006-02-07 06:49:10 -0200 | [diff] [blame] | 888 | static int ads_duo_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 889 | { |
| 890 | int ret; |
| 891 | |
| 892 | ret = philips_tda827xa_pll_set(0x61, fe, params); |
| 893 | return ret; |
Hartmut Hackmann | 2d6b5f6 | 2006-02-27 21:14:36 -0300 | [diff] [blame] | 894 | } |
Hartmut Hackmann | df42eaf | 2006-02-07 06:49:10 -0200 | [diff] [blame] | 895 | |
| 896 | static int ads_duo_dvb_mode(struct dvb_frontend *fe) |
| 897 | { |
| 898 | struct saa7134_dev *dev = fe->dvb->priv; |
| 899 | /* route TDA8275a AGC input to the channel decoder */ |
| 900 | saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x60); |
| 901 | return 0; |
| 902 | } |
| 903 | |
| 904 | static void ads_duo_analog_mode(struct dvb_frontend *fe) |
| 905 | { |
| 906 | struct saa7134_dev *dev = fe->dvb->priv; |
| 907 | /* route TDA8275a AGC input to the analog IF chip*/ |
| 908 | saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x20); |
| 909 | philips_tda827xa_pll_sleep( 0x61, fe); |
| 910 | } |
| 911 | |
| 912 | static struct tda1004x_config ads_tech_duo_config = { |
| 913 | .demod_address = 0x08, |
| 914 | .invert = 1, |
| 915 | .invert_oclk = 0, |
| 916 | .xtal_freq = TDA10046_XTAL_16M, |
| 917 | .agc_config = TDA10046_AGC_TDA827X_GPL, |
| 918 | .if_freq = TDA10046_FREQ_045, |
| 919 | .pll_init = ads_duo_dvb_mode, |
| 920 | .pll_set = ads_duo_pll_set, |
| 921 | .pll_sleep = ads_duo_analog_mode, |
| 922 | .request_firmware = NULL, |
| 923 | }; |
| 924 | |
Peter Hartshorn | 3dfb729 | 2006-02-07 06:49:13 -0200 | [diff] [blame] | 925 | /* ------------------------------------------------------------------ */ |
| 926 | |
| 927 | static int tevion_dvb220rf_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
| 928 | { |
| 929 | int ret; |
| 930 | ret = philips_tda827xa_pll_set(0x60, fe, params); |
| 931 | return ret; |
| 932 | } |
| 933 | |
| 934 | static int tevion_dvb220rf_pll_init(struct dvb_frontend *fe) |
| 935 | { |
| 936 | return 0; |
| 937 | } |
| 938 | |
| 939 | static void tevion_dvb220rf_pll_sleep(struct dvb_frontend *fe) |
| 940 | { |
| 941 | philips_tda827xa_pll_sleep( 0x61, fe); |
| 942 | } |
| 943 | |
| 944 | static struct tda1004x_config tevion_dvbt220rf_config = { |
| 945 | .demod_address = 0x08, |
| 946 | .invert = 1, |
| 947 | .invert_oclk = 0, |
| 948 | .xtal_freq = TDA10046_XTAL_16M, |
| 949 | .agc_config = TDA10046_AGC_TDA827X, |
| 950 | .if_freq = TDA10046_FREQ_045, |
| 951 | .pll_init = tevion_dvb220rf_pll_init, |
| 952 | .pll_set = tevion_dvb220rf_pll_set, |
| 953 | .pll_sleep = tevion_dvb220rf_pll_sleep, |
| 954 | .request_firmware = NULL, |
| 955 | }; |
| 956 | |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 957 | #endif |
| 958 | |
Hartmut Hackmann | 90e9df7 | 2005-11-08 21:38:42 -0800 | [diff] [blame] | 959 | /* ------------------------------------------------------------------ */ |
| 960 | |
Michael Krufky | 3b64e8e | 2005-11-08 21:38:20 -0800 | [diff] [blame] | 961 | #ifdef HAVE_NXT200X |
| 962 | static struct nxt200x_config avertvhda180 = { |
| 963 | .demod_address = 0x0a, |
| 964 | .pll_address = 0x61, |
| 965 | .pll_desc = &dvb_pll_tdhu2, |
| 966 | }; |
Andrew Burri | 3e1410a | 2006-02-27 00:08:23 -0300 | [diff] [blame] | 967 | |
Curt Meyers | fbc81c0 | 2006-02-27 00:08:27 -0300 | [diff] [blame] | 968 | static int nxt200x_set_pll_input(u8 *buf, int input) |
| 969 | { |
| 970 | if (input) |
| 971 | buf[3] |= 0x08; |
| 972 | else |
| 973 | buf[3] &= ~0x08; |
| 974 | return 0; |
| 975 | } |
| 976 | |
Andrew Burri | 3e1410a | 2006-02-27 00:08:23 -0300 | [diff] [blame] | 977 | static struct nxt200x_config kworldatsc110 = { |
| 978 | .demod_address = 0x0a, |
| 979 | .pll_address = 0x61, |
| 980 | .pll_desc = &dvb_pll_tuv1236d, |
Curt Meyers | fbc81c0 | 2006-02-27 00:08:27 -0300 | [diff] [blame] | 981 | .set_pll_input = nxt200x_set_pll_input, |
Andrew Burri | 3e1410a | 2006-02-27 00:08:23 -0300 | [diff] [blame] | 982 | }; |
Michael Krufky | 3b64e8e | 2005-11-08 21:38:20 -0800 | [diff] [blame] | 983 | #endif |
| 984 | |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 985 | /* ------------------------------------------------------------------ */ |
| 986 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 987 | static int dvb_init(struct saa7134_dev *dev) |
| 988 | { |
| 989 | /* init struct videobuf_dvb */ |
| 990 | dev->ts.nr_bufs = 32; |
| 991 | dev->ts.nr_packets = 32*4; |
| 992 | dev->dvb.name = dev->name; |
| 993 | videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops, |
| 994 | dev->pci, &dev->slock, |
| 995 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
| 996 | V4L2_FIELD_ALTERNATE, |
| 997 | sizeof(struct saa7134_buf), |
| 998 | dev); |
| 999 | |
| 1000 | switch (dev->board) { |
Michael Krufky | 29780bb | 2005-07-27 11:45:59 -0700 | [diff] [blame] | 1001 | #ifdef HAVE_MT352 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1002 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: |
| 1003 | printk("%s: pinnacle 300i dvb setup\n",dev->name); |
| 1004 | dev->dvb.frontend = mt352_attach(&pinnacle_300i, |
| 1005 | &dev->i2c_adap); |
| 1006 | break; |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 1007 | |
| 1008 | case SAA7134_BOARD_AVERMEDIA_777: |
| 1009 | printk("%s: avertv 777 dvb setup\n",dev->name); |
| 1010 | dev->dvb.frontend = mt352_attach(&avermedia_777, |
| 1011 | &dev->i2c_adap); |
| 1012 | break; |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 1013 | #endif |
Michael Krufky | 29780bb | 2005-07-27 11:45:59 -0700 | [diff] [blame] | 1014 | #ifdef HAVE_TDA1004X |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1015 | case SAA7134_BOARD_MD7134: |
| 1016 | dev->dvb.frontend = tda10046_attach(&medion_cardbus, |
| 1017 | &dev->i2c_adap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1018 | break; |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 1019 | case SAA7134_BOARD_PHILIPS_TOUGH: |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 1020 | dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config, |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 1021 | &dev->i2c_adap); |
| 1022 | break; |
| 1023 | case SAA7134_BOARD_FLYDVBTDUO: |
| 1024 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, |
| 1025 | &dev->i2c_adap); |
| 1026 | break; |
Peter Missel | 10b7a90 | 2006-01-23 17:11:06 -0200 | [diff] [blame] | 1027 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 1028 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, |
| 1029 | &dev->i2c_adap); |
| 1030 | break; |
Hartmut Hackmann | 2cf36ac | 2005-11-08 21:36:32 -0800 | [diff] [blame] | 1031 | case SAA7134_BOARD_PHILIPS_EUROPA: |
| 1032 | dev->dvb.frontend = tda10046_attach(&philips_europa_config, |
| 1033 | &dev->i2c_adap); |
| 1034 | break; |
| 1035 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
| 1036 | dev->dvb.frontend = tda10046_attach(&philips_europa_config, |
| 1037 | &dev->i2c_adap); |
| 1038 | break; |
| 1039 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: |
| 1040 | dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config, |
| 1041 | &dev->i2c_adap); |
| 1042 | break; |
Hartmut Hackmann | 90e9df7 | 2005-11-08 21:38:42 -0800 | [diff] [blame] | 1043 | case SAA7134_BOARD_PHILIPS_TIGER: |
| 1044 | dev->dvb.frontend = tda10046_attach(&philips_tiger_config, |
| 1045 | &dev->i2c_adap); |
| 1046 | break; |
Hartmut Hackmann | d4b0aba | 2005-11-08 21:38:44 -0800 | [diff] [blame] | 1047 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
| 1048 | dev->dvb.frontend = tda10046_attach(&philips_tiger_config, |
| 1049 | &dev->i2c_adap); |
| 1050 | break; |
Giampiero Giancipoli | 3d8466e | 2006-02-07 06:49:09 -0200 | [diff] [blame] | 1051 | case SAA7134_BOARD_FLYDVBT_LR301: |
| 1052 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, |
| 1053 | &dev->i2c_adap); |
| 1054 | break; |
Nico Sabbi | 420f32f | 2006-03-03 12:11:28 -0300 | [diff] [blame] | 1055 | case SAA7134_BOARD_FLYDVB_TRIO: |
| 1056 | dev->dvb.frontend = tda10046_attach(&lifeview_trio_config, |
| 1057 | &dev->i2c_adap); |
| 1058 | break; |
Hartmut Hackmann | df42eaf | 2006-02-07 06:49:10 -0200 | [diff] [blame] | 1059 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
| 1060 | dev->dvb.frontend = tda10046_attach(&ads_tech_duo_config, |
| 1061 | &dev->i2c_adap); |
| 1062 | break; |
Peter Hartshorn | 3dfb729 | 2006-02-07 06:49:13 -0200 | [diff] [blame] | 1063 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
| 1064 | dev->dvb.frontend = tda10046_attach(&tevion_dvbt220rf_config, |
| 1065 | &dev->i2c_adap); |
| 1066 | break; |
Hartmut Hackmann | d95b894 | 2006-03-27 19:39:30 -0300 | [diff] [blame] | 1067 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
| 1068 | dev->dvb.frontend = tda10046_attach(&ads_tech_duo_config, |
| 1069 | &dev->i2c_adap); |
| 1070 | break; |
Mauro Carvalho Chehab | 86ddd96 | 2005-07-12 13:58:47 -0700 | [diff] [blame] | 1071 | #endif |
Michael Krufky | 3b64e8e | 2005-11-08 21:38:20 -0800 | [diff] [blame] | 1072 | #ifdef HAVE_NXT200X |
| 1073 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
| 1074 | dev->dvb.frontend = nxt200x_attach(&avertvhda180, &dev->i2c_adap); |
| 1075 | break; |
Andrew Burri | 3e1410a | 2006-02-27 00:08:23 -0300 | [diff] [blame] | 1076 | case SAA7134_BOARD_KWORLD_ATSC110: |
| 1077 | dev->dvb.frontend = nxt200x_attach(&kworldatsc110, &dev->i2c_adap); |
| 1078 | break; |
Michael Krufky | 3b64e8e | 2005-11-08 21:38:20 -0800 | [diff] [blame] | 1079 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1080 | default: |
| 1081 | printk("%s: Huh? unknown DVB card?\n",dev->name); |
| 1082 | break; |
| 1083 | } |
| 1084 | |
| 1085 | if (NULL == dev->dvb.frontend) { |
| 1086 | printk("%s: frontend initialization failed\n",dev->name); |
| 1087 | return -1; |
| 1088 | } |
| 1089 | |
| 1090 | /* register everything else */ |
| 1091 | return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev); |
| 1092 | } |
| 1093 | |
| 1094 | static int dvb_fini(struct saa7134_dev *dev) |
| 1095 | { |
| 1096 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; |
| 1097 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1098 | switch (dev->board) { |
| 1099 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: |
| 1100 | /* otherwise we don't detect the tuner on next insmod */ |
| 1101 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); |
| 1102 | break; |
| 1103 | }; |
| 1104 | videobuf_dvb_unregister(&dev->dvb); |
| 1105 | return 0; |
| 1106 | } |
| 1107 | |
| 1108 | static struct saa7134_mpeg_ops dvb_ops = { |
| 1109 | .type = SAA7134_MPEG_DVB, |
| 1110 | .init = dvb_init, |
| 1111 | .fini = dvb_fini, |
| 1112 | }; |
| 1113 | |
| 1114 | static int __init dvb_register(void) |
| 1115 | { |
| 1116 | return saa7134_ts_register(&dvb_ops); |
| 1117 | } |
| 1118 | |
| 1119 | static void __exit dvb_unregister(void) |
| 1120 | { |
| 1121 | saa7134_ts_unregister(&dvb_ops); |
| 1122 | } |
| 1123 | |
| 1124 | module_init(dvb_register); |
| 1125 | module_exit(dvb_unregister); |
| 1126 | |
| 1127 | /* ------------------------------------------------------------------ */ |
| 1128 | /* |
| 1129 | * Local variables: |
| 1130 | * c-basic-offset: 8 |
| 1131 | * End: |
| 1132 | */ |