Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 1 | /* |
Hiroshi DOYU | 733ecc5 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 2 | * Mailbox reservation modules for OMAP2/3 |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 3 | * |
Hiroshi DOYU | 733ecc5 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 4 | * Copyright (C) 2006-2009 Nokia Corporation |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 5 | * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> |
Hiroshi DOYU | 733ecc5 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 6 | * and Paul Mundt |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file "COPYING" in the main directory of this archive |
| 10 | * for more details. |
| 11 | */ |
| 12 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 13 | #include <linux/clk.h> |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/platform_device.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 16 | #include <linux/io.h> |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 17 | #include <plat/mailbox.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 18 | #include <mach/irqs.h> |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 19 | |
Hiroshi DOYU | 733ecc5 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 20 | #define MAILBOX_REVISION 0x000 |
| 21 | #define MAILBOX_SYSCONFIG 0x010 |
| 22 | #define MAILBOX_SYSSTATUS 0x014 |
| 23 | #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) |
| 24 | #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m)) |
| 25 | #define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m)) |
| 26 | #define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) |
| 27 | #define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) |
| 28 | |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 29 | #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 10 * (u)) |
| 30 | #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 10 * (u)) |
| 31 | #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 10 * (u)) |
| 32 | |
| 33 | #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m))) |
| 34 | #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1)) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 35 | |
Hiroshi DOYU | 1ffe627 | 2009-09-24 16:23:09 -0700 | [diff] [blame] | 36 | /* SYSCONFIG: register bit definition */ |
| 37 | #define AUTOIDLE (1 << 0) |
| 38 | #define SOFTRESET (1 << 1) |
| 39 | #define SMARTIDLE (2 << 3) |
Suman Anna | a6a6022 | 2010-01-26 16:55:29 -0600 | [diff] [blame] | 40 | #define OMAP4_SOFTRESET (1 << 0) |
Suman Anna | 4499ce4 | 2010-02-05 17:20:26 -0600 | [diff] [blame] | 41 | #define OMAP4_NOIDLE (1 << 2) |
| 42 | #define OMAP4_SMARTIDLE (2 << 2) |
Hiroshi DOYU | 1ffe627 | 2009-09-24 16:23:09 -0700 | [diff] [blame] | 43 | |
| 44 | /* SYSSTATUS: register bit definition */ |
| 45 | #define RESETDONE (1 << 0) |
| 46 | |
Hiroshi DOYU | c75ee75 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 47 | #define MBOX_REG_SIZE 0x120 |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 48 | |
| 49 | #define OMAP4_MBOX_REG_SIZE 0x130 |
| 50 | |
Hiroshi DOYU | c75ee75 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 51 | #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32)) |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 52 | #define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32)) |
Hiroshi DOYU | c75ee75 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 53 | |
Hiroshi DOYU | 6c20a68 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 54 | static void __iomem *mbox_base; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 55 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 56 | struct omap_mbox2_fifo { |
| 57 | unsigned long msg; |
| 58 | unsigned long fifo_stat; |
| 59 | unsigned long msg_stat; |
| 60 | }; |
| 61 | |
| 62 | struct omap_mbox2_priv { |
| 63 | struct omap_mbox2_fifo tx_fifo; |
| 64 | struct omap_mbox2_fifo rx_fifo; |
| 65 | unsigned long irqenable; |
| 66 | unsigned long irqstatus; |
| 67 | u32 newmsg_bit; |
| 68 | u32 notfull_bit; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 69 | u32 ctx[OMAP4_MBOX_NR_REGS]; |
| 70 | unsigned long irqdisable; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 71 | }; |
| 72 | |
| 73 | static struct clk *mbox_ick_handle; |
| 74 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 75 | static void omap2_mbox_enable_irq(struct omap_mbox *mbox, |
| 76 | omap_mbox_type_t irq); |
| 77 | |
Hiroshi DOYU | 6c20a68 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 78 | static inline unsigned int mbox_read_reg(size_t ofs) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 79 | { |
Hiroshi DOYU | 6c20a68 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 80 | return __raw_readl(mbox_base + ofs); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 81 | } |
| 82 | |
Hiroshi DOYU | 6c20a68 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 83 | static inline void mbox_write_reg(u32 val, size_t ofs) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 84 | { |
Hiroshi DOYU | 6c20a68 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 85 | __raw_writel(val, mbox_base + ofs); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | /* Mailbox H/W preparations */ |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 89 | static int omap2_mbox_startup(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 90 | { |
Hiroshi DOYU | 1ffe627 | 2009-09-24 16:23:09 -0700 | [diff] [blame] | 91 | u32 l; |
| 92 | unsigned long timeout; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 93 | |
| 94 | mbox_ick_handle = clk_get(NULL, "mailboxes_ick"); |
| 95 | if (IS_ERR(mbox_ick_handle)) { |
Felipe Balbi | 0cd7e1c | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 96 | printk(KERN_ERR "Could not get mailboxes_ick: %ld\n", |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 97 | PTR_ERR(mbox_ick_handle)); |
| 98 | return PTR_ERR(mbox_ick_handle); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 99 | } |
| 100 | clk_enable(mbox_ick_handle); |
| 101 | |
Suman Anna | a6a6022 | 2010-01-26 16:55:29 -0600 | [diff] [blame] | 102 | if (cpu_is_omap44xx()) { |
| 103 | mbox_write_reg(OMAP4_SOFTRESET, MAILBOX_SYSCONFIG); |
| 104 | timeout = jiffies + msecs_to_jiffies(20); |
| 105 | do { |
| 106 | l = mbox_read_reg(MAILBOX_SYSCONFIG); |
| 107 | if (!(l & OMAP4_SOFTRESET)) |
| 108 | break; |
| 109 | } while (!time_after(jiffies, timeout)); |
Hiroshi DOYU | 1ffe627 | 2009-09-24 16:23:09 -0700 | [diff] [blame] | 110 | |
Suman Anna | a6a6022 | 2010-01-26 16:55:29 -0600 | [diff] [blame] | 111 | if (l & OMAP4_SOFTRESET) { |
| 112 | pr_err("Can't take mailbox out of reset\n"); |
| 113 | return -ENODEV; |
| 114 | } |
| 115 | } else { |
| 116 | mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG); |
| 117 | timeout = jiffies + msecs_to_jiffies(20); |
| 118 | do { |
| 119 | l = mbox_read_reg(MAILBOX_SYSSTATUS); |
| 120 | if (l & RESETDONE) |
| 121 | break; |
| 122 | } while (!time_after(jiffies, timeout)); |
| 123 | |
| 124 | if (!(l & RESETDONE)) { |
| 125 | pr_err("Can't take mailbox out of reset\n"); |
| 126 | return -ENODEV; |
| 127 | } |
Hiroshi DOYU | 1ffe627 | 2009-09-24 16:23:09 -0700 | [diff] [blame] | 128 | } |
| 129 | |
Hiroshi DOYU | 94fc58c | 2009-03-23 18:07:24 -0700 | [diff] [blame] | 130 | l = mbox_read_reg(MAILBOX_REVISION); |
Felipe Contreras | 909f9dc | 2010-06-11 15:51:37 +0000 | [diff] [blame] | 131 | pr_debug("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f)); |
Hiroshi DOYU | 94fc58c | 2009-03-23 18:07:24 -0700 | [diff] [blame] | 132 | |
Suman Anna | 4499ce4 | 2010-02-05 17:20:26 -0600 | [diff] [blame] | 133 | if (cpu_is_omap44xx()) |
| 134 | l = OMAP4_SMARTIDLE; |
| 135 | else |
| 136 | l = SMARTIDLE | AUTOIDLE; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 137 | mbox_write_reg(l, MAILBOX_SYSCONFIG); |
| 138 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 139 | omap2_mbox_enable_irq(mbox, IRQ_RX); |
| 140 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 141 | return 0; |
| 142 | } |
| 143 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 144 | static void omap2_mbox_shutdown(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 145 | { |
| 146 | clk_disable(mbox_ick_handle); |
| 147 | clk_put(mbox_ick_handle); |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 148 | mbox_ick_handle = NULL; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 149 | } |
| 150 | |
| 151 | /* Mailbox FIFO handle functions */ |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 152 | static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 153 | { |
| 154 | struct omap_mbox2_fifo *fifo = |
| 155 | &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; |
| 156 | return (mbox_msg_t) mbox_read_reg(fifo->msg); |
| 157 | } |
| 158 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 159 | static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 160 | { |
| 161 | struct omap_mbox2_fifo *fifo = |
| 162 | &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; |
| 163 | mbox_write_reg(msg, fifo->msg); |
| 164 | } |
| 165 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 166 | static int omap2_mbox_fifo_empty(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 167 | { |
| 168 | struct omap_mbox2_fifo *fifo = |
| 169 | &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; |
| 170 | return (mbox_read_reg(fifo->msg_stat) == 0); |
| 171 | } |
| 172 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 173 | static int omap2_mbox_fifo_full(struct omap_mbox *mbox) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 174 | { |
| 175 | struct omap_mbox2_fifo *fifo = |
| 176 | &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 177 | return mbox_read_reg(fifo->fifo_stat); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 178 | } |
| 179 | |
| 180 | /* Mailbox IRQ handle functions */ |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 181 | static void omap2_mbox_enable_irq(struct omap_mbox *mbox, |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 182 | omap_mbox_type_t irq) |
| 183 | { |
matt mooney | b45b501 | 2010-09-27 19:04:32 -0700 | [diff] [blame] | 184 | struct omap_mbox2_priv *p = mbox->priv; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 185 | u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
| 186 | |
| 187 | l = mbox_read_reg(p->irqenable); |
| 188 | l |= bit; |
| 189 | mbox_write_reg(l, p->irqenable); |
| 190 | } |
| 191 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 192 | static void omap2_mbox_disable_irq(struct omap_mbox *mbox, |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 193 | omap_mbox_type_t irq) |
| 194 | { |
matt mooney | b45b501 | 2010-09-27 19:04:32 -0700 | [diff] [blame] | 195 | struct omap_mbox2_priv *p = mbox->priv; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 196 | u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 197 | l = mbox_read_reg(p->irqdisable); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 198 | l &= ~bit; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 199 | mbox_write_reg(l, p->irqdisable); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 200 | } |
| 201 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 202 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 203 | omap_mbox_type_t irq) |
| 204 | { |
matt mooney | b45b501 | 2010-09-27 19:04:32 -0700 | [diff] [blame] | 205 | struct omap_mbox2_priv *p = mbox->priv; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 206 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
| 207 | |
| 208 | mbox_write_reg(bit, p->irqstatus); |
Hiroshi DOYU | 8828880 | 2009-09-24 16:23:10 -0700 | [diff] [blame] | 209 | |
| 210 | /* Flush posted write for irq status to avoid spurious interrupts */ |
| 211 | mbox_read_reg(p->irqstatus); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 212 | } |
| 213 | |
Hiroshi DOYU | bfbdcf8 | 2007-07-30 14:04:04 +0300 | [diff] [blame] | 214 | static int omap2_mbox_is_irq(struct omap_mbox *mbox, |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 215 | omap_mbox_type_t irq) |
| 216 | { |
matt mooney | b45b501 | 2010-09-27 19:04:32 -0700 | [diff] [blame] | 217 | struct omap_mbox2_priv *p = mbox->priv; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 218 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
| 219 | u32 enable = mbox_read_reg(p->irqenable); |
| 220 | u32 status = mbox_read_reg(p->irqstatus); |
| 221 | |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 222 | return (int)(enable & status & bit); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 223 | } |
| 224 | |
Hiroshi DOYU | c75ee75 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 225 | static void omap2_mbox_save_ctx(struct omap_mbox *mbox) |
| 226 | { |
| 227 | int i; |
| 228 | struct omap_mbox2_priv *p = mbox->priv; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 229 | int nr_regs; |
| 230 | if (cpu_is_omap44xx()) |
| 231 | nr_regs = OMAP4_MBOX_NR_REGS; |
| 232 | else |
| 233 | nr_regs = MBOX_NR_REGS; |
| 234 | for (i = 0; i < nr_regs; i++) { |
Hiroshi DOYU | c75ee75 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 235 | p->ctx[i] = mbox_read_reg(i * sizeof(u32)); |
| 236 | |
| 237 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, |
| 238 | i, p->ctx[i]); |
| 239 | } |
| 240 | } |
| 241 | |
| 242 | static void omap2_mbox_restore_ctx(struct omap_mbox *mbox) |
| 243 | { |
| 244 | int i; |
| 245 | struct omap_mbox2_priv *p = mbox->priv; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 246 | int nr_regs; |
| 247 | if (cpu_is_omap44xx()) |
| 248 | nr_regs = OMAP4_MBOX_NR_REGS; |
| 249 | else |
| 250 | nr_regs = MBOX_NR_REGS; |
| 251 | for (i = 0; i < nr_regs; i++) { |
Hiroshi DOYU | c75ee75 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 252 | mbox_write_reg(p->ctx[i], i * sizeof(u32)); |
| 253 | |
| 254 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, |
| 255 | i, p->ctx[i]); |
| 256 | } |
| 257 | } |
| 258 | |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 259 | static struct omap_mbox_ops omap2_mbox_ops = { |
| 260 | .type = OMAP_MBOX_TYPE2, |
| 261 | .startup = omap2_mbox_startup, |
| 262 | .shutdown = omap2_mbox_shutdown, |
| 263 | .fifo_read = omap2_mbox_fifo_read, |
| 264 | .fifo_write = omap2_mbox_fifo_write, |
| 265 | .fifo_empty = omap2_mbox_fifo_empty, |
| 266 | .fifo_full = omap2_mbox_fifo_full, |
| 267 | .enable_irq = omap2_mbox_enable_irq, |
| 268 | .disable_irq = omap2_mbox_disable_irq, |
| 269 | .ack_irq = omap2_mbox_ack_irq, |
| 270 | .is_irq = omap2_mbox_is_irq, |
Hiroshi DOYU | c75ee75 | 2009-03-23 18:07:26 -0700 | [diff] [blame] | 271 | .save_ctx = omap2_mbox_save_ctx, |
| 272 | .restore_ctx = omap2_mbox_restore_ctx, |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 273 | }; |
| 274 | |
| 275 | /* |
| 276 | * MAILBOX 0: ARM -> DSP, |
| 277 | * MAILBOX 1: ARM <- DSP. |
| 278 | * MAILBOX 2: ARM -> IVA, |
| 279 | * MAILBOX 3: ARM <- IVA. |
| 280 | */ |
| 281 | |
| 282 | /* FIXME: the following structs should be filled automatically by the user id */ |
Felipe Contreras | 07d65d8 | 2010-06-11 15:51:38 +0000 | [diff] [blame] | 283 | |
Omar Ramirez Luna | ff0fba0 | 2010-10-22 20:10:58 -0500 | [diff] [blame] | 284 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP2) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 285 | /* DSP */ |
| 286 | static struct omap_mbox2_priv omap2_mbox_dsp_priv = { |
| 287 | .tx_fifo = { |
Hiroshi DOYU | 733ecc5 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 288 | .msg = MAILBOX_MESSAGE(0), |
| 289 | .fifo_stat = MAILBOX_FIFOSTATUS(0), |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 290 | }, |
| 291 | .rx_fifo = { |
Hiroshi DOYU | 733ecc5 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 292 | .msg = MAILBOX_MESSAGE(1), |
| 293 | .msg_stat = MAILBOX_MSGSTATUS(1), |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 294 | }, |
Hiroshi DOYU | 733ecc5 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 295 | .irqenable = MAILBOX_IRQENABLE(0), |
| 296 | .irqstatus = MAILBOX_IRQSTATUS(0), |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 297 | .notfull_bit = MAILBOX_IRQ_NOTFULL(0), |
| 298 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(1), |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 299 | .irqdisable = MAILBOX_IRQENABLE(0), |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 300 | }; |
| 301 | |
Felipe Contreras | 07d65d8 | 2010-06-11 15:51:38 +0000 | [diff] [blame] | 302 | struct omap_mbox mbox_dsp_info = { |
| 303 | .name = "dsp", |
| 304 | .ops = &omap2_mbox_ops, |
| 305 | .priv = &omap2_mbox_dsp_priv, |
| 306 | }; |
Felipe Contreras | 14476bd | 2010-06-11 15:51:47 +0000 | [diff] [blame] | 307 | #endif |
Felipe Contreras | 07d65d8 | 2010-06-11 15:51:38 +0000 | [diff] [blame] | 308 | |
Omar Ramirez Luna | ff0fba0 | 2010-10-22 20:10:58 -0500 | [diff] [blame] | 309 | #if defined(CONFIG_ARCH_OMAP3) |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 310 | struct omap_mbox *omap3_mboxes[] = { &mbox_dsp_info, NULL }; |
Felipe Contreras | 14476bd | 2010-06-11 15:51:47 +0000 | [diff] [blame] | 311 | #endif |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 312 | |
Tony Lindgren | 59b479e | 2011-01-27 16:39:40 -0800 | [diff] [blame] | 313 | #if defined(CONFIG_SOC_OMAP2420) |
Felipe Contreras | 07d65d8 | 2010-06-11 15:51:38 +0000 | [diff] [blame] | 314 | /* IVA */ |
| 315 | static struct omap_mbox2_priv omap2_mbox_iva_priv = { |
| 316 | .tx_fifo = { |
| 317 | .msg = MAILBOX_MESSAGE(2), |
| 318 | .fifo_stat = MAILBOX_FIFOSTATUS(2), |
| 319 | }, |
| 320 | .rx_fifo = { |
| 321 | .msg = MAILBOX_MESSAGE(3), |
| 322 | .msg_stat = MAILBOX_MSGSTATUS(3), |
| 323 | }, |
| 324 | .irqenable = MAILBOX_IRQENABLE(3), |
| 325 | .irqstatus = MAILBOX_IRQSTATUS(3), |
| 326 | .notfull_bit = MAILBOX_IRQ_NOTFULL(2), |
| 327 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), |
| 328 | .irqdisable = MAILBOX_IRQENABLE(3), |
| 329 | }; |
| 330 | |
| 331 | static struct omap_mbox mbox_iva_info = { |
| 332 | .name = "iva", |
| 333 | .ops = &omap2_mbox_ops, |
| 334 | .priv = &omap2_mbox_iva_priv, |
| 335 | }; |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 336 | |
| 337 | struct omap_mbox *omap2_mboxes[] = { &mbox_iva_info, &mbox_dsp_info, NULL }; |
Felipe Contreras | 07d65d8 | 2010-06-11 15:51:38 +0000 | [diff] [blame] | 338 | #endif |
| 339 | |
Felipe Contreras | 14476bd | 2010-06-11 15:51:47 +0000 | [diff] [blame] | 340 | #if defined(CONFIG_ARCH_OMAP4) |
Felipe Contreras | 07d65d8 | 2010-06-11 15:51:38 +0000 | [diff] [blame] | 341 | /* OMAP4 */ |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 342 | static struct omap_mbox2_priv omap2_mbox_1_priv = { |
| 343 | .tx_fifo = { |
| 344 | .msg = MAILBOX_MESSAGE(0), |
| 345 | .fifo_stat = MAILBOX_FIFOSTATUS(0), |
| 346 | }, |
| 347 | .rx_fifo = { |
| 348 | .msg = MAILBOX_MESSAGE(1), |
| 349 | .msg_stat = MAILBOX_MSGSTATUS(1), |
| 350 | }, |
| 351 | .irqenable = OMAP4_MAILBOX_IRQENABLE(0), |
| 352 | .irqstatus = OMAP4_MAILBOX_IRQSTATUS(0), |
| 353 | .notfull_bit = MAILBOX_IRQ_NOTFULL(0), |
| 354 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(1), |
| 355 | .irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0), |
| 356 | }; |
| 357 | |
| 358 | struct omap_mbox mbox_1_info = { |
| 359 | .name = "mailbox-1", |
| 360 | .ops = &omap2_mbox_ops, |
| 361 | .priv = &omap2_mbox_1_priv, |
| 362 | }; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 363 | |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 364 | static struct omap_mbox2_priv omap2_mbox_2_priv = { |
| 365 | .tx_fifo = { |
| 366 | .msg = MAILBOX_MESSAGE(3), |
| 367 | .fifo_stat = MAILBOX_FIFOSTATUS(3), |
| 368 | }, |
| 369 | .rx_fifo = { |
| 370 | .msg = MAILBOX_MESSAGE(2), |
| 371 | .msg_stat = MAILBOX_MSGSTATUS(2), |
| 372 | }, |
| 373 | .irqenable = OMAP4_MAILBOX_IRQENABLE(0), |
| 374 | .irqstatus = OMAP4_MAILBOX_IRQSTATUS(0), |
| 375 | .notfull_bit = MAILBOX_IRQ_NOTFULL(3), |
| 376 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(2), |
| 377 | .irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0), |
| 378 | }; |
| 379 | |
| 380 | struct omap_mbox mbox_2_info = { |
| 381 | .name = "mailbox-2", |
| 382 | .ops = &omap2_mbox_ops, |
| 383 | .priv = &omap2_mbox_2_priv, |
| 384 | }; |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 385 | |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 386 | struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL }; |
Felipe Contreras | 14476bd | 2010-06-11 15:51:47 +0000 | [diff] [blame] | 387 | #endif |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 388 | |
Hiroshi DOYU | da8cfe0 | 2009-03-23 18:07:25 -0700 | [diff] [blame] | 389 | static int __devinit omap2_mbox_probe(struct platform_device *pdev) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 390 | { |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 391 | struct resource *mem; |
Hiroshi DOYU | 6c20a68 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 392 | int ret; |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 393 | struct omap_mbox **list; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 394 | |
Felipe Contreras | 14476bd | 2010-06-11 15:51:47 +0000 | [diff] [blame] | 395 | if (false) |
| 396 | ; |
Omar Ramirez Luna | ff0fba0 | 2010-10-22 20:10:58 -0500 | [diff] [blame] | 397 | #if defined(CONFIG_ARCH_OMAP3) |
| 398 | else if (cpu_is_omap34xx()) { |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 399 | list = omap3_mboxes; |
| 400 | |
| 401 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); |
| 402 | } |
Felipe Contreras | 14476bd | 2010-06-11 15:51:47 +0000 | [diff] [blame] | 403 | #endif |
Omar Ramirez Luna | ff0fba0 | 2010-10-22 20:10:58 -0500 | [diff] [blame] | 404 | #if defined(CONFIG_ARCH_OMAP2) |
| 405 | else if (cpu_is_omap2430()) { |
| 406 | list = omap2_mboxes; |
| 407 | |
| 408 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); |
| 409 | } else if (cpu_is_omap2420()) { |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 410 | list = omap2_mboxes; |
| 411 | |
| 412 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); |
| 413 | list[1]->irq = platform_get_irq_byname(pdev, "iva"); |
| 414 | } |
| 415 | #endif |
Felipe Contreras | 14476bd | 2010-06-11 15:51:47 +0000 | [diff] [blame] | 416 | #if defined(CONFIG_ARCH_OMAP4) |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 417 | else if (cpu_is_omap44xx()) { |
| 418 | list = omap4_mboxes; |
| 419 | |
| 420 | list[0]->irq = list[1]->irq = |
| 421 | platform_get_irq_byname(pdev, "mbox"); |
| 422 | } |
Felipe Contreras | 14476bd | 2010-06-11 15:51:47 +0000 | [diff] [blame] | 423 | #endif |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 424 | else { |
| 425 | pr_err("%s: platform not supported\n", __func__); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 426 | return -ENODEV; |
| 427 | } |
Felipe Contreras | 898ee75 | 2010-06-11 15:51:45 +0000 | [diff] [blame] | 428 | |
| 429 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 430 | mbox_base = ioremap(mem->start, resource_size(mem)); |
Hiroshi DOYU | 6c20a68 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 431 | if (!mbox_base) |
| 432 | return -ENOMEM; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 433 | |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 434 | ret = omap_mbox_register(&pdev->dev, list); |
| 435 | if (ret) { |
| 436 | iounmap(mbox_base); |
| 437 | return ret; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 438 | } |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 439 | |
Omar Ramirez Luna | 5d78373 | 2010-12-01 14:15:08 -0600 | [diff] [blame] | 440 | return 0; |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 441 | } |
| 442 | |
Hiroshi DOYU | da8cfe0 | 2009-03-23 18:07:25 -0700 | [diff] [blame] | 443 | static int __devexit omap2_mbox_remove(struct platform_device *pdev) |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 444 | { |
Felipe Contreras | 9c80c8c | 2010-06-11 15:51:46 +0000 | [diff] [blame] | 445 | omap_mbox_unregister(); |
Hiroshi DOYU | 6c20a68 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 446 | iounmap(mbox_base); |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 447 | return 0; |
| 448 | } |
| 449 | |
| 450 | static struct platform_driver omap2_mbox_driver = { |
| 451 | .probe = omap2_mbox_probe, |
Hiroshi DOYU | da8cfe0 | 2009-03-23 18:07:25 -0700 | [diff] [blame] | 452 | .remove = __devexit_p(omap2_mbox_remove), |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 453 | .driver = { |
Felipe Contreras | d742709 | 2010-06-11 15:51:48 +0000 | [diff] [blame] | 454 | .name = "omap-mailbox", |
Hiroshi DOYU | 340a614 | 2006-12-07 15:43:59 -0800 | [diff] [blame] | 455 | }, |
| 456 | }; |
| 457 | |
| 458 | static int __init omap2_mbox_init(void) |
| 459 | { |
| 460 | return platform_driver_register(&omap2_mbox_driver); |
| 461 | } |
| 462 | |
| 463 | static void __exit omap2_mbox_exit(void) |
| 464 | { |
| 465 | platform_driver_unregister(&omap2_mbox_driver); |
| 466 | } |
| 467 | |
| 468 | module_init(omap2_mbox_init); |
| 469 | module_exit(omap2_mbox_exit); |
| 470 | |
Hiroshi DOYU | 733ecc5 | 2009-03-23 18:07:23 -0700 | [diff] [blame] | 471 | MODULE_LICENSE("GPL v2"); |
C A Subramaniam | 5f00ec6 | 2009-11-22 10:11:22 -0800 | [diff] [blame] | 472 | MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions"); |
Ohad Ben-Cohen | f375325 | 2010-05-05 15:33:07 +0000 | [diff] [blame] | 473 | MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>"); |
| 474 | MODULE_AUTHOR("Paul Mundt"); |
Felipe Contreras | d742709 | 2010-06-11 15:51:48 +0000 | [diff] [blame] | 475 | MODULE_ALIAS("platform:omap2-mailbox"); |