Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-omap2/prcm.c |
| 3 | * |
| 4 | * OMAP 24xx Power Reset and Clock Management (PRCM) functions |
| 5 | * |
| 6 | * Copyright (C) 2005 Nokia Corporation |
| 7 | * |
| 8 | * Written by Tony Lindgren <tony.lindgren@nokia.com> |
| 9 | * |
Rajendra Nayak | c171a25 | 2008-09-26 17:48:31 +0530 | [diff] [blame] | 10 | * Copyright (C) 2007 Texas Instruments, Inc. |
| 11 | * Rajendra Nayak <rnayak@ti.com> |
| 12 | * |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 13 | * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc. |
Abhijit Pagare | 3790300 | 2010-01-26 20:12:51 -0700 | [diff] [blame] | 14 | * Upgraded with OMAP4 support by Abhijit Pagare <abhijitpagare@ti.com> |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 15 | * |
| 16 | * This program is free software; you can redistribute it and/or modify |
| 17 | * it under the terms of the GNU General Public License version 2 as |
| 18 | * published by the Free Software Foundation. |
| 19 | */ |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 20 | |
| 21 | #include <linux/kernel.h> |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 22 | #include <linux/init.h> |
| 23 | #include <linux/clk.h> |
Tony Lindgren | a58caad | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 24 | #include <linux/io.h> |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 25 | #include <linux/delay.h> |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 26 | |
Russell King - ARM Linux | ee54dba | 2011-01-27 16:39:45 -0800 | [diff] [blame] | 27 | #include <mach/system.h> |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 28 | #include <plat/common.h> |
| 29 | #include <plat/prcm.h> |
Rajendra Nayak | c171a25 | 2008-09-26 17:48:31 +0530 | [diff] [blame] | 30 | #include <plat/irqs.h> |
Paul Walmsley | 4459598 | 2008-03-18 10:04:51 +0200 | [diff] [blame] | 31 | |
Tony Lindgren | a58caad | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 32 | #include "clock.h" |
Paul Walmsley | feec127 | 2010-01-26 20:13:11 -0700 | [diff] [blame] | 33 | #include "clock2xxx.h" |
Paul Walmsley | 59fb659 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 34 | #include "cm2xxx_3xxx.h" |
Paul Walmsley | 59fb659 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 35 | #include "prm2xxx_3xxx.h" |
Paul Walmsley | d198b51 | 2010-12-21 15:30:54 -0700 | [diff] [blame] | 36 | #include "prm44xx.h" |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 37 | #include "prminst44xx.h" |
Paul Walmsley | 4459598 | 2008-03-18 10:04:51 +0200 | [diff] [blame] | 38 | #include "prm-regbits-24xx.h" |
Rajeev Kulkarni | ff4d3e1 | 2010-09-21 10:34:09 -0600 | [diff] [blame] | 39 | #include "prm-regbits-44xx.h" |
Paul Walmsley | 4814ced | 2010-10-08 11:40:20 -0600 | [diff] [blame] | 40 | #include "control.h" |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 41 | |
Paul Walmsley | 59fb659 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 42 | void __iomem *prm_base; |
| 43 | void __iomem *cm_base; |
| 44 | void __iomem *cm2_base; |
Tony Lindgren | a58caad | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 45 | |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 46 | #define MAX_MODULE_ENABLE_WAIT 100000 |
| 47 | |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 48 | u32 omap_prcm_get_reset_sources(void) |
| 49 | { |
Tony Lindgren | ff00fcc | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 50 | /* XXX This presumably needs modification for 34XX */ |
Rajendra Nayak | 766d305 | 2010-03-31 04:16:30 -0600 | [diff] [blame] | 51 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 52 | return omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f; |
Abhijit Pagare | 3790300 | 2010-01-26 20:12:51 -0700 | [diff] [blame] | 53 | if (cpu_is_omap44xx()) |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 54 | return omap2_prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f; |
Kevin Hilman | 0cc9314 | 2010-02-24 12:05:56 -0700 | [diff] [blame] | 55 | |
| 56 | return 0; |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 57 | } |
| 58 | EXPORT_SYMBOL(omap_prcm_get_reset_sources); |
| 59 | |
| 60 | /* Resets clock rates and reboots the system. Only called from system.h */ |
Russell King - ARM Linux | ee54dba | 2011-01-27 16:39:45 -0800 | [diff] [blame] | 61 | static void omap_prcm_arch_reset(char mode, const char *cmd) |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 62 | { |
Kevin Hilman | 0cc9314 | 2010-02-24 12:05:56 -0700 | [diff] [blame] | 63 | s16 prcm_offs = 0; |
Paul Walmsley | 4459598 | 2008-03-18 10:04:51 +0200 | [diff] [blame] | 64 | |
Paul Walmsley | feec127 | 2010-01-26 20:13:11 -0700 | [diff] [blame] | 65 | if (cpu_is_omap24xx()) { |
| 66 | omap2xxx_clk_prepare_for_reboot(); |
| 67 | |
Tony Lindgren | ff00fcc | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 68 | prcm_offs = WKUP_MOD; |
Paul Walmsley | feec127 | 2010-01-26 20:13:11 -0700 | [diff] [blame] | 69 | } else if (cpu_is_omap34xx()) { |
Tony Lindgren | ff00fcc | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 70 | prcm_offs = OMAP3430_GR_MOD; |
Paul Walmsley | 166353b | 2010-12-21 20:01:21 -0700 | [diff] [blame] | 71 | omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); |
Paul Walmsley | dac9a77 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 72 | } else if (cpu_is_omap44xx()) { |
| 73 | omap4_prm_global_warm_sw_reset(); /* never returns */ |
| 74 | } else { |
Tony Lindgren | ff00fcc | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 75 | WARN_ON(1); |
Paul Walmsley | dac9a77 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 76 | } |
Tony Lindgren | ff00fcc | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 77 | |
Vishwanath BS | 9bf8391 | 2010-10-05 19:35:34 +0530 | [diff] [blame] | 78 | /* |
| 79 | * As per Errata i520, in some cases, user will not be able to |
| 80 | * access DDR memory after warm-reset. |
| 81 | * This situation occurs while the warm-reset happens during a read |
| 82 | * access to DDR memory. In that particular condition, DDR memory |
| 83 | * does not respond to a corrupted read command due to the warm |
| 84 | * reset occurrence but SDRC is waiting for read completion. |
| 85 | * SDRC is not sensitive to the warm reset, but the interconnect is |
| 86 | * reset on the fly, thus causing a misalignment between SDRC logic, |
| 87 | * interconnect logic and DDR memory state. |
| 88 | * WORKAROUND: |
| 89 | * Steps to perform before a Warm reset is trigged: |
| 90 | * 1. enable self-refresh on idle request |
| 91 | * 2. put SDRC in idle |
| 92 | * 3. wait until SDRC goes to idle |
| 93 | * 4. generate SW reset (Global SW reset) |
| 94 | * |
| 95 | * Steps to be performed after warm reset occurs (in bootloader): |
| 96 | * if HW warm reset is the source, apply below steps before any |
| 97 | * accesses to SDRAM: |
| 98 | * 1. Reset SMS and SDRC and wait till reset is complete |
| 99 | * 2. Re-initialize SMS, SDRC and memory |
| 100 | * |
| 101 | * NOTE: Above work around is required only if arch reset is implemented |
| 102 | * using Global SW reset(GLOBAL_SW_RST). DPLL3 reset does not need |
| 103 | * the WA since it resets SDRC as well as part of cold reset. |
| 104 | */ |
| 105 | |
Paul Walmsley | dac9a77 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 106 | /* XXX should be moved to some OMAP2/3 specific code */ |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 107 | omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, |
| 108 | OMAP2_RM_RSTCTRL); |
| 109 | omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ |
Tony Lindgren | b824efa | 2006-04-02 17:46:20 +0100 | [diff] [blame] | 110 | } |
Tony Lindgren | a58caad | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 111 | |
Russell King - ARM Linux | ee54dba | 2011-01-27 16:39:45 -0800 | [diff] [blame] | 112 | void (*arch_reset)(char, const char *) = omap_prcm_arch_reset; |
| 113 | |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 114 | /** |
| 115 | * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness |
| 116 | * @reg: physical address of module IDLEST register |
| 117 | * @mask: value to mask against to determine if the module is active |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 118 | * @idlest: idle state indicator (0 or 1) for the clock |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 119 | * @name: name of the clock (for printk) |
| 120 | * |
| 121 | * Returns 1 if the module indicated readiness in time, or 0 if it |
| 122 | * failed to enable in roughly MAX_MODULE_ENABLE_WAIT microseconds. |
Paul Walmsley | 59fb659 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 123 | * |
| 124 | * XXX This function is deprecated. It should be removed once the |
| 125 | * hwmod conversion is complete. |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 126 | */ |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 127 | int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, |
| 128 | const char *name) |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 129 | { |
| 130 | int i = 0; |
| 131 | int ena = 0; |
| 132 | |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 133 | if (idlest) |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 134 | ena = 0; |
| 135 | else |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 136 | ena = mask; |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 137 | |
| 138 | /* Wait for lock */ |
Paul Walmsley | 6f8b7ff | 2009-12-08 16:33:16 -0700 | [diff] [blame] | 139 | omap_test_timeout(((__raw_readl(reg) & mask) == ena), |
| 140 | MAX_MODULE_ENABLE_WAIT, i); |
Paul Walmsley | 72350b2 | 2009-07-24 19:44:03 -0600 | [diff] [blame] | 141 | |
| 142 | if (i < MAX_MODULE_ENABLE_WAIT) |
| 143 | pr_debug("cm: Module associated with clock %s ready after %d " |
| 144 | "loops\n", name, i); |
| 145 | else |
| 146 | pr_err("cm: Module associated with clock %s didn't enable in " |
| 147 | "%d tries\n", name, MAX_MODULE_ENABLE_WAIT); |
| 148 | |
| 149 | return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; |
| 150 | }; |
| 151 | |
Tony Lindgren | a58caad | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 152 | void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) |
| 153 | { |
Santosh Shilimkar | b7ebb10 | 2010-02-15 18:03:37 +0530 | [diff] [blame] | 154 | /* Static mapping, never released */ |
| 155 | if (omap2_globals->prm) { |
| 156 | prm_base = ioremap(omap2_globals->prm, SZ_8K); |
| 157 | WARN_ON(!prm_base); |
| 158 | } |
| 159 | if (omap2_globals->cm) { |
| 160 | cm_base = ioremap(omap2_globals->cm, SZ_8K); |
| 161 | WARN_ON(!cm_base); |
| 162 | } |
| 163 | if (omap2_globals->cm2) { |
| 164 | cm2_base = ioremap(omap2_globals->cm2, SZ_8K); |
| 165 | WARN_ON(!cm2_base); |
| 166 | } |
Tony Lindgren | a58caad | 2008-07-03 12:24:44 +0300 | [diff] [blame] | 167 | } |