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Kumar Gala4330f5d2007-03-16 09:32:17 -05001menu "Platform support"
Kumar Gala4330f5d2007-03-16 09:32:17 -05002
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +00003source "arch/powerpc/platforms/powernv/Kconfig"
Kumar Gala4330f5d2007-03-16 09:32:17 -05004source "arch/powerpc/platforms/pseries/Kconfig"
Kumar Gala4330f5d2007-03-16 09:32:17 -05005source "arch/powerpc/platforms/chrp/Kconfig"
John Rigbye177edc2008-01-29 04:28:53 +11006source "arch/powerpc/platforms/512x/Kconfig"
Kumar Gala4330f5d2007-03-16 09:32:17 -05007source "arch/powerpc/platforms/52xx/Kconfig"
8source "arch/powerpc/platforms/powermac/Kconfig"
Kumar Gala4330f5d2007-03-16 09:32:17 -05009source "arch/powerpc/platforms/maple/Kconfig"
10source "arch/powerpc/platforms/pasemi/Kconfig"
Kumar Gala98750262007-04-12 18:01:34 -050011source "arch/powerpc/platforms/ps3/Kconfig"
12source "arch/powerpc/platforms/cell/Kconfig"
Kumar Galac8a55f32007-04-12 17:35:54 -050013source "arch/powerpc/platforms/8xx/Kconfig"
Kumar Galad6071f82007-04-12 16:53:32 -050014source "arch/powerpc/platforms/82xx/Kconfig"
Kumar Galab5a48342007-04-12 15:46:21 -050015source "arch/powerpc/platforms/83xx/Kconfig"
Kumar Galadb947802007-04-12 17:44:07 -050016source "arch/powerpc/platforms/85xx/Kconfig"
Kumar Gala4a89f7f2007-04-12 15:41:26 -050017source "arch/powerpc/platforms/86xx/Kconfig"
Kumar Gala98750262007-04-12 18:01:34 -050018source "arch/powerpc/platforms/embedded6xx/Kconfig"
David Gibsonf6dfc802007-05-08 14:10:01 +100019source "arch/powerpc/platforms/44x/Kconfig"
Josh Boyer545c0692007-09-07 07:51:24 -050020source "arch/powerpc/platforms/40x/Kconfig"
Gerhard Pircher54b318a2009-02-10 12:20:49 +000021source "arch/powerpc/platforms/amigaone/Kconfig"
David Gibsona1d0d982011-04-14 22:32:06 +000022source "arch/powerpc/platforms/wsp/Kconfig"
Kumar Gala4330f5d2007-03-16 09:32:17 -050023
Alexander Grafd17051c2010-07-29 14:47:57 +020024config KVM_GUEST
25 bool "KVM Guest support"
Anton Blanchard643ba4e2011-08-04 17:23:58 +000026 default n
Liu Yu-B132012e1ae9c2012-03-15 10:52:13 +000027 select EPAPR_PARAVIRT
Alexander Grafd17051c2010-07-29 14:47:57 +020028 ---help---
29 This option enables various optimizations for running under the KVM
30 hypervisor. Overhead for the kernel when not running inside KVM should
31 be minimal.
32
33 In case of doubt, say Y
34
Liu Yu-B132012e1ae9c2012-03-15 10:52:13 +000035config EPAPR_PARAVIRT
36 bool "ePAPR para-virtualization support"
37 default n
38 help
39 Enables ePAPR para-virtualization support for guests.
40
41 In case of doubt, say Y
42
Kumar Gala4330f5d2007-03-16 09:32:17 -050043config PPC_NATIVE
44 bool
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000045 depends on 6xx || PPC64
Kumar Gala4330f5d2007-03-16 09:32:17 -050046 help
47 Support for running natively on the hardware, i.e. without
48 a hypervisor. This option is not user-selectable but should
49 be selected by all platforms that need it.
50
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000051config PPC_OF_BOOT_TRAMPOLINE
52 bool "Support booting from Open Firmware or yaboot"
53 depends on 6xx || PPC64
54 default y
55 help
56 Support from booting from Open Firmware or yaboot using an
57 Open Firmware client interface. This enables the kernel to
Sylvestre Ledruf65e51d2011-04-04 15:04:46 -070058 communicate with open firmware to retrieve system information
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000059 such as the device tree.
60
61 In case of doubt, say Y
62
Kumar Gala4330f5d2007-03-16 09:32:17 -050063config UDBG_RTAS_CONSOLE
64 bool "RTAS based debug console"
65 depends on PPC_RTAS
66 default n
67
Milton Miller1ece3552011-05-10 19:29:42 +000068config PPC_SMP_MUXED_IPI
69 bool
70 help
71 Select this opton if your platform supports SMP and your
72 interrupt controller provides less than 4 interrupts to each
73 cpu. This will enable the generic code to multiplex the 4
74 messages on to one ipi.
75
Kumar Gala4330f5d2007-03-16 09:32:17 -050076config PPC_UDBG_BEAT
77 bool "BEAT based debug console"
78 depends on PPC_CELLEB
79 default n
80
John Rigbyb0bbad62008-01-17 17:05:31 -070081config IPIC
82 bool
83 default n
84
Kumar Gala98750262007-04-12 18:01:34 -050085config MPIC
86 bool
87 default n
88
Ashish Kalra3a932612011-05-19 08:54:28 -050089config PPC_EPAPR_HV_PIC
90 bool
91 default n
Stuart Yoder40656392012-07-03 05:48:54 +000092 select EPAPR_PARAVIRT
Ashish Kalra3a932612011-05-19 08:54:28 -050093
Kumar Gala98750262007-04-12 18:01:34 -050094config MPIC_WEIRD
95 bool
96 default n
97
Jia Hongtao86268162012-02-17 10:49:03 +080098config MPIC_MSGR
99 bool "MPIC message register support"
100 depends on MPIC
101 default n
102 help
103 Enables support for the MPIC message registers. These
104 registers are used for inter-processor communication.
105
Kumar Gala98750262007-04-12 18:01:34 -0500106config PPC_I8259
107 bool
108 default n
109
Kumar Gala4330f5d2007-03-16 09:32:17 -0500110config U3_DART
111 bool
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000112 depends on PPC64
Kumar Gala4330f5d2007-03-16 09:32:17 -0500113 default n
114
115config PPC_RTAS
116 bool
117 default n
118
119config RTAS_ERROR_LOGGING
120 bool
121 depends on PPC_RTAS
122 default n
123
Benjamin Herrenschmidt3d541c42009-09-24 19:30:05 +0000124config PPC_RTAS_DAEMON
125 bool
126 depends on PPC_RTAS
127 default n
128
Kumar Gala4330f5d2007-03-16 09:32:17 -0500129config RTAS_PROC
130 bool "Proc interface to RTAS"
Michael Ellermanb80ec3d2013-05-06 18:43:39 +0000131 depends on PPC_RTAS && PROC_FS
Kumar Gala4330f5d2007-03-16 09:32:17 -0500132 default y
133
134config RTAS_FLASH
135 tristate "Firmware flash interface"
136 depends on PPC64 && RTAS_PROC
137
Kumar Gala4330f5d2007-03-16 09:32:17 -0500138config MMIO_NVRAM
139 bool
140 default n
141
Michael Ellerman6cfef5b2007-04-23 18:47:08 +1000142config MPIC_U3_HT_IRQS
Kumar Gala4330f5d2007-03-16 09:32:17 -0500143 bool
Andreas Schwab314b3892010-08-23 07:36:41 +0000144 default n
Kumar Gala4330f5d2007-03-16 09:32:17 -0500145
Olof Johansson0d72ba92007-09-08 05:13:19 +1000146config MPIC_BROKEN_REGREAD
147 bool
148 depends on MPIC
149 help
150 This option enables a MPIC driver workaround for some chips
151 that have a bug that causes some interrupt source information
152 to not read back properly. It is safe to use on other chips as
153 well, but enabling it uses about 8KB of memory to keep copies
154 of the register contents in software.
155
Kumar Gala4330f5d2007-03-16 09:32:17 -0500156config IBMVIO
Stephen Rothwell3d066d72012-02-22 14:10:12 +0000157 depends on PPC_PSERIES
Kumar Gala4330f5d2007-03-16 09:32:17 -0500158 bool
159 default y
160
161config IBMEBUS
162 depends on PPC_PSERIES
163 bool "Support for GX bus based adapters"
164 help
165 Bus device driver for GX bus based adapters.
166
Gavin Shan317f06d2013-06-20 13:20:52 +0800167config EEH
168 bool
169 depends on (PPC_POWERNV || PPC_PSERIES) && PCI
170 default y
171
Kumar Gala4330f5d2007-03-16 09:32:17 -0500172config PPC_MPC106
173 bool
174 default n
175
176config PPC_970_NAP
177 bool
178 default n
179
Benjamin Herrenschmidt948cf672011-01-24 18:42:41 +1100180config PPC_P7_NAP
181 bool
182 default n
183
Kumar Gala4330f5d2007-03-16 09:32:17 -0500184config PPC_INDIRECT_IO
185 bool
186 select GENERIC_IOMAP
Michael Ellerman21176fe2011-04-11 21:25:01 +0000187
188config PPC_INDIRECT_PIO
189 bool
190 select PPC_INDIRECT_IO
191
192config PPC_INDIRECT_MMIO
193 bool
194 select PPC_INDIRECT_IO
Kumar Gala4330f5d2007-03-16 09:32:17 -0500195
Michael Ellerman3cc30d02011-04-11 21:25:01 +0000196config PPC_IO_WORKAROUNDS
197 bool
198
Kumar Gala4330f5d2007-03-16 09:32:17 -0500199source "drivers/cpufreq/Kconfig"
200
Olof Johanssonc146c952007-04-27 15:52:43 +1000201menu "CPU Frequency drivers"
202 depends on CPU_FREQ
203
Kumar Gala4330f5d2007-03-16 09:32:17 -0500204config CPU_FREQ_PMAC
205 bool "Support for Apple PowerBooks"
Olof Johanssonc146c952007-04-27 15:52:43 +1000206 depends on ADB_PMU && PPC32
Kumar Gala4330f5d2007-03-16 09:32:17 -0500207 select CPU_FREQ_TABLE
208 help
209 This adds support for frequency switching on Apple PowerBooks,
210 this currently includes some models of iBook & Titanium
211 PowerBook.
212
213config CPU_FREQ_PMAC64
214 bool "Support for some Apple G5s"
Olof Johanssonc146c952007-04-27 15:52:43 +1000215 depends on PPC_PMAC && PPC64
Kumar Gala4330f5d2007-03-16 09:32:17 -0500216 select CPU_FREQ_TABLE
217 help
218 This adds support for frequency switching on Apple iMac G5,
219 and some of the more recent desktop G5 machines as well.
Olof Johansson2e0c3372007-04-27 15:46:01 +1000220
221config PPC_PASEMI_CPUFREQ
222 bool "Support for PA Semi PWRficient"
Olof Johanssonc146c952007-04-27 15:52:43 +1000223 depends on PPC_PASEMI
Olof Johansson2e0c3372007-04-27 15:46:01 +1000224 default y
225 select CPU_FREQ_TABLE
226 help
227 This adds the support for frequency switching on PA Semi
228 PWRficient processors.
229
Kumar Gala164a4602007-04-12 15:35:50 -0500230endmenu
Kumar Gala4330f5d2007-03-16 09:32:17 -0500231
Deepthi Dharware1798162011-11-30 02:46:55 +0000232menu "CPUIdle driver"
233
234source "drivers/cpuidle/Kconfig"
235
236endmenu
237
Kumar Gala4330f5d2007-03-16 09:32:17 -0500238config PPC601_SYNC_FIX
239 bool "Workarounds for PPC601 bugs"
Paul Bolle933ee712013-03-27 00:47:03 +0000240 depends on 6xx && PPC_PMAC
Kumar Gala4330f5d2007-03-16 09:32:17 -0500241 help
242 Some versions of the PPC601 (the first PowerPC chip) have bugs which
243 mean that extra synchronization instructions are required near
244 certain instructions, typically those that make major changes to the
245 CPU state. These extra instructions reduce performance slightly.
246 If you say N here, these extra instructions will not be included,
247 resulting in a kernel which will run faster but may not run at all
248 on some systems with the PPC601 chip.
249
250 If in doubt, say Y here.
251
252config TAU
253 bool "On-chip CPU temperature sensor support"
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000254 depends on 6xx
Kumar Gala4330f5d2007-03-16 09:32:17 -0500255 help
256 G3 and G4 processors have an on-chip temperature sensor called the
257 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
258 temperature within 2-4 degrees Celsius. This option shows the current
259 on-die temperature in /proc/cpuinfo if the cpu supports it.
260
261 Unfortunately, on some chip revisions, this sensor is very inaccurate
262 and in many cases, does not work at all, so don't assume the cpu
263 temp is actually what /proc/cpuinfo says it is.
264
265config TAU_INT
266 bool "Interrupt driven TAU driver (DANGEROUS)"
267 depends on TAU
268 ---help---
269 The TAU supports an interrupt driven mode which causes an interrupt
270 whenever the temperature goes out of range. This is the fastest way
271 to get notified the temp has exceeded a range. With this option off,
272 a timer is used to re-check the temperature periodically.
273
274 However, on some cpus it appears that the TAU interrupt hardware
275 is buggy and can cause a situation which would lead unexplained hard
276 lockups.
277
278 Unless you are extending the TAU driver, or enjoy kernel/hardware
279 debugging, leave this option off.
280
281config TAU_AVERAGE
282 bool "Average high and low temp"
283 depends on TAU
284 ---help---
285 The TAU hardware can compare the temperature to an upper and lower
286 bound. The default behavior is to show both the upper and lower
287 bound in /proc/cpuinfo. If the range is large, the temperature is
288 either changing a lot, or the TAU hardware is broken (likely on some
289 G4's). If the range is small (around 4 degrees), the temperature is
290 relatively stable. If you say Y here, a single temperature value,
291 halfway between the upper and lower bounds, will be reported in
292 /proc/cpuinfo.
293
294 If in doubt, say N here.
295
Kumar Gala98750262007-04-12 18:01:34 -0500296config QUICC_ENGINE
Timur Tabi4e330bc2008-10-03 11:14:10 -0500297 bool "Freescale QUICC Engine (QE) Support"
Kumar Gala47fe8192011-05-20 00:00:21 -0500298 depends on FSL_SOC && PPC32
Sylvain Munaut1088a202007-09-16 20:53:25 +1000299 select PPC_LIB_RHEAP
Timur Tabibc556ba2008-01-08 10:30:58 -0600300 select CRC32
Kumar Gala98750262007-04-12 18:01:34 -0500301 help
302 The QUICC Engine (QE) is a new generation of communications
303 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
304 Selecting this option means that you wish to build a kernel
305 for a machine with a QE coprocessor.
306
Anton Vorontsov5c091192008-10-03 23:40:36 +0400307config QE_GPIO
308 bool "QE GPIO support"
309 depends on QUICC_ENGINE
Anton Vorontsov5c091192008-10-03 23:40:36 +0400310 select ARCH_REQUIRE_GPIOLIB
311 help
312 Say Y here if you're going to use hardware that connects to the
313 QE GPIOs.
314
Kumar Galad6071f82007-04-12 16:53:32 -0500315config CPM2
Paul Gortmakerb8b3caf2008-01-24 18:41:25 -0500316 bool "Enable support for the CPM2 (Communications Processor Module)"
Kumar Gala5753c082009-10-16 18:31:48 -0500317 depends on (FSL_SOC_BOOKE && PPC32) || 8260
Scott Woodc374e002007-07-16 11:43:43 -0500318 select CPM
Sylvain Munaut1088a202007-09-16 20:53:25 +1000319 select PPC_LIB_RHEAP
John Rigbyb5005632008-06-26 11:07:56 -0600320 select PPC_PCI_CHOICE
Laurent Pincharte1933252008-07-28 10:43:22 +0200321 select ARCH_REQUIRE_GPIOLIB
Kumar Galad6071f82007-04-12 16:53:32 -0500322 help
323 The CPM2 (Communications Processor Module) is a coprocessor on
324 embedded CPUs made by Freescale. Selecting this option means that
325 you wish to build a kernel for a machine with a CPM2 coprocessor
326 on it (826x, 827x, 8560).
327
Maxim Shchetynindbdf04c2007-07-20 21:39:26 +0200328config AXON_RAM
329 tristate "Axon DDR2 memory device driver"
Michael Ellermanebf0f332009-03-12 02:16:27 +0000330 depends on PPC_IBM_CELL_BLADE && BLOCK
Maxim Shchetynindbdf04c2007-07-20 21:39:26 +0200331 default m
332 help
333 It registers one block device per Axon's DDR2 memory bank found
334 on a system. Block devices are called axonram?, their major and
335 minor numbers are available in /proc/devices, /proc/partitions or
336 in /sys/block/axonram?/dev.
337
Kumar Galab66510c2007-08-16 23:55:55 -0500338config FSL_ULI1575
339 bool
340 default n
Kumar Galafb4f0e82007-09-10 14:57:34 -0500341 select GENERIC_ISA_DMA
Kumar Galab66510c2007-08-16 23:55:55 -0500342 help
343 Supports for the ULI1575 PCIe south bridge that exists on some
344 Freescale reference boards. The boards all use the ULI in pretty
345 much the same way.
346
Scott Woodc374e002007-07-16 11:43:43 -0500347config CPM
348 bool
349
David Gibson22258fa2008-01-11 14:25:34 +1100350config OF_RTC
351 bool
352 help
Matt LaPlante692105b2009-01-26 11:12:25 +0100353 Uses information from the OF or flattened device tree to instantiate
David Gibson22258fa2008-01-11 14:25:34 +1100354 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
355
Anton Vorontsov3d64de92008-12-18 19:37:26 +0300356config SIMPLE_GPIO
357 bool "Support for simple, memory-mapped GPIO controllers"
358 depends on PPC
Anton Vorontsov3d64de92008-12-18 19:37:26 +0300359 select ARCH_REQUIRE_GPIOLIB
360 help
361 Say Y here to support simple, memory-mapped GPIO controllers.
362 These are usually BCSRs used to control board's switches, LEDs,
363 chip-selects, Ethernet/USB PHY's power and various other small
364 on-board peripherals.
365
Anton Vorontsovea0105e2009-01-11 19:55:39 +0300366config MCU_MPC8349EMITX
Fabio Baltieri6ca6ca52011-08-15 16:19:30 +0200367 bool "MPC8349E-mITX MCU driver"
Al Viro82640a62011-11-08 21:10:29 -0500368 depends on I2C=y && PPC_83xx
Anton Vorontsovea0105e2009-01-11 19:55:39 +0300369 select ARCH_REQUIRE_GPIOLIB
370 help
371 Say Y here to enable soft power-off functionality on the Freescale
372 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
373 also register MCU GPIOs with the generic GPIO API, so you'll able
374 to use MCU pins as GPIOs.
375
Roderick Colenbrander64f16502009-06-06 10:14:22 -0600376config XILINX_PCI
377 bool "Xilinx PCI host bridge support"
378 depends on PCI && XILINX_VIRTEX
379
Kumar Gala4330f5d2007-03-16 09:32:17 -0500380endmenu