blob: d6e21f1a70a9dc685aa8dfc786230ad620022691 [file] [log] [blame]
Rabin Vincentd88b25b2010-05-10 23:43:47 +02001/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
7 */
8
Rabin Vincentd88b25b2010-05-10 23:43:47 +02009#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
Linus Walleijcee1b402016-04-05 15:09:09 +020012#include <linux/gpio/driver.h>
Lee Jones3113e672012-09-07 12:14:59 +010013#include <linux/of.h>
Rabin Vincentd88b25b2010-05-10 23:43:47 +020014#include <linux/interrupt.h>
Sundar Iyerc6eda6c2010-12-13 09:33:12 +053015#include <linux/mfd/tc3589x.h>
Linus Walleijcee1b402016-04-05 15:09:09 +020016#include <linux/bitops.h>
Rabin Vincentd88b25b2010-05-10 23:43:47 +020017
18/*
19 * These registers are modified under the irq bus lock and cached to avoid
20 * unnecessary writes in bus_sync_unlock.
21 */
22enum { REG_IBE, REG_IEV, REG_IS, REG_IE };
23
24#define CACHE_NR_REGS 4
25#define CACHE_NR_BANKS 3
26
Sundar Iyer20406eb2010-12-13 09:33:14 +053027struct tc3589x_gpio {
Rabin Vincentd88b25b2010-05-10 23:43:47 +020028 struct gpio_chip chip;
Sundar Iyer20406eb2010-12-13 09:33:14 +053029 struct tc3589x *tc3589x;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020030 struct device *dev;
31 struct mutex irq_lock;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020032 /* Caches of interrupt control registers for bus_lock */
33 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
34 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
35};
36
Linus Walleij0e4011e2016-09-19 10:14:29 +020037static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned int offset)
Rabin Vincentd88b25b2010-05-10 23:43:47 +020038{
Linus Walleijb0d38472015-12-03 15:37:29 +010039 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
Sundar Iyer20406eb2010-12-13 09:33:14 +053040 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
41 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
Linus Walleijcee1b402016-04-05 15:09:09 +020042 u8 mask = BIT(offset % 8);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020043 int ret;
44
Sundar Iyer20406eb2010-12-13 09:33:14 +053045 ret = tc3589x_reg_read(tc3589x, reg);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020046 if (ret < 0)
47 return ret;
48
Linus Walleij27ca2262015-12-21 11:42:30 +010049 return !!(ret & mask);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020050}
51
Linus Walleij0e4011e2016-09-19 10:14:29 +020052static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned int offset, int val)
Rabin Vincentd88b25b2010-05-10 23:43:47 +020053{
Linus Walleijb0d38472015-12-03 15:37:29 +010054 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
Sundar Iyer20406eb2010-12-13 09:33:14 +053055 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
56 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
Linus Walleij0e4011e2016-09-19 10:14:29 +020057 unsigned int pos = offset % 8;
Linus Walleijcee1b402016-04-05 15:09:09 +020058 u8 data[] = {val ? BIT(pos) : 0, BIT(pos)};
Rabin Vincentd88b25b2010-05-10 23:43:47 +020059
Sundar Iyer20406eb2010-12-13 09:33:14 +053060 tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020061}
62
Sundar Iyer20406eb2010-12-13 09:33:14 +053063static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
Linus Walleij0e4011e2016-09-19 10:14:29 +020064 unsigned int offset, int val)
Rabin Vincentd88b25b2010-05-10 23:43:47 +020065{
Linus Walleijb0d38472015-12-03 15:37:29 +010066 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
Sundar Iyer20406eb2010-12-13 09:33:14 +053067 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
68 u8 reg = TC3589x_GPIODIR0 + offset / 8;
Linus Walleij0e4011e2016-09-19 10:14:29 +020069 unsigned int pos = offset % 8;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020070
Sundar Iyer20406eb2010-12-13 09:33:14 +053071 tc3589x_gpio_set(chip, offset, val);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020072
Linus Walleijcee1b402016-04-05 15:09:09 +020073 return tc3589x_set_bits(tc3589x, reg, BIT(pos), BIT(pos));
Rabin Vincentd88b25b2010-05-10 23:43:47 +020074}
75
Sundar Iyer20406eb2010-12-13 09:33:14 +053076static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
Linus Walleij0e4011e2016-09-19 10:14:29 +020077 unsigned int offset)
Rabin Vincentd88b25b2010-05-10 23:43:47 +020078{
Linus Walleijb0d38472015-12-03 15:37:29 +010079 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
Sundar Iyer20406eb2010-12-13 09:33:14 +053080 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
81 u8 reg = TC3589x_GPIODIR0 + offset / 8;
Linus Walleij0e4011e2016-09-19 10:14:29 +020082 unsigned int pos = offset % 8;
Rabin Vincentd88b25b2010-05-10 23:43:47 +020083
Linus Walleijcee1b402016-04-05 15:09:09 +020084 return tc3589x_set_bits(tc3589x, reg, BIT(pos), 0);
Rabin Vincentd88b25b2010-05-10 23:43:47 +020085}
86
Linus Walleij14063d72016-09-19 10:08:56 +020087static int tc3589x_gpio_get_direction(struct gpio_chip *chip,
Linus Walleij0e4011e2016-09-19 10:14:29 +020088 unsigned int offset)
Linus Walleij14063d72016-09-19 10:08:56 +020089{
90 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
91 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
92 u8 reg = TC3589x_GPIODIR0 + offset / 8;
Linus Walleij0e4011e2016-09-19 10:14:29 +020093 unsigned int pos = offset % 8;
Linus Walleij14063d72016-09-19 10:08:56 +020094 int ret;
95
96 ret = tc3589x_reg_read(tc3589x, reg);
97 if (ret < 0)
98 return ret;
99
Linus Walleij220a04f2016-11-14 15:10:29 +0100100 return !(ret & BIT(pos));
Linus Walleij14063d72016-09-19 10:08:56 +0200101}
102
103static int tc3589x_gpio_set_single_ended(struct gpio_chip *chip,
Linus Walleij0e4011e2016-09-19 10:14:29 +0200104 unsigned int offset,
Linus Walleij14063d72016-09-19 10:08:56 +0200105 enum single_ended_mode mode)
Linus Walleij8b866b02016-04-05 15:11:11 +0200106{
107 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
108 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
109 /*
110 * These registers are alterated at each second address
111 * ODM bit 0 = drive to GND or Hi-Z (open drain)
112 * ODM bit 1 = drive to VDD or Hi-Z (open source)
113 */
114 u8 odmreg = TC3589x_GPIOODM0 + (offset / 8) * 2;
115 u8 odereg = TC3589x_GPIOODE0 + (offset / 8) * 2;
Linus Walleij0e4011e2016-09-19 10:14:29 +0200116 unsigned int pos = offset % 8;
Linus Walleij8b866b02016-04-05 15:11:11 +0200117 int ret;
118
119 switch(mode) {
120 case LINE_MODE_OPEN_DRAIN:
121 /* Set open drain mode */
122 ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), 0);
123 if (ret)
124 return ret;
125 /* Enable open drain/source mode */
126 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos));
127 case LINE_MODE_OPEN_SOURCE:
128 /* Set open source mode */
129 ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), BIT(pos));
130 if (ret)
131 return ret;
132 /* Enable open drain/source mode */
133 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos));
134 case LINE_MODE_PUSH_PULL:
135 /* Disable open drain/source mode */
136 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), 0);
137 default:
138 break;
139 }
140 return -ENOTSUPP;
141}
142
Julia Lawalle35b5ab2016-09-11 14:14:37 +0200143static const struct gpio_chip template_chip = {
Sundar Iyer20406eb2010-12-13 09:33:14 +0530144 .label = "tc3589x",
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200145 .owner = THIS_MODULE,
Sundar Iyer20406eb2010-12-13 09:33:14 +0530146 .get = tc3589x_gpio_get,
Sundar Iyer20406eb2010-12-13 09:33:14 +0530147 .set = tc3589x_gpio_set,
Linus Walleij14063d72016-09-19 10:08:56 +0200148 .direction_output = tc3589x_gpio_direction_output,
149 .direction_input = tc3589x_gpio_direction_input,
150 .get_direction = tc3589x_gpio_get_direction,
151 .set_single_ended = tc3589x_gpio_set_single_ended,
Linus Walleij9fb1f392013-12-04 14:42:46 +0100152 .can_sleep = true,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200153};
154
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800155static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200156{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200157 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100158 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Lee Jonesefe4c942012-09-07 12:14:58 +0100159 int offset = d->hwirq;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200160 int regoffset = offset / 8;
Linus Walleijcee1b402016-04-05 15:09:09 +0200161 int mask = BIT(offset % 8);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200162
163 if (type == IRQ_TYPE_EDGE_BOTH) {
Sundar Iyer20406eb2010-12-13 09:33:14 +0530164 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200165 return 0;
166 }
167
Sundar Iyer20406eb2010-12-13 09:33:14 +0530168 tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200169
170 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
Sundar Iyer20406eb2010-12-13 09:33:14 +0530171 tc3589x_gpio->regs[REG_IS][regoffset] |= mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200172 else
Sundar Iyer20406eb2010-12-13 09:33:14 +0530173 tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200174
175 if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)
Sundar Iyer20406eb2010-12-13 09:33:14 +0530176 tc3589x_gpio->regs[REG_IEV][regoffset] |= mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200177 else
Sundar Iyer20406eb2010-12-13 09:33:14 +0530178 tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200179
180 return 0;
181}
182
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800183static void tc3589x_gpio_irq_lock(struct irq_data *d)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200184{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200185 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100186 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200187
Sundar Iyer20406eb2010-12-13 09:33:14 +0530188 mutex_lock(&tc3589x_gpio->irq_lock);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200189}
190
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800191static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200192{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200193 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100194 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Sundar Iyer20406eb2010-12-13 09:33:14 +0530195 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200196 static const u8 regmap[] = {
Sundar Iyer20406eb2010-12-13 09:33:14 +0530197 [REG_IBE] = TC3589x_GPIOIBE0,
198 [REG_IEV] = TC3589x_GPIOIEV0,
199 [REG_IS] = TC3589x_GPIOIS0,
200 [REG_IE] = TC3589x_GPIOIE0,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200201 };
202 int i, j;
203
204 for (i = 0; i < CACHE_NR_REGS; i++) {
205 for (j = 0; j < CACHE_NR_BANKS; j++) {
Sundar Iyer20406eb2010-12-13 09:33:14 +0530206 u8 old = tc3589x_gpio->oldregs[i][j];
207 u8 new = tc3589x_gpio->regs[i][j];
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200208
209 if (new == old)
210 continue;
211
Sundar Iyer20406eb2010-12-13 09:33:14 +0530212 tc3589x_gpio->oldregs[i][j] = new;
213 tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200214 }
215 }
216
Sundar Iyer20406eb2010-12-13 09:33:14 +0530217 mutex_unlock(&tc3589x_gpio->irq_lock);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200218}
219
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800220static void tc3589x_gpio_irq_mask(struct irq_data *d)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200221{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200222 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100223 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Lee Jonesefe4c942012-09-07 12:14:58 +0100224 int offset = d->hwirq;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200225 int regoffset = offset / 8;
Linus Walleijcee1b402016-04-05 15:09:09 +0200226 int mask = BIT(offset % 8);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200227
Sundar Iyer20406eb2010-12-13 09:33:14 +0530228 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200229}
230
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800231static void tc3589x_gpio_irq_unmask(struct irq_data *d)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200232{
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200233 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
Linus Walleijb0d38472015-12-03 15:37:29 +0100234 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
Lee Jonesefe4c942012-09-07 12:14:58 +0100235 int offset = d->hwirq;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200236 int regoffset = offset / 8;
Linus Walleijcee1b402016-04-05 15:09:09 +0200237 int mask = BIT(offset % 8);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200238
Sundar Iyer20406eb2010-12-13 09:33:14 +0530239 tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200240}
241
Sundar Iyer20406eb2010-12-13 09:33:14 +0530242static struct irq_chip tc3589x_gpio_irq_chip = {
243 .name = "tc3589x-gpio",
Lennert Buytenhek33fcc1b2011-01-12 17:00:19 -0800244 .irq_bus_lock = tc3589x_gpio_irq_lock,
245 .irq_bus_sync_unlock = tc3589x_gpio_irq_sync_unlock,
246 .irq_mask = tc3589x_gpio_irq_mask,
247 .irq_unmask = tc3589x_gpio_irq_unmask,
248 .irq_set_type = tc3589x_gpio_irq_set_type,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200249};
250
Sundar Iyer20406eb2010-12-13 09:33:14 +0530251static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200252{
Sundar Iyer20406eb2010-12-13 09:33:14 +0530253 struct tc3589x_gpio *tc3589x_gpio = dev;
254 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200255 u8 status[CACHE_NR_BANKS];
256 int ret;
257 int i;
258
Sundar Iyer20406eb2010-12-13 09:33:14 +0530259 ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200260 ARRAY_SIZE(status), status);
261 if (ret < 0)
262 return IRQ_NONE;
263
264 for (i = 0; i < ARRAY_SIZE(status); i++) {
265 unsigned int stat = status[i];
266 if (!stat)
267 continue;
268
269 while (stat) {
270 int bit = __ffs(stat);
271 int line = i * 8 + bit;
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200272 int irq = irq_find_mapping(tc3589x_gpio->chip.irqdomain,
273 line);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200274
Linus Walleije3003762013-10-11 19:06:12 +0200275 handle_nested_irq(irq);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200276 stat &= ~(1 << bit);
277 }
278
Sundar Iyer20406eb2010-12-13 09:33:14 +0530279 tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200280 }
281
282 return IRQ_HANDLED;
283}
284
Bill Pemberton38363092012-11-19 13:22:34 -0500285static int tc3589x_gpio_probe(struct platform_device *pdev)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200286{
Sundar Iyer20406eb2010-12-13 09:33:14 +0530287 struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
Lee Jones3113e672012-09-07 12:14:59 +0100288 struct device_node *np = pdev->dev.of_node;
Sundar Iyer20406eb2010-12-13 09:33:14 +0530289 struct tc3589x_gpio *tc3589x_gpio;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200290 int ret;
291 int irq;
292
Linus Walleij53e41f52014-12-15 10:39:47 +0100293 if (!np) {
294 dev_err(&pdev->dev, "No Device Tree node found\n");
Lee Jones3113e672012-09-07 12:14:59 +0100295 return -EINVAL;
296 }
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200297
298 irq = platform_get_irq(pdev, 0);
299 if (irq < 0)
300 return irq;
301
Linus Walleij033f2752014-04-09 12:38:56 +0200302 tc3589x_gpio = devm_kzalloc(&pdev->dev, sizeof(struct tc3589x_gpio),
303 GFP_KERNEL);
Sundar Iyer20406eb2010-12-13 09:33:14 +0530304 if (!tc3589x_gpio)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200305 return -ENOMEM;
306
Sundar Iyer20406eb2010-12-13 09:33:14 +0530307 mutex_init(&tc3589x_gpio->irq_lock);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200308
Sundar Iyer20406eb2010-12-13 09:33:14 +0530309 tc3589x_gpio->dev = &pdev->dev;
310 tc3589x_gpio->tc3589x = tc3589x;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200311
Sundar Iyer20406eb2010-12-13 09:33:14 +0530312 tc3589x_gpio->chip = template_chip;
313 tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
Linus Walleij58383c72015-11-04 09:56:26 +0100314 tc3589x_gpio->chip.parent = &pdev->dev;
Linus Walleij90f2d0f2014-10-28 11:06:56 +0100315 tc3589x_gpio->chip.base = -1;
Laurent Navete90c6362013-03-20 13:16:02 +0100316 tc3589x_gpio->chip.of_node = np;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200317
318 /* Bring the GPIO module out of reset */
Sundar Iyer20406eb2010-12-13 09:33:14 +0530319 ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL,
320 TC3589x_RSTCTRL_GPIRST, 0);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200321 if (ret < 0)
Linus Walleij033f2752014-04-09 12:38:56 +0200322 return ret;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200323
Linus Walleij033f2752014-04-09 12:38:56 +0200324 ret = devm_request_threaded_irq(&pdev->dev,
325 irq, NULL, tc3589x_gpio_irq,
326 IRQF_ONESHOT, "tc3589x-gpio",
327 tc3589x_gpio);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200328 if (ret) {
329 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
Linus Walleij033f2752014-04-09 12:38:56 +0200330 return ret;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200331 }
332
Laxman Dewanganf3378b62016-02-22 17:43:28 +0530333 ret = devm_gpiochip_add_data(&pdev->dev, &tc3589x_gpio->chip,
334 tc3589x_gpio);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200335 if (ret) {
336 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
Linus Walleij033f2752014-04-09 12:38:56 +0200337 return ret;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200338 }
339
Linus Walleijcf42f1c2014-04-09 13:38:33 +0200340 ret = gpiochip_irqchip_add(&tc3589x_gpio->chip,
341 &tc3589x_gpio_irq_chip,
342 0,
343 handle_simple_irq,
344 IRQ_TYPE_NONE);
345 if (ret) {
346 dev_err(&pdev->dev,
347 "could not connect irqchip to gpiochip\n");
348 return ret;
349 }
350
Linus Walleij3f97d5fc2014-09-26 14:19:52 +0200351 gpiochip_set_chained_irqchip(&tc3589x_gpio->chip,
352 &tc3589x_gpio_irq_chip,
353 irq,
354 NULL);
355
Sundar Iyer20406eb2010-12-13 09:33:14 +0530356 platform_set_drvdata(pdev, tc3589x_gpio);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200357
358 return 0;
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200359}
360
Sundar Iyer20406eb2010-12-13 09:33:14 +0530361static struct platform_driver tc3589x_gpio_driver = {
362 .driver.name = "tc3589x-gpio",
Sundar Iyer20406eb2010-12-13 09:33:14 +0530363 .probe = tc3589x_gpio_probe,
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200364};
365
Sundar Iyer20406eb2010-12-13 09:33:14 +0530366static int __init tc3589x_gpio_init(void)
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200367{
Sundar Iyer20406eb2010-12-13 09:33:14 +0530368 return platform_driver_register(&tc3589x_gpio_driver);
Rabin Vincentd88b25b2010-05-10 23:43:47 +0200369}
Sundar Iyer20406eb2010-12-13 09:33:14 +0530370subsys_initcall(tc3589x_gpio_init);