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Robin Gong3784b6d2013-07-25 11:33:18 +08001/*
2 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/err.h>
22#include <linux/of.h>
23#include <linux/of_device.h>
24#include <linux/regulator/of_regulator.h>
25#include <linux/platform_device.h>
26#include <linux/regulator/driver.h>
27#include <linux/regulator/machine.h>
28#include <linux/regulator/pfuze100.h>
29#include <linux/i2c.h>
30#include <linux/slab.h>
31#include <linux/regmap.h>
32
33#define PFUZE_NUMREGS 128
34#define PFUZE100_VOL_OFFSET 0
35#define PFUZE100_STANDBY_OFFSET 1
36#define PFUZE100_MODE_OFFSET 3
37#define PFUZE100_CONF_OFFSET 4
38
39#define PFUZE100_DEVICEID 0x0
40#define PFUZE100_REVID 0x3
Axel Lina1b6fa82013-12-09 15:24:19 +080041#define PFUZE100_FABID 0x4
Robin Gong3784b6d2013-07-25 11:33:18 +080042
43#define PFUZE100_SW1ABVOL 0x20
44#define PFUZE100_SW1CVOL 0x2e
45#define PFUZE100_SW2VOL 0x35
46#define PFUZE100_SW3AVOL 0x3c
47#define PFUZE100_SW3BVOL 0x43
48#define PFUZE100_SW4VOL 0x4a
49#define PFUZE100_SWBSTCON1 0x66
50#define PFUZE100_VREFDDRCON 0x6a
51#define PFUZE100_VSNVSVOL 0x6b
52#define PFUZE100_VGEN1VOL 0x6c
53#define PFUZE100_VGEN2VOL 0x6d
54#define PFUZE100_VGEN3VOL 0x6e
55#define PFUZE100_VGEN4VOL 0x6f
56#define PFUZE100_VGEN5VOL 0x70
57#define PFUZE100_VGEN6VOL 0x71
58
Robin Gonge5a7a722015-01-09 09:57:33 +080059enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
Robin Gongf2518482014-03-04 17:40:36 +080060
Robin Gong3784b6d2013-07-25 11:33:18 +080061struct pfuze_regulator {
62 struct regulator_desc desc;
63 unsigned char stby_reg;
64 unsigned char stby_mask;
65};
66
67struct pfuze_chip {
Robin Gongf2518482014-03-04 17:40:36 +080068 int chip_id;
Robin Gong3784b6d2013-07-25 11:33:18 +080069 struct regmap *regmap;
70 struct device *dev;
71 struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
72 struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
Fabio Estevam12425652016-06-05 19:17:38 -030073 struct pfuze_regulator *pfuze_regulators;
Robin Gong3784b6d2013-07-25 11:33:18 +080074};
75
76static const int pfuze100_swbst[] = {
77 5000000, 5050000, 5100000, 5150000,
78};
79
80static const int pfuze100_vsnvs[] = {
81 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
82};
83
Robin Gonge5a7a722015-01-09 09:57:33 +080084static const int pfuze3000_sw2lo[] = {
85 1500000, 1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000,
86};
87
88static const int pfuze3000_sw2hi[] = {
89 2500000, 2800000, 2850000, 3000000, 3100000, 3150000, 3200000, 3300000,
90};
91
Robin Gong3784b6d2013-07-25 11:33:18 +080092static const struct i2c_device_id pfuze_device_id[] = {
Robin Gongf2518482014-03-04 17:40:36 +080093 {.name = "pfuze100", .driver_data = PFUZE100},
94 {.name = "pfuze200", .driver_data = PFUZE200},
Robin Gonge5a7a722015-01-09 09:57:33 +080095 {.name = "pfuze3000", .driver_data = PFUZE3000},
Axel Line6c4c332014-03-04 18:20:14 +080096 { }
Robin Gong3784b6d2013-07-25 11:33:18 +080097};
98MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
99
100static const struct of_device_id pfuze_dt_ids[] = {
Robin Gongf2518482014-03-04 17:40:36 +0800101 { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
102 { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
Robin Gonge5a7a722015-01-09 09:57:33 +0800103 { .compatible = "fsl,pfuze3000", .data = (void *)PFUZE3000},
Axel Line6c4c332014-03-04 18:20:14 +0800104 { }
Robin Gong3784b6d2013-07-25 11:33:18 +0800105};
106MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
107
108static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
109{
110 struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
Thiago Farinad55efa42014-01-26 21:57:12 -0200111 int id = rdev_get_id(rdev);
Axel Line5656662013-07-30 22:47:44 +0800112 unsigned int ramp_bits;
Robin Gong3784b6d2013-07-25 11:33:18 +0800113 int ret;
114
115 if (id < PFUZE100_SWBST) {
Axel Line5656662013-07-30 22:47:44 +0800116 ramp_delay = 12500 / ramp_delay;
Robin Gong3784b6d2013-07-25 11:33:18 +0800117 ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
Axel Line5656662013-07-30 22:47:44 +0800118 ret = regmap_update_bits(pfuze100->regmap,
119 rdev->desc->vsel_reg + 4,
120 0xc0, ramp_bits << 6);
Robin Gong3784b6d2013-07-25 11:33:18 +0800121 if (ret < 0)
122 dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
123 } else
124 ret = -EACCES;
125
126 return ret;
127}
128
129static struct regulator_ops pfuze100_ldo_regulator_ops = {
130 .enable = regulator_enable_regmap,
131 .disable = regulator_disable_regmap,
132 .is_enabled = regulator_is_enabled_regmap,
133 .list_voltage = regulator_list_voltage_linear,
134 .set_voltage_sel = regulator_set_voltage_sel_regmap,
135 .get_voltage_sel = regulator_get_voltage_sel_regmap,
136};
137
138static struct regulator_ops pfuze100_fixed_regulator_ops = {
Axel Linab3ca774a2014-05-26 17:56:13 +0800139 .enable = regulator_enable_regmap,
140 .disable = regulator_disable_regmap,
141 .is_enabled = regulator_is_enabled_regmap,
Robin Gong3784b6d2013-07-25 11:33:18 +0800142 .list_voltage = regulator_list_voltage_linear,
143};
144
145static struct regulator_ops pfuze100_sw_regulator_ops = {
146 .list_voltage = regulator_list_voltage_linear,
147 .set_voltage_sel = regulator_set_voltage_sel_regmap,
148 .get_voltage_sel = regulator_get_voltage_sel_regmap,
149 .set_voltage_time_sel = regulator_set_voltage_time_sel,
150 .set_ramp_delay = pfuze100_set_ramp_delay,
151};
152
153static struct regulator_ops pfuze100_swb_regulator_ops = {
Sean Crossa6dcf972014-05-26 16:45:40 +0800154 .enable = regulator_enable_regmap,
155 .disable = regulator_disable_regmap,
Anson Huang211c2bc2018-05-17 15:27:22 +0800156 .is_enabled = regulator_is_enabled_regmap,
Robin Gong3784b6d2013-07-25 11:33:18 +0800157 .list_voltage = regulator_list_voltage_table,
Axel Lin2e04cc42013-07-29 15:38:58 +0800158 .map_voltage = regulator_map_voltage_ascend,
Robin Gong3784b6d2013-07-25 11:33:18 +0800159 .set_voltage_sel = regulator_set_voltage_sel_regmap,
160 .get_voltage_sel = regulator_get_voltage_sel_regmap,
161
162};
163
Robin Gongf2518482014-03-04 17:40:36 +0800164#define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
165 [_chip ## _ ## _name] = { \
Robin Gong3784b6d2013-07-25 11:33:18 +0800166 .desc = { \
167 .name = #_name, \
168 .n_voltages = 1, \
169 .ops = &pfuze100_fixed_regulator_ops, \
170 .type = REGULATOR_VOLTAGE, \
Robin Gongf2518482014-03-04 17:40:36 +0800171 .id = _chip ## _ ## _name, \
Robin Gong3784b6d2013-07-25 11:33:18 +0800172 .owner = THIS_MODULE, \
173 .min_uV = (voltage), \
174 .enable_reg = (base), \
175 .enable_mask = 0x10, \
176 }, \
177 }
178
Robin Gongf2518482014-03-04 17:40:36 +0800179#define PFUZE100_SW_REG(_chip, _name, base, min, max, step) \
180 [_chip ## _ ## _name] = { \
Robin Gong3784b6d2013-07-25 11:33:18 +0800181 .desc = { \
182 .name = #_name,\
183 .n_voltages = ((max) - (min)) / (step) + 1, \
184 .ops = &pfuze100_sw_regulator_ops, \
185 .type = REGULATOR_VOLTAGE, \
Robin Gongf2518482014-03-04 17:40:36 +0800186 .id = _chip ## _ ## _name, \
Robin Gong3784b6d2013-07-25 11:33:18 +0800187 .owner = THIS_MODULE, \
188 .min_uV = (min), \
189 .uV_step = (step), \
190 .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
191 .vsel_mask = 0x3f, \
192 }, \
193 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \
194 .stby_mask = 0x3f, \
195 }
196
Robin Gongf2518482014-03-04 17:40:36 +0800197#define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages) \
198 [_chip ## _ ## _name] = { \
Robin Gong3784b6d2013-07-25 11:33:18 +0800199 .desc = { \
200 .name = #_name, \
201 .n_voltages = ARRAY_SIZE(voltages), \
202 .ops = &pfuze100_swb_regulator_ops, \
203 .type = REGULATOR_VOLTAGE, \
Robin Gongf2518482014-03-04 17:40:36 +0800204 .id = _chip ## _ ## _name, \
Robin Gong3784b6d2013-07-25 11:33:18 +0800205 .owner = THIS_MODULE, \
206 .volt_table = voltages, \
207 .vsel_reg = (base), \
208 .vsel_mask = (mask), \
Sean Crossa6dcf972014-05-26 16:45:40 +0800209 .enable_reg = (base), \
210 .enable_mask = 0x48, \
Robin Gong3784b6d2013-07-25 11:33:18 +0800211 }, \
212 }
213
Robin Gongf2518482014-03-04 17:40:36 +0800214#define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step) \
215 [_chip ## _ ## _name] = { \
Robin Gong3784b6d2013-07-25 11:33:18 +0800216 .desc = { \
217 .name = #_name, \
218 .n_voltages = ((max) - (min)) / (step) + 1, \
219 .ops = &pfuze100_ldo_regulator_ops, \
220 .type = REGULATOR_VOLTAGE, \
Robin Gongf2518482014-03-04 17:40:36 +0800221 .id = _chip ## _ ## _name, \
Robin Gong3784b6d2013-07-25 11:33:18 +0800222 .owner = THIS_MODULE, \
223 .min_uV = (min), \
224 .uV_step = (step), \
225 .vsel_reg = (base), \
226 .vsel_mask = 0xf, \
227 .enable_reg = (base), \
228 .enable_mask = 0x10, \
229 }, \
230 .stby_reg = (base), \
231 .stby_mask = 0x20, \
232 }
233
Robin Gonge5a7a722015-01-09 09:57:33 +0800234#define PFUZE3000_VCC_REG(_chip, _name, base, min, max, step) { \
235 .desc = { \
236 .name = #_name, \
237 .n_voltages = ((max) - (min)) / (step) + 1, \
238 .ops = &pfuze100_ldo_regulator_ops, \
239 .type = REGULATOR_VOLTAGE, \
240 .id = _chip ## _ ## _name, \
241 .owner = THIS_MODULE, \
242 .min_uV = (min), \
243 .uV_step = (step), \
244 .vsel_reg = (base), \
245 .vsel_mask = 0x3, \
246 .enable_reg = (base), \
247 .enable_mask = 0x10, \
248 }, \
249 .stby_reg = (base), \
250 .stby_mask = 0x20, \
251}
252
253
254#define PFUZE3000_SW2_REG(_chip, _name, base, min, max, step) { \
255 .desc = { \
256 .name = #_name,\
257 .n_voltages = ((max) - (min)) / (step) + 1, \
258 .ops = &pfuze100_sw_regulator_ops, \
259 .type = REGULATOR_VOLTAGE, \
260 .id = _chip ## _ ## _name, \
261 .owner = THIS_MODULE, \
262 .min_uV = (min), \
263 .uV_step = (step), \
264 .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
265 .vsel_mask = 0x7, \
266 }, \
267 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \
268 .stby_mask = 0x7, \
269}
270
271#define PFUZE3000_SW3_REG(_chip, _name, base, min, max, step) { \
272 .desc = { \
273 .name = #_name,\
274 .n_voltages = ((max) - (min)) / (step) + 1, \
275 .ops = &pfuze100_sw_regulator_ops, \
276 .type = REGULATOR_VOLTAGE, \
277 .id = _chip ## _ ## _name, \
278 .owner = THIS_MODULE, \
279 .min_uV = (min), \
280 .uV_step = (step), \
281 .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
282 .vsel_mask = 0xf, \
283 }, \
284 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \
285 .stby_mask = 0xf, \
286}
287
Robin Gongf2518482014-03-04 17:40:36 +0800288/* PFUZE100 */
Robin Gong3784b6d2013-07-25 11:33:18 +0800289static struct pfuze_regulator pfuze100_regulators[] = {
Robin Gongf2518482014-03-04 17:40:36 +0800290 PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
291 PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
292 PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
293 PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
294 PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
295 PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
296 PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
297 PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
298 PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
299 PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
300 PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
301 PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
302 PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
303 PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
304 PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
Robin Gong3784b6d2013-07-25 11:33:18 +0800305};
306
Robin Gongf2518482014-03-04 17:40:36 +0800307static struct pfuze_regulator pfuze200_regulators[] = {
308 PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
309 PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
310 PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
311 PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
312 PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
313 PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
314 PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
315 PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
316 PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
317 PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
318 PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
319 PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
320 PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
321};
322
Robin Gonge5a7a722015-01-09 09:57:33 +0800323static struct pfuze_regulator pfuze3000_regulators[] = {
324 PFUZE100_SW_REG(PFUZE3000, SW1A, PFUZE100_SW1ABVOL, 700000, 1475000, 25000),
325 PFUZE100_SW_REG(PFUZE3000, SW1B, PFUZE100_SW1CVOL, 700000, 1475000, 25000),
326 PFUZE100_SWB_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
327 PFUZE3000_SW3_REG(PFUZE3000, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000),
328 PFUZE100_SWB_REG(PFUZE3000, SWBST, PFUZE100_SWBSTCON1, 0x3, pfuze100_swbst),
329 PFUZE100_SWB_REG(PFUZE3000, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
330 PFUZE100_FIXED_REG(PFUZE3000, VREFDDR, PFUZE100_VREFDDRCON, 750000),
331 PFUZE100_VGEN_REG(PFUZE3000, VLDO1, PFUZE100_VGEN1VOL, 1800000, 3300000, 100000),
332 PFUZE100_VGEN_REG(PFUZE3000, VLDO2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
333 PFUZE3000_VCC_REG(PFUZE3000, VCCSD, PFUZE100_VGEN3VOL, 2850000, 3300000, 150000),
334 PFUZE3000_VCC_REG(PFUZE3000, V33, PFUZE100_VGEN4VOL, 2850000, 3300000, 150000),
335 PFUZE100_VGEN_REG(PFUZE3000, VLDO3, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
336 PFUZE100_VGEN_REG(PFUZE3000, VLDO4, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
337};
338
Robin Gong3784b6d2013-07-25 11:33:18 +0800339#ifdef CONFIG_OF
Robin Gongf2518482014-03-04 17:40:36 +0800340/* PFUZE100 */
Robin Gong3784b6d2013-07-25 11:33:18 +0800341static struct of_regulator_match pfuze100_matches[] = {
342 { .name = "sw1ab", },
343 { .name = "sw1c", },
344 { .name = "sw2", },
345 { .name = "sw3a", },
346 { .name = "sw3b", },
347 { .name = "sw4", },
348 { .name = "swbst", },
349 { .name = "vsnvs", },
350 { .name = "vrefddr", },
351 { .name = "vgen1", },
352 { .name = "vgen2", },
353 { .name = "vgen3", },
354 { .name = "vgen4", },
355 { .name = "vgen5", },
356 { .name = "vgen6", },
357};
358
Robin Gongf2518482014-03-04 17:40:36 +0800359/* PFUZE200 */
360static struct of_regulator_match pfuze200_matches[] = {
361
362 { .name = "sw1ab", },
363 { .name = "sw2", },
364 { .name = "sw3a", },
365 { .name = "sw3b", },
366 { .name = "swbst", },
367 { .name = "vsnvs", },
368 { .name = "vrefddr", },
369 { .name = "vgen1", },
370 { .name = "vgen2", },
371 { .name = "vgen3", },
372 { .name = "vgen4", },
373 { .name = "vgen5", },
374 { .name = "vgen6", },
375};
376
Robin Gonge5a7a722015-01-09 09:57:33 +0800377/* PFUZE3000 */
378static struct of_regulator_match pfuze3000_matches[] = {
379
380 { .name = "sw1a", },
381 { .name = "sw1b", },
382 { .name = "sw2", },
383 { .name = "sw3", },
384 { .name = "swbst", },
385 { .name = "vsnvs", },
386 { .name = "vrefddr", },
387 { .name = "vldo1", },
388 { .name = "vldo2", },
389 { .name = "vccsd", },
390 { .name = "v33", },
391 { .name = "vldo3", },
392 { .name = "vldo4", },
393};
394
Robin Gongf2518482014-03-04 17:40:36 +0800395static struct of_regulator_match *pfuze_matches;
396
Robin Gong3784b6d2013-07-25 11:33:18 +0800397static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
398{
399 struct device *dev = chip->dev;
400 struct device_node *np, *parent;
401 int ret;
402
Fabio Estevam3e01c752014-02-18 23:46:14 -0300403 np = of_node_get(dev->of_node);
Robin Gong3784b6d2013-07-25 11:33:18 +0800404 if (!np)
Fabio Estevam64287892014-02-20 13:47:02 -0300405 return -EINVAL;
Robin Gong3784b6d2013-07-25 11:33:18 +0800406
Sachin Kamatd7857c42014-02-14 17:20:00 +0530407 parent = of_get_child_by_name(np, "regulators");
Robin Gong3784b6d2013-07-25 11:33:18 +0800408 if (!parent) {
409 dev_err(dev, "regulators node not found\n");
410 return -EINVAL;
411 }
412
Robin Gongf2518482014-03-04 17:40:36 +0800413 switch (chip->chip_id) {
Robin Gonge5a7a722015-01-09 09:57:33 +0800414 case PFUZE3000:
415 pfuze_matches = pfuze3000_matches;
416 ret = of_regulator_match(dev, parent, pfuze3000_matches,
417 ARRAY_SIZE(pfuze3000_matches));
418 break;
Robin Gongf2518482014-03-04 17:40:36 +0800419 case PFUZE200:
420 pfuze_matches = pfuze200_matches;
421 ret = of_regulator_match(dev, parent, pfuze200_matches,
422 ARRAY_SIZE(pfuze200_matches));
423 break;
424
425 case PFUZE100:
426 default:
427 pfuze_matches = pfuze100_matches;
428 ret = of_regulator_match(dev, parent, pfuze100_matches,
429 ARRAY_SIZE(pfuze100_matches));
430 break;
431 }
Robin Gong3784b6d2013-07-25 11:33:18 +0800432
433 of_node_put(parent);
434 if (ret < 0) {
435 dev_err(dev, "Error parsing regulator init data: %d\n",
436 ret);
437 return ret;
438 }
439
440 return 0;
441}
442
443static inline struct regulator_init_data *match_init_data(int index)
444{
Robin Gongf2518482014-03-04 17:40:36 +0800445 return pfuze_matches[index].init_data;
Robin Gong3784b6d2013-07-25 11:33:18 +0800446}
447
448static inline struct device_node *match_of_node(int index)
449{
Robin Gongf2518482014-03-04 17:40:36 +0800450 return pfuze_matches[index].of_node;
Robin Gong3784b6d2013-07-25 11:33:18 +0800451}
452#else
453static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
454{
Robin Gong205c97b2013-07-26 10:27:18 +0800455 return 0;
Robin Gong3784b6d2013-07-25 11:33:18 +0800456}
457
458static inline struct regulator_init_data *match_init_data(int index)
459{
460 return NULL;
461}
462
463static inline struct device_node *match_of_node(int index)
464{
465 return NULL;
466}
467#endif
468
469static int pfuze_identify(struct pfuze_chip *pfuze_chip)
470{
471 unsigned int value;
472 int ret;
473
474 ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
475 if (ret)
476 return ret;
477
Robin Gongf2518482014-03-04 17:40:36 +0800478 if (((value & 0x0f) == 0x8) && (pfuze_chip->chip_id == PFUZE100)) {
479 /*
480 * Freescale misprogrammed 1-3% of parts prior to week 8 of 2013
481 * as ID=8 in PFUZE100
482 */
Fabio Estevam62b38912014-01-15 00:52:45 -0200483 dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
Robin Gonge5a7a722015-01-09 09:57:33 +0800484 } else if ((value & 0x0f) != pfuze_chip->chip_id &&
485 (value & 0xf0) >> 4 != pfuze_chip->chip_id) {
Robin Gongf2518482014-03-04 17:40:36 +0800486 /* device id NOT match with your setting */
Robin Gong3784b6d2013-07-25 11:33:18 +0800487 dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
488 return -ENODEV;
489 }
490
491 ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
492 if (ret)
493 return ret;
494 dev_info(pfuze_chip->dev,
Fabio Estevamf2694382014-01-20 18:53:56 -0200495 "Full layer: %x, Metal layer: %x\n",
Robin Gong3784b6d2013-07-25 11:33:18 +0800496 (value & 0xf0) >> 4, value & 0x0f);
497
498 ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
499 if (ret)
500 return ret;
501 dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
502 (value & 0xc) >> 2, value & 0x3);
503
504 return 0;
505}
506
507static const struct regmap_config pfuze_regmap_config = {
508 .reg_bits = 8,
509 .val_bits = 8,
Axel Lin6b8430c2013-08-01 19:59:56 +0800510 .max_register = PFUZE_NUMREGS - 1,
Robin Gong3784b6d2013-07-25 11:33:18 +0800511 .cache_type = REGCACHE_RBTREE,
512};
513
514static int pfuze100_regulator_probe(struct i2c_client *client,
515 const struct i2c_device_id *id)
516{
517 struct pfuze_chip *pfuze_chip;
518 struct pfuze_regulator_platform_data *pdata =
519 dev_get_platdata(&client->dev);
520 struct regulator_config config = { };
521 int i, ret;
Robin Gongf2518482014-03-04 17:40:36 +0800522 const struct of_device_id *match;
523 u32 regulator_num;
Robin Gonge5a7a722015-01-09 09:57:33 +0800524 u32 sw_check_start, sw_check_end, sw_hi = 0x40;
Robin Gong3784b6d2013-07-25 11:33:18 +0800525
526 pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
527 GFP_KERNEL);
528 if (!pfuze_chip)
529 return -ENOMEM;
530
Robin Gongf2518482014-03-04 17:40:36 +0800531 if (client->dev.of_node) {
532 match = of_match_device(of_match_ptr(pfuze_dt_ids),
533 &client->dev);
534 if (!match) {
535 dev_err(&client->dev, "Error: No device match found\n");
536 return -ENODEV;
537 }
538 pfuze_chip->chip_id = (int)(long)match->data;
539 } else if (id) {
540 pfuze_chip->chip_id = id->driver_data;
541 } else {
542 dev_err(&client->dev, "No dts match or id table match found\n");
543 return -ENODEV;
544 }
545
Axel Lin8c86ab22013-07-29 12:09:12 +0800546 i2c_set_clientdata(client, pfuze_chip);
Robin Gong3784b6d2013-07-25 11:33:18 +0800547 pfuze_chip->dev = &client->dev;
548
549 pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
550 if (IS_ERR(pfuze_chip->regmap)) {
551 ret = PTR_ERR(pfuze_chip->regmap);
552 dev_err(&client->dev,
553 "regmap allocation failed with err %d\n", ret);
554 return ret;
555 }
556
557 ret = pfuze_identify(pfuze_chip);
558 if (ret) {
559 dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
560 return ret;
561 }
562
Robin Gongf2518482014-03-04 17:40:36 +0800563 /* use the right regulators after identify the right device */
564 switch (pfuze_chip->chip_id) {
Robin Gonge5a7a722015-01-09 09:57:33 +0800565 case PFUZE3000:
Fabio Estevam12425652016-06-05 19:17:38 -0300566 pfuze_chip->pfuze_regulators = pfuze3000_regulators;
Robin Gonge5a7a722015-01-09 09:57:33 +0800567 regulator_num = ARRAY_SIZE(pfuze3000_regulators);
568 sw_check_start = PFUZE3000_SW2;
569 sw_check_end = PFUZE3000_SW2;
570 sw_hi = 1 << 3;
571 break;
Robin Gongf2518482014-03-04 17:40:36 +0800572 case PFUZE200:
Fabio Estevam12425652016-06-05 19:17:38 -0300573 pfuze_chip->pfuze_regulators = pfuze200_regulators;
Robin Gongf2518482014-03-04 17:40:36 +0800574 regulator_num = ARRAY_SIZE(pfuze200_regulators);
575 sw_check_start = PFUZE200_SW2;
576 sw_check_end = PFUZE200_SW3B;
577 break;
Robin Gongf2518482014-03-04 17:40:36 +0800578 case PFUZE100:
579 default:
Fabio Estevam12425652016-06-05 19:17:38 -0300580 pfuze_chip->pfuze_regulators = pfuze100_regulators;
Robin Gongf2518482014-03-04 17:40:36 +0800581 regulator_num = ARRAY_SIZE(pfuze100_regulators);
582 sw_check_start = PFUZE100_SW2;
583 sw_check_end = PFUZE100_SW4;
584 break;
585 }
586 dev_info(&client->dev, "pfuze%s found.\n",
Robin Gonge5a7a722015-01-09 09:57:33 +0800587 (pfuze_chip->chip_id == PFUZE100) ? "100" :
588 ((pfuze_chip->chip_id == PFUZE200) ? "200" : "3000"));
Robin Gongf2518482014-03-04 17:40:36 +0800589
Fabio Estevam12425652016-06-05 19:17:38 -0300590 memcpy(pfuze_chip->regulator_descs, pfuze_chip->pfuze_regulators,
Robin Gongf2518482014-03-04 17:40:36 +0800591 sizeof(pfuze_chip->regulator_descs));
592
Robin Gong3784b6d2013-07-25 11:33:18 +0800593 ret = pfuze_parse_regulators_dt(pfuze_chip);
594 if (ret)
595 return ret;
596
Robin Gongf2518482014-03-04 17:40:36 +0800597 for (i = 0; i < regulator_num; i++) {
Robin Gong3784b6d2013-07-25 11:33:18 +0800598 struct regulator_init_data *init_data;
Axel Lind9493232013-07-30 10:46:28 +0800599 struct regulator_desc *desc;
Robin Gong3784b6d2013-07-25 11:33:18 +0800600 int val;
601
Axel Lind9493232013-07-30 10:46:28 +0800602 desc = &pfuze_chip->regulator_descs[i].desc;
603
Robin Gong3784b6d2013-07-25 11:33:18 +0800604 if (pdata)
605 init_data = pdata->init_data[i];
606 else
607 init_data = match_init_data(i);
608
609 /* SW2~SW4 high bit check and modify the voltage value table */
Robin Gongf2518482014-03-04 17:40:36 +0800610 if (i >= sw_check_start && i <= sw_check_end) {
Yizhuo07d819d2019-09-29 10:09:57 -0700611 ret = regmap_read(pfuze_chip->regmap,
612 desc->vsel_reg, &val);
613 if (ret) {
614 dev_err(&client->dev, "Fails to read from the register.\n");
615 return ret;
616 }
617
Robin Gonge5a7a722015-01-09 09:57:33 +0800618 if (val & sw_hi) {
619 if (pfuze_chip->chip_id == PFUZE3000) {
620 desc->volt_table = pfuze3000_sw2hi;
621 desc->n_voltages = ARRAY_SIZE(pfuze3000_sw2hi);
622 } else {
623 desc->min_uV = 800000;
624 desc->uV_step = 50000;
625 desc->n_voltages = 51;
626 }
Robin Gong3784b6d2013-07-25 11:33:18 +0800627 }
628 }
629
630 config.dev = &client->dev;
631 config.init_data = init_data;
632 config.driver_data = pfuze_chip;
633 config.of_node = match_of_node(i);
Sean Crossfe788b02014-05-26 16:45:41 +0800634 config.ena_gpio = -EINVAL;
Robin Gong3784b6d2013-07-25 11:33:18 +0800635
Jingoo Hanf5247b42013-12-06 16:11:58 +0900636 pfuze_chip->regulators[i] =
637 devm_regulator_register(&client->dev, desc, &config);
Robin Gong3784b6d2013-07-25 11:33:18 +0800638 if (IS_ERR(pfuze_chip->regulators[i])) {
639 dev_err(&client->dev, "register regulator%s failed\n",
Fabio Estevam12425652016-06-05 19:17:38 -0300640 pfuze_chip->pfuze_regulators[i].desc.name);
Jingoo Hanf5247b42013-12-06 16:11:58 +0900641 return PTR_ERR(pfuze_chip->regulators[i]);
Robin Gong3784b6d2013-07-25 11:33:18 +0800642 }
643 }
644
645 return 0;
646}
647
Robin Gong3784b6d2013-07-25 11:33:18 +0800648static struct i2c_driver pfuze_driver = {
649 .id_table = pfuze_device_id,
650 .driver = {
651 .name = "pfuze100-regulator",
Robin Gong3784b6d2013-07-25 11:33:18 +0800652 .of_match_table = pfuze_dt_ids,
653 },
654 .probe = pfuze100_regulator_probe,
Robin Gong3784b6d2013-07-25 11:33:18 +0800655};
656module_i2c_driver(pfuze_driver);
657
658MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
Fabio Estevam7eeeab82016-06-05 19:17:40 -0300659MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/200/3000 PMIC");
Robin Gong12d20fc22013-07-29 11:40:11 +0800660MODULE_LICENSE("GPL v2");