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Peter Ujfalusi3f187f82012-07-26 17:01:32 +03001/*
2 * Device Tree Source for OMAP2420 SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
Florian Vaussard98ef79572013-05-31 14:32:55 +020011#include "omap2.dtsi"
Peter Ujfalusi3f187f82012-07-26 17:01:32 +030012
13/ {
14 compatible = "ti,omap2420", "ti,omap2";
15
16 ocp {
Jon Hunter510c0ff2012-10-25 14:24:14 -050017 counter32k: counter@48004000 {
18 compatible = "ti,omap-counter32k";
19 reg = <0x48004000 0x20>;
20 ti,hwmods = "counter_32k";
21 };
22
Tony Lindgren679e3312012-09-10 10:34:51 -070023 omap2420_pmx: pinmux@48000030 {
24 compatible = "ti,omap2420-padconf", "pinctrl-single";
25 reg = <0x48000030 0x0113>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28 pinctrl-single,register-width = <8>;
29 pinctrl-single,function-mask = <0x3f>;
30 };
31
Jon Hunter423182e2013-02-28 15:32:00 -060032 gpio1: gpio@48018000 {
33 compatible = "ti,omap2-gpio";
34 reg = <0x48018000 0x200>;
35 interrupts = <29>;
36 ti,hwmods = "gpio1";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050037 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060038 #gpio-cells = <2>;
39 gpio-controller;
40 #interrupt-cells = <2>;
41 interrupt-controller;
42 };
43
44 gpio2: gpio@4801a000 {
45 compatible = "ti,omap2-gpio";
46 reg = <0x4801a000 0x200>;
47 interrupts = <30>;
48 ti,hwmods = "gpio2";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050049 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060050 #gpio-cells = <2>;
51 gpio-controller;
52 #interrupt-cells = <2>;
53 interrupt-controller;
54 };
55
56 gpio3: gpio@4801c000 {
57 compatible = "ti,omap2-gpio";
58 reg = <0x4801c000 0x200>;
59 interrupts = <31>;
60 ti,hwmods = "gpio3";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050061 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060062 #gpio-cells = <2>;
63 gpio-controller;
64 #interrupt-cells = <2>;
65 interrupt-controller;
66 };
67
68 gpio4: gpio@4801e000 {
69 compatible = "ti,omap2-gpio";
70 reg = <0x4801e000 0x200>;
71 interrupts = <32>;
72 ti,hwmods = "gpio4";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050073 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060074 #gpio-cells = <2>;
75 gpio-controller;
76 #interrupt-cells = <2>;
77 interrupt-controller;
78 };
79
Jon Hunter1c7dbb52013-02-22 15:33:31 -060080 gpmc: gpmc@6800a000 {
81 compatible = "ti,omap2420-gpmc";
82 reg = <0x6800a000 0x1000>;
83 #address-cells = <2>;
84 #size-cells = <1>;
85 interrupts = <20>;
86 gpmc,num-cs = <8>;
87 gpmc,num-waitpins = <4>;
88 ti,hwmods = "gpmc";
89 };
90
Peter Ujfalusi3f187f82012-07-26 17:01:32 +030091 mcbsp1: mcbsp@48074000 {
92 compatible = "ti,omap2420-mcbsp";
93 reg = <0x48074000 0xff>;
94 reg-names = "mpu";
95 interrupts = <59>, /* TX interrupt */
96 <60>; /* RX interrupt */
97 interrupt-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +030098 ti,hwmods = "mcbsp1";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +010099 dmas = <&sdma 31>,
100 <&sdma 32>;
101 dma-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300102 };
103
104 mcbsp2: mcbsp@48076000 {
105 compatible = "ti,omap2420-mcbsp";
106 reg = <0x48076000 0xff>;
107 reg-names = "mpu";
108 interrupts = <62>, /* TX interrupt */
109 <63>; /* RX interrupt */
110 interrupt-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300111 ti,hwmods = "mcbsp2";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100112 dmas = <&sdma 33>,
113 <&sdma 34>;
114 dma-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300115 };
Jon Hunterfab8ad02012-10-19 09:59:00 -0500116
117 timer1: timer@48028000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500118 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500119 reg = <0x48028000 0x400>;
120 interrupts = <37>;
121 ti,hwmods = "timer1";
122 ti,timer-alwon;
123 };
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300124 };
125};