Tomasz Figa | 4961cfd | 2013-08-26 02:37:59 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Samsung's S3C64xx SoC series common device tree source |
| 3 | * |
| 4 | * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> |
| 5 | * |
| 6 | * Samsung's S3C64xx SoC series device nodes are listed in this file. |
| 7 | * Particular SoCs from S3C64xx series can include this file and provide |
| 8 | * values for SoCs specfic bindings. |
| 9 | * |
| 10 | * Note: This file does not include device nodes for all the controllers in |
| 11 | * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional |
| 12 | * nodes can be added to this file. |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify |
| 15 | * it under the terms of the GNU General Public License version 2 as |
| 16 | * published by the Free Software Foundation. |
| 17 | */ |
| 18 | |
| 19 | #include "skeleton.dtsi" |
| 20 | #include <dt-bindings/clock/samsung,s3c64xx-clock.h> |
| 21 | |
| 22 | / { |
| 23 | aliases { |
| 24 | i2c0 = &i2c0; |
| 25 | pinctrl0 = &pinctrl0; |
| 26 | }; |
| 27 | |
| 28 | cpus { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <0>; |
| 31 | |
| 32 | cpu@0 { |
| 33 | device_type = "cpu"; |
| 34 | compatible = "arm,arm1176jzf-s", "arm,arm1176"; |
| 35 | reg = <0x0>; |
| 36 | }; |
| 37 | }; |
| 38 | |
| 39 | soc: soc { |
| 40 | compatible = "simple-bus"; |
| 41 | #address-cells = <1>; |
| 42 | #size-cells = <1>; |
| 43 | ranges; |
| 44 | |
| 45 | vic0: interrupt-controller@71200000 { |
| 46 | compatible = "arm,pl192-vic"; |
| 47 | interrupt-controller; |
| 48 | reg = <0x71200000 0x1000>; |
| 49 | #interrupt-cells = <1>; |
| 50 | }; |
| 51 | |
| 52 | vic1: interrupt-controller@71300000 { |
| 53 | compatible = "arm,pl192-vic"; |
| 54 | interrupt-controller; |
| 55 | reg = <0x71300000 0x1000>; |
| 56 | #interrupt-cells = <1>; |
| 57 | }; |
| 58 | |
| 59 | sdhci0: sdhci@7c200000 { |
| 60 | compatible = "samsung,s3c6410-sdhci"; |
| 61 | reg = <0x7c200000 0x100>; |
| 62 | interrupt-parent = <&vic1>; |
| 63 | interrupts = <24>; |
| 64 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 65 | clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>, |
| 66 | <&clocks SCLK_MMC0>; |
| 67 | status = "disabled"; |
| 68 | }; |
| 69 | |
| 70 | sdhci1: sdhci@7c300000 { |
| 71 | compatible = "samsung,s3c6410-sdhci"; |
| 72 | reg = <0x7c300000 0x100>; |
| 73 | interrupt-parent = <&vic1>; |
| 74 | interrupts = <25>; |
| 75 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 76 | clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>, |
| 77 | <&clocks SCLK_MMC1>; |
| 78 | status = "disabled"; |
| 79 | }; |
| 80 | |
| 81 | sdhci2: sdhci@7c400000 { |
| 82 | compatible = "samsung,s3c6410-sdhci"; |
| 83 | reg = <0x7c400000 0x100>; |
| 84 | interrupt-parent = <&vic1>; |
| 85 | interrupts = <17>; |
| 86 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 87 | clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>, |
| 88 | <&clocks SCLK_MMC2>; |
| 89 | status = "disabled"; |
| 90 | }; |
| 91 | |
| 92 | watchdog: watchdog@7e004000 { |
| 93 | compatible = "samsung,s3c2410-wdt"; |
| 94 | reg = <0x7e004000 0x1000>; |
| 95 | interrupt-parent = <&vic0>; |
| 96 | interrupts = <26>; |
| 97 | clock-names = "watchdog"; |
| 98 | clocks = <&clocks PCLK_WDT>; |
| 99 | status = "disabled"; |
| 100 | }; |
| 101 | |
| 102 | i2c0: i2c@7f004000 { |
| 103 | compatible = "samsung,s3c2440-i2c"; |
| 104 | reg = <0x7f004000 0x1000>; |
| 105 | interrupt-parent = <&vic1>; |
| 106 | interrupts = <18>; |
| 107 | clock-names = "i2c"; |
| 108 | clocks = <&clocks PCLK_IIC0>; |
| 109 | status = "disabled"; |
| 110 | #address-cells = <1>; |
| 111 | #size-cells = <0>; |
| 112 | }; |
| 113 | |
| 114 | uart0: serial@7f005000 { |
| 115 | compatible = "samsung,s3c6400-uart"; |
| 116 | reg = <0x7f005000 0x100>; |
| 117 | interrupt-parent = <&vic1>; |
| 118 | interrupts = <5>; |
| 119 | clock-names = "uart", "clk_uart_baud2", |
| 120 | "clk_uart_baud3"; |
| 121 | clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, |
| 122 | <&clocks SCLK_UART>; |
| 123 | status = "disabled"; |
| 124 | }; |
| 125 | |
| 126 | uart1: serial@7f005400 { |
| 127 | compatible = "samsung,s3c6400-uart"; |
| 128 | reg = <0x7f005400 0x100>; |
| 129 | interrupt-parent = <&vic1>; |
| 130 | interrupts = <6>; |
| 131 | clock-names = "uart", "clk_uart_baud2", |
| 132 | "clk_uart_baud3"; |
| 133 | clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>, |
| 134 | <&clocks SCLK_UART>; |
| 135 | status = "disabled"; |
| 136 | }; |
| 137 | |
| 138 | uart2: serial@7f005800 { |
| 139 | compatible = "samsung,s3c6400-uart"; |
| 140 | reg = <0x7f005800 0x100>; |
| 141 | interrupt-parent = <&vic1>; |
| 142 | interrupts = <7>; |
| 143 | clock-names = "uart", "clk_uart_baud2", |
| 144 | "clk_uart_baud3"; |
| 145 | clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>, |
| 146 | <&clocks SCLK_UART>; |
| 147 | status = "disabled"; |
| 148 | }; |
| 149 | |
| 150 | uart3: serial@7f005c00 { |
| 151 | compatible = "samsung,s3c6400-uart"; |
| 152 | reg = <0x7f005c00 0x100>; |
| 153 | interrupt-parent = <&vic1>; |
| 154 | interrupts = <8>; |
| 155 | clock-names = "uart", "clk_uart_baud2", |
| 156 | "clk_uart_baud3"; |
| 157 | clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>, |
| 158 | <&clocks SCLK_UART>; |
| 159 | status = "disabled"; |
| 160 | }; |
| 161 | |
| 162 | pwm: pwm@7f006000 { |
| 163 | compatible = "samsung,s3c6400-pwm"; |
| 164 | reg = <0x7f006000 0x1000>; |
| 165 | interrupt-parent = <&vic0>; |
| 166 | interrupts = <23>, <24>, <25>, <27>, <28>; |
| 167 | clock-names = "timers"; |
| 168 | clocks = <&clocks PCLK_PWM>; |
| 169 | samsung,pwm-outputs = <0>, <1>; |
| 170 | #pwm-cells = <3>; |
| 171 | status = "disabled"; |
| 172 | }; |
| 173 | |
| 174 | pinctrl0: pinctrl@7f008000 { |
| 175 | compatible = "samsung,s3c64xx-pinctrl"; |
| 176 | reg = <0x7f008000 0x1000>; |
| 177 | interrupt-parent = <&vic1>; |
| 178 | interrupts = <21>; |
| 179 | |
| 180 | pctrl_int_map: pinctrl-interrupt-map { |
| 181 | interrupt-map = <0 &vic0 0>, |
| 182 | <1 &vic0 1>, |
| 183 | <2 &vic1 0>, |
| 184 | <3 &vic1 1>; |
| 185 | #address-cells = <0>; |
| 186 | #size-cells = <0>; |
| 187 | #interrupt-cells = <1>; |
| 188 | }; |
| 189 | |
| 190 | wakeup-interrupt-controller { |
| 191 | compatible = "samsung,s3c64xx-wakeup-eint"; |
| 192 | interrupts = <0>, <1>, <2>, <3>; |
| 193 | interrupt-parent = <&pctrl_int_map>; |
| 194 | }; |
| 195 | }; |
| 196 | }; |
| 197 | }; |
| 198 | |
| 199 | #include "s3c64xx-pinctrl.dtsi" |