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gerrit-public.fairphone.software / kernel / msm-4.9 / 3297c2e6d7c3b1498b28c93141056cbe96444fde / . / arch / arm / mach-s5pv310 / include / mach / regs-clock.h
blob: 4013553cd9be8de219ffb3cfbd51905b35f517c7 [file] [log] [blame]
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]1/* linux/arch/arm/mach-s5pv310/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV310 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]18#define S5P_CLKREG(x) (S5P_VA_CMU + (x))
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]19
20#define S5P_INFORM0 S5P_CLKREG(0x800)
21
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]22#define S5P_EPLL_CON0 S5P_CLKREG(0x0C110)
23#define S5P_EPLL_CON1 S5P_CLKREG(0x0C114)
24#define S5P_VPLL_CON0 S5P_CLKREG(0x0C120)
25#define S5P_VPLL_CON1 S5P_CLKREG(0x0C124)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]26
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]27#define S5P_CLKSRC_TOP0 S5P_CLKREG(0x0C210)
28#define S5P_CLKSRC_TOP1 S5P_CLKREG(0x0C214)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]29
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]30#define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]31
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]32#define S5P_CLKDIV_TOP S5P_CLKREG(0x0C510)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]33
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]34#define S5P_CLKDIV_PERIL0 S5P_CLKREG(0x0C550)
35#define S5P_CLKDIV_PERIL1 S5P_CLKREG(0x0C554)
36#define S5P_CLKDIV_PERIL2 S5P_CLKREG(0x0C558)
37#define S5P_CLKDIV_PERIL3 S5P_CLKREG(0x0C55C)
38#define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x0C560)
39#define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]40
Jongpill Lee3297c2e2010-08-27 17:53:26 +0900[diff] [blame^]41#define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350)
42
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]43#define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]44
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]45#define S5P_CLKSRC_CORE S5P_CLKREG(0x10200)
46#define S5P_CLKDIV_CORE0 S5P_CLKREG(0x10500)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]47
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]48#define S5P_APLL_LOCK S5P_CLKREG(0x14000)
49#define S5P_MPLL_LOCK S5P_CLKREG(0x14004)
50#define S5P_APLL_CON0 S5P_CLKREG(0x14100)
51#define S5P_APLL_CON1 S5P_CLKREG(0x14104)
52#define S5P_MPLL_CON0 S5P_CLKREG(0x14108)
53#define S5P_MPLL_CON1 S5P_CLKREG(0x1410C)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]54
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]55#define S5P_CLKSRC_CPU S5P_CLKREG(0x14200)
56#define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]57
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]58#define S5P_CLKDIV_CPU S5P_CLKREG(0x14500)
59#define S5P_CLKDIV_STATCPU S5P_CLKREG(0x14600)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]60
Kukjin Kimc598c472010-08-18 21:45:49 +0900[diff] [blame]61#define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x14800)
Changhwan Younc8bef142010-07-27 17:52:39 +0900[diff] [blame]62
63#endif /* __ASM_ARCH_REGS_CLOCK_H */