blob: d00f1cee45094a6c01e004934de6e2928d4e9222 [file] [log] [blame]
Kukjin Kim09ec1d72013-01-31 16:54:38 -08001/*
Ben Dookse02f8662009-11-13 22:54:13 +00002 * Copyright (c) 2006-2008 Simtec Electronics
Ben Dooks2e4ea6e2009-07-30 23:23:21 +01003 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX CPU Frequency scaling
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/interrupt.h>
16#include <linux/ioport.h>
17#include <linux/cpufreq.h>
18#include <linux/cpu.h>
19#include <linux/clk.h>
20#include <linux/err.h>
21#include <linux/io.h>
Kay Sieversedbaa602011-12-21 16:26:03 -080022#include <linux/device.h>
Ben Dooks2e4ea6e2009-07-30 23:23:21 +010023#include <linux/sysfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090024#include <linux/slab.h>
Ben Dooks2e4ea6e2009-07-30 23:23:21 +010025
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28
29#include <plat/cpu.h>
Ben Dooks2e4ea6e2009-07-30 23:23:21 +010030#include <plat/cpu-freq-core.h>
31
32#include <mach/regs-clock.h>
33
34/* note, cpufreq support deals in kHz, no Hz */
35
36static struct cpufreq_driver s3c24xx_driver;
37static struct s3c_cpufreq_config cpu_cur;
38static struct s3c_iotimings s3c24xx_iotiming;
39static struct cpufreq_frequency_table *pll_reg;
40static unsigned int last_target = ~0;
41static unsigned int ftab_size;
42static struct cpufreq_frequency_table *ftab;
43
44static struct clk *_clk_mpll;
45static struct clk *_clk_xtal;
46static struct clk *clk_fclk;
47static struct clk *clk_hclk;
48static struct clk *clk_pclk;
49static struct clk *clk_arm;
50
Paul Bolle4a6c4102013-07-14 20:29:56 +020051#ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS
Ben Dookse6d197a2009-07-30 23:23:42 +010052struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void)
53{
54 return &cpu_cur;
55}
56
57struct s3c_iotimings *s3c_cpufreq_getiotimings(void)
58{
59 return &s3c24xx_iotiming;
60}
Paul Bolle4a6c4102013-07-14 20:29:56 +020061#endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS */
Ben Dookse6d197a2009-07-30 23:23:42 +010062
Ben Dooks2e4ea6e2009-07-30 23:23:21 +010063static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg)
64{
65 unsigned long fclk, pclk, hclk, armclk;
66
67 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk);
68 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk);
69 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);
70 cfg->freq.armclk = armclk = clk_get_rate(clk_arm);
71
Viresh Kumar50701582013-03-30 16:25:15 +053072 cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +010073 cfg->pll.frequency = fclk;
74
75 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
76
77 cfg->divs.h_divisor = fclk / hclk;
78 cfg->divs.p_divisor = fclk / pclk;
79}
80
81static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg)
82{
83 unsigned long pll = cfg->pll.frequency;
84
85 cfg->freq.fclk = pll;
86 cfg->freq.hclk = pll / cfg->divs.h_divisor;
87 cfg->freq.pclk = pll / cfg->divs.p_divisor;
88
89 /* convert hclk into 10ths of nanoseconds for io calcs */
90 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
91}
92
93static inline int closer(unsigned int target, unsigned int n, unsigned int c)
94{
95 int diff_cur = abs(target - c);
96 int diff_new = abs(target - n);
97
98 return (diff_new < diff_cur);
99}
100
101static void s3c_cpufreq_show(const char *pfx,
102 struct s3c_cpufreq_config *cfg)
103{
104 s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n",
105 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk,
106 cfg->freq.hclk, cfg->divs.h_divisor,
107 cfg->freq.pclk, cfg->divs.p_divisor);
108}
109
110/* functions to wrapper the driver info calls to do the cpu specific work */
111
112static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg)
113{
114 if (cfg->info->set_iotiming)
115 (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming);
116}
117
118static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg)
119{
120 if (cfg->info->calc_iotiming)
121 return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming);
122
123 return 0;
124}
125
126static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
127{
128 (cfg->info->set_refresh)(cfg);
129}
130
131static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
132{
133 (cfg->info->set_divs)(cfg);
134}
135
136static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)
137{
138 return (cfg->info->calc_divs)(cfg);
139}
140
141static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg)
142{
Heiko Stuebnerd8b53252014-05-09 05:48:44 +0900143 cfg->mpll = _clk_mpll;
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100144 (cfg->info->set_fvco)(cfg);
145}
146
147static inline void s3c_cpufreq_resume_clocks(void)
148{
149 cpu_cur.info->resume_clocks();
150}
151
152static inline void s3c_cpufreq_updateclk(struct clk *clk,
153 unsigned int freq)
154{
155 clk_set_rate(clk, freq);
156}
157
158static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
159 unsigned int target_freq,
160 struct cpufreq_frequency_table *pll)
161{
162 struct s3c_cpufreq_freqs freqs;
163 struct s3c_cpufreq_config cpu_new;
164 unsigned long flags;
165
166 cpu_new = cpu_cur; /* copy new from current */
167
168 s3c_cpufreq_show("cur", &cpu_cur);
169
170 /* TODO - check for DMA currently outstanding */
171
172 cpu_new.pll = pll ? *pll : cpu_cur.pll;
173
174 if (pll)
175 freqs.pll_changing = 1;
176
177 /* update our frequencies */
178
179 cpu_new.freq.armclk = target_freq;
180 cpu_new.freq.fclk = cpu_new.pll.frequency;
181
182 if (s3c_cpufreq_calcdivs(&cpu_new) < 0) {
183 printk(KERN_ERR "no divisors for %d\n", target_freq);
184 goto err_notpossible;
185 }
186
187 s3c_freq_dbg("%s: got divs\n", __func__);
188
189 s3c_cpufreq_calc(&cpu_new);
190
191 s3c_freq_dbg("%s: calculated frequencies for new\n", __func__);
192
193 if (cpu_new.freq.hclk != cpu_cur.freq.hclk) {
194 if (s3c_cpufreq_calcio(&cpu_new) < 0) {
195 printk(KERN_ERR "%s: no IO timings\n", __func__);
196 goto err_notpossible;
197 }
198 }
199
200 s3c_cpufreq_show("new", &cpu_new);
201
202 /* setup our cpufreq parameters */
203
204 freqs.old = cpu_cur.freq;
205 freqs.new = cpu_new.freq;
206
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100207 freqs.freqs.old = cpu_cur.freq.armclk / 1000;
208 freqs.freqs.new = cpu_new.freq.armclk / 1000;
209
210 /* update f/h/p clock settings before we issue the change
211 * notification, so that drivers do not need to do anything
212 * special if they want to recalculate on CPUFREQ_PRECHANGE. */
213
214 s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency);
215 s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk);
216 s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk);
217 s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk);
218
219 /* start the frequency change */
Viresh Kumar8fec0512014-03-24 13:35:45 +0530220 cpufreq_freq_transition_begin(policy, &freqs.freqs);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100221
222 /* If hclk is staying the same, then we do not need to
223 * re-write the IO or the refresh timings whilst we are changing
224 * speed. */
225
226 local_irq_save(flags);
227
228 /* is our memory clock slowing down? */
229 if (cpu_new.freq.hclk < cpu_cur.freq.hclk) {
230 s3c_cpufreq_setrefresh(&cpu_new);
231 s3c_cpufreq_setio(&cpu_new);
232 }
233
234 if (cpu_new.freq.fclk == cpu_cur.freq.fclk) {
235 /* not changing PLL, just set the divisors */
236
237 s3c_cpufreq_setdivs(&cpu_new);
238 } else {
239 if (cpu_new.freq.fclk < cpu_cur.freq.fclk) {
240 /* slow the cpu down, then set divisors */
241
242 s3c_cpufreq_setfvco(&cpu_new);
243 s3c_cpufreq_setdivs(&cpu_new);
244 } else {
245 /* set the divisors, then speed up */
246
247 s3c_cpufreq_setdivs(&cpu_new);
248 s3c_cpufreq_setfvco(&cpu_new);
249 }
250 }
251
252 /* did our memory clock speed up */
253 if (cpu_new.freq.hclk > cpu_cur.freq.hclk) {
254 s3c_cpufreq_setrefresh(&cpu_new);
255 s3c_cpufreq_setio(&cpu_new);
256 }
257
258 /* update our current settings */
259 cpu_cur = cpu_new;
260
261 local_irq_restore(flags);
262
263 /* notify everyone we've done this */
Viresh Kumar8fec0512014-03-24 13:35:45 +0530264 cpufreq_freq_transition_end(policy, &freqs.freqs, 0);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100265
266 s3c_freq_dbg("%s: finished\n", __func__);
267 return 0;
268
269 err_notpossible:
270 printk(KERN_ERR "no compatible settings for %d\n", target_freq);
271 return -EINVAL;
272}
273
274/* s3c_cpufreq_target
275 *
276 * called by the cpufreq core to adjust the frequency that the CPU
277 * is currently running at.
278 */
279
280static int s3c_cpufreq_target(struct cpufreq_policy *policy,
281 unsigned int target_freq,
282 unsigned int relation)
283{
284 struct cpufreq_frequency_table *pll;
285 unsigned int index;
286
287 /* avoid repeated calls which cause a needless amout of duplicated
288 * logging output (and CPU time as the calculation process is
289 * done) */
290 if (target_freq == last_target)
291 return 0;
292
293 last_target = target_freq;
294
295 s3c_freq_dbg("%s: policy %p, target %u, relation %u\n",
296 __func__, policy, target_freq, relation);
297
298 if (ftab) {
299 if (cpufreq_frequency_table_target(policy, ftab,
300 target_freq, relation,
301 &index)) {
302 s3c_freq_dbg("%s: table failed\n", __func__);
303 return -EINVAL;
304 }
305
306 s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__,
307 target_freq, index, ftab[index].frequency);
308 target_freq = ftab[index].frequency;
309 }
310
311 target_freq *= 1000; /* convert target to Hz */
312
313 /* find the settings for our new frequency */
314
315 if (!pll_reg || cpu_cur.lock_pll) {
316 /* either we've not got any PLL values, or we've locked
317 * to the current one. */
318 pll = NULL;
319 } else {
320 struct cpufreq_policy tmp_policy;
321 int ret;
322
323 /* we keep the cpu pll table in Hz, to ensure we get an
324 * accurate value for the PLL output. */
325
326 tmp_policy.min = policy->min * 1000;
327 tmp_policy.max = policy->max * 1000;
328 tmp_policy.cpu = policy->cpu;
329
330 /* cpufreq_frequency_table_target uses a pointer to 'index'
331 * which is the number of the table entry, not the value of
332 * the table entry's index field. */
333
334 ret = cpufreq_frequency_table_target(&tmp_policy, pll_reg,
335 target_freq, relation,
336 &index);
337
338 if (ret < 0) {
339 printk(KERN_ERR "%s: no PLL available\n", __func__);
340 goto err_notpossible;
341 }
342
343 pll = pll_reg + index;
344
345 s3c_freq_dbg("%s: target %u => %u\n",
346 __func__, target_freq, pll->frequency);
347
348 target_freq = pll->frequency;
349 }
350
351 return s3c_cpufreq_settarget(policy, target_freq, pll);
352
353 err_notpossible:
354 printk(KERN_ERR "no compatible settings for %d\n", target_freq);
355 return -EINVAL;
356}
357
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100358struct clk *s3c_cpufreq_clk_get(struct device *dev, const char *name)
359{
360 struct clk *clk;
361
362 clk = clk_get(dev, name);
363 if (IS_ERR(clk))
364 printk(KERN_ERR "cpufreq: failed to get clock '%s'\n", name);
365
366 return clk;
367}
368
369static int s3c_cpufreq_init(struct cpufreq_policy *policy)
370{
Viresh Kumar652ed952014-01-09 20:38:43 +0530371 policy->clk = clk_arm;
Viresh Kumara307a1e2013-10-03 20:29:22 +0530372 return cpufreq_generic_init(policy, ftab, cpu_cur.info->latency);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100373}
374
Hanjun Guo21b4c412013-08-13 18:20:10 +0800375static int __init s3c_cpufreq_initclks(void)
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100376{
377 _clk_mpll = s3c_cpufreq_clk_get(NULL, "mpll");
378 _clk_xtal = s3c_cpufreq_clk_get(NULL, "xtal");
379 clk_fclk = s3c_cpufreq_clk_get(NULL, "fclk");
380 clk_hclk = s3c_cpufreq_clk_get(NULL, "hclk");
381 clk_pclk = s3c_cpufreq_clk_get(NULL, "pclk");
382 clk_arm = s3c_cpufreq_clk_get(NULL, "armclk");
383
384 if (IS_ERR(clk_fclk) || IS_ERR(clk_hclk) || IS_ERR(clk_pclk) ||
385 IS_ERR(_clk_mpll) || IS_ERR(clk_arm) || IS_ERR(_clk_xtal)) {
386 printk(KERN_ERR "%s: could not get clock(s)\n", __func__);
387 return -ENOENT;
388 }
389
390 printk(KERN_INFO "%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n", __func__,
391 clk_get_rate(clk_fclk) / 1000,
392 clk_get_rate(clk_hclk) / 1000,
393 clk_get_rate(clk_pclk) / 1000,
394 clk_get_rate(clk_arm) / 1000);
395
396 return 0;
397}
398
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100399#ifdef CONFIG_PM
400static struct cpufreq_frequency_table suspend_pll;
401static unsigned int suspend_freq;
402
Rafael J. Wysocki7ca64e22011-03-10 21:13:05 +0100403static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100404{
405 suspend_pll.frequency = clk_get_rate(_clk_mpll);
Viresh Kumar50701582013-03-30 16:25:15 +0530406 suspend_pll.driver_data = __raw_readl(S3C2410_MPLLCON);
Viresh Kumar652ed952014-01-09 20:38:43 +0530407 suspend_freq = clk_get_rate(clk_arm);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100408
409 return 0;
410}
411
412static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
413{
414 int ret;
415
416 s3c_freq_dbg("%s: resuming with policy %p\n", __func__, policy);
417
418 last_target = ~0; /* invalidate last_target setting */
419
420 /* first, find out what speed we resumed at. */
421 s3c_cpufreq_resume_clocks();
422
423 /* whilst we will be called later on, we try and re-set the
424 * cpu frequencies as soon as possible so that we do not end
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300425 * up resuming devices and then immediately having to re-set
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100426 * a number of settings once these devices have restarted.
427 *
428 * as a note, it is expected devices are not used until they
429 * have been un-suspended and at that time they should have
430 * used the updated clock settings.
431 */
432
433 ret = s3c_cpufreq_settarget(NULL, suspend_freq, &suspend_pll);
434 if (ret) {
435 printk(KERN_ERR "%s: failed to reset pll/freq\n", __func__);
436 return ret;
437 }
438
439 return 0;
440}
441#else
442#define s3c_cpufreq_resume NULL
443#define s3c_cpufreq_suspend NULL
444#endif
445
446static struct cpufreq_driver s3c24xx_driver = {
Viresh Kumarae6b4272013-12-03 11:20:45 +0530447 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100448 .target = s3c_cpufreq_target,
Viresh Kumar652ed952014-01-09 20:38:43 +0530449 .get = cpufreq_generic_get,
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100450 .init = s3c_cpufreq_init,
451 .suspend = s3c_cpufreq_suspend,
452 .resume = s3c_cpufreq_resume,
453 .name = "s3c24xx",
454};
455
456
457int __init s3c_cpufreq_register(struct s3c_cpufreq_info *info)
458{
459 if (!info || !info->name) {
460 printk(KERN_ERR "%s: failed to pass valid information\n",
461 __func__);
462 return -EINVAL;
463 }
464
465 printk(KERN_INFO "S3C24XX CPU Frequency driver, %s cpu support\n",
466 info->name);
467
468 /* check our driver info has valid data */
469
470 BUG_ON(info->set_refresh == NULL);
471 BUG_ON(info->set_divs == NULL);
472 BUG_ON(info->calc_divs == NULL);
473
474 /* info->set_fvco is optional, depending on whether there
475 * is a need to set the clock code. */
476
477 cpu_cur.info = info;
478
479 /* Note, driver registering should probably update locktime */
480
481 return 0;
482}
483
484int __init s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
485{
486 struct s3c_cpufreq_board *ours;
487
488 if (!board) {
489 printk(KERN_INFO "%s: no board data\n", __func__);
490 return -EINVAL;
491 }
492
493 /* Copy the board information so that each board can make this
494 * initdata. */
495
Viresh Kumard5b73cd2013-08-06 22:53:06 +0530496 ours = kzalloc(sizeof(*ours), GFP_KERNEL);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100497 if (ours == NULL) {
498 printk(KERN_ERR "%s: no memory\n", __func__);
499 return -ENOMEM;
500 }
501
502 *ours = *board;
503 cpu_cur.board = ours;
504
505 return 0;
506}
507
Sachin Kamat87ae97f2014-01-03 14:57:37 +0530508static int __init s3c_cpufreq_auto_io(void)
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100509{
510 int ret;
511
512 if (!cpu_cur.info->get_iotiming) {
513 printk(KERN_ERR "%s: get_iotiming undefined\n", __func__);
514 return -ENOENT;
515 }
516
517 printk(KERN_INFO "%s: working out IO settings\n", __func__);
518
519 ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming);
520 if (ret)
521 printk(KERN_ERR "%s: failed to get timings\n", __func__);
522
523 return ret;
524}
525
526/* if one or is zero, then return the other, otherwise return the min */
527#define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b))
528
529/**
530 * s3c_cpufreq_freq_min - find the minimum settings for the given freq.
531 * @dst: The destination structure
532 * @a: One argument.
533 * @b: The other argument.
534 *
535 * Create a minimum of each frequency entry in the 'struct s3c_freq',
536 * unless the entry is zero when it is ignored and the non-zero argument
537 * used.
538 */
539static void s3c_cpufreq_freq_min(struct s3c_freq *dst,
540 struct s3c_freq *a, struct s3c_freq *b)
541{
542 dst->fclk = do_min(a->fclk, b->fclk);
543 dst->hclk = do_min(a->hclk, b->hclk);
544 dst->pclk = do_min(a->pclk, b->pclk);
545 dst->armclk = do_min(a->armclk, b->armclk);
546}
547
548static inline u32 calc_locktime(u32 freq, u32 time_us)
549{
550 u32 result;
551
552 result = freq * time_us;
553 result = DIV_ROUND_UP(result, 1000 * 1000);
554
555 return result;
556}
557
558static void s3c_cpufreq_update_loctkime(void)
559{
560 unsigned int bits = cpu_cur.info->locktime_bits;
561 u32 rate = (u32)clk_get_rate(_clk_xtal);
562 u32 val;
563
564 if (bits == 0) {
565 WARN_ON(1);
566 return;
567 }
568
569 val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits;
570 val |= calc_locktime(rate, cpu_cur.info->locktime_m);
571
572 printk(KERN_INFO "%s: new locktime is 0x%08x\n", __func__, val);
573 __raw_writel(val, S3C2410_LOCKTIME);
574}
575
576static int s3c_cpufreq_build_freq(void)
577{
578 int size, ret;
579
580 if (!cpu_cur.info->calc_freqtable)
581 return -EINVAL;
582
583 kfree(ftab);
584 ftab = NULL;
585
586 size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0);
587 size++;
588
Viresh Kumar71508a12014-03-28 19:11:46 +0530589 ftab = kzalloc(sizeof(*ftab) * size, GFP_KERNEL);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100590 if (!ftab) {
591 printk(KERN_ERR "%s: no memory for tables\n", __func__);
592 return -ENOMEM;
593 }
594
595 ftab_size = size;
596
597 ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size);
598 s3c_cpufreq_addfreq(ftab, ret, size, CPUFREQ_TABLE_END);
599
600 return 0;
601}
602
603static int __init s3c_cpufreq_initcall(void)
604{
605 int ret = 0;
606
607 if (cpu_cur.info && cpu_cur.board) {
608 ret = s3c_cpufreq_initclks();
609 if (ret)
610 goto out;
611
612 /* get current settings */
613 s3c_cpufreq_getcur(&cpu_cur);
614 s3c_cpufreq_show("cur", &cpu_cur);
615
616 if (cpu_cur.board->auto_io) {
617 ret = s3c_cpufreq_auto_io();
618 if (ret) {
619 printk(KERN_ERR "%s: failed to get io timing\n",
620 __func__);
621 goto out;
622 }
623 }
624
625 if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) {
626 printk(KERN_ERR "%s: no IO support registered\n",
627 __func__);
628 ret = -EINVAL;
629 goto out;
630 }
631
632 if (!cpu_cur.info->need_pll)
633 cpu_cur.lock_pll = 1;
634
635 s3c_cpufreq_update_loctkime();
636
637 s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max,
638 &cpu_cur.info->max);
639
640 if (cpu_cur.info->calc_freqtable)
641 s3c_cpufreq_build_freq();
642
643 ret = cpufreq_register_driver(&s3c24xx_driver);
644 }
645
646 out:
647 return ret;
648}
649
650late_initcall(s3c_cpufreq_initcall);
651
652/**
653 * s3c_plltab_register - register CPU PLL table.
654 * @plls: The list of PLL entries.
655 * @plls_no: The size of the PLL entries @plls.
656 *
657 * Register the given set of PLLs with the system.
658 */
659int __init s3c_plltab_register(struct cpufreq_frequency_table *plls,
660 unsigned int plls_no)
661{
662 struct cpufreq_frequency_table *vals;
663 unsigned int size;
664
Viresh Kumard5b73cd2013-08-06 22:53:06 +0530665 size = sizeof(*vals) * (plls_no + 1);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100666
Viresh Kumar71508a12014-03-28 19:11:46 +0530667 vals = kzalloc(size, GFP_KERNEL);
Ben Dooks2e4ea6e2009-07-30 23:23:21 +0100668 if (vals) {
669 memcpy(vals, plls, size);
670 pll_reg = vals;
671
672 /* write a terminating entry, we don't store it in the
673 * table that is stored in the kernel */
674 vals += plls_no;
675 vals->frequency = CPUFREQ_TABLE_END;
676
677 printk(KERN_INFO "cpufreq: %d PLL entries\n", plls_no);
678 } else
679 printk(KERN_ERR "cpufreq: no memory for PLL tables\n");
680
681 return vals ? 0 : -ENOMEM;
682}