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gerrit-public.fairphone.software / kernel / msm-4.9 / 333e9fe94d00ce8c334d91099449b9948bf76b92 / . / drivers / gpu / drm / i915 / intel_ringbuffer.h
blob: 3917d8b1c1a9bf9acded5c5c6bf3576f04676968 [file] [log] [blame]
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]1#ifndef _INTEL_RINGBUFFER_H_
2#define _INTEL_RINGBUFFER_H_
3
4struct intel_hw_status_page {
5 void *page_addr;
6 unsigned int gfx_addr;
7 struct drm_gem_object *obj;
8};
9
10struct drm_i915_gem_execbuffer2;
11struct intel_ring_buffer {
12 const char *name;
Chris Wilson92204342010-09-18 11:02:01 +0100[diff] [blame]13 enum intel_ring_id {
14 RING_RENDER = 0x1,
15 RING_BSD = 0x2,
16 } id;
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]17 struct ring_regs {
18 u32 ctl;
19 u32 head;
20 u32 tail;
21 u32 start;
22 } regs;
Daniel Vetter333e9fe2010-08-02 16:24:01 +0200[diff] [blame^]23 u32 mmio_base;
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]24 unsigned long size;
25 unsigned int alignment;
26 void *virtual_start;
27 struct drm_device *dev;
28 struct drm_gem_object *gem_object;
29
30 unsigned int head;
31 unsigned int tail;
32 unsigned int space;
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]33 struct intel_hw_status_page status_page;
34
35 u32 irq_gem_seqno; /* last seq seem at irq time */
36 u32 waiting_gem_seqno;
37 int user_irq_refcount;
38 void (*user_irq_get)(struct drm_device *dev,
39 struct intel_ring_buffer *ring);
40 void (*user_irq_put)(struct drm_device *dev,
41 struct intel_ring_buffer *ring);
42 void (*setup_status_page)(struct drm_device *dev,
43 struct intel_ring_buffer *ring);
44
45 int (*init)(struct drm_device *dev,
46 struct intel_ring_buffer *ring);
47
48 unsigned int (*get_head)(struct drm_device *dev,
49 struct intel_ring_buffer *ring);
50 unsigned int (*get_tail)(struct drm_device *dev,
51 struct intel_ring_buffer *ring);
Xiang, Haihaod46eefa2010-09-16 10:43:12 +0800[diff] [blame]52 void (*set_tail)(struct drm_device *dev,
53 u32 value);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]54 unsigned int (*get_active_head)(struct drm_device *dev,
55 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]56 void (*flush)(struct drm_device *dev,
57 struct intel_ring_buffer *ring,
58 u32 invalidate_domains,
59 u32 flush_domains);
60 u32 (*add_request)(struct drm_device *dev,
61 struct intel_ring_buffer *ring,
62 struct drm_file *file_priv,
63 u32 flush_domains);
64 u32 (*get_gem_seqno)(struct drm_device *dev,
65 struct intel_ring_buffer *ring);
66 int (*dispatch_gem_execbuffer)(struct drm_device *dev,
67 struct intel_ring_buffer *ring,
68 struct drm_i915_gem_execbuffer2 *exec,
69 struct drm_clip_rect *cliprects,
70 uint64_t exec_offset);
71
72 /**
73 * List of objects currently involved in rendering from the
74 * ringbuffer.
75 *
76 * Includes buffers having the contents of their GPU caches
77 * flushed, not necessarily primitives. last_rendering_seqno
78 * represents when the rendering involved will be completed.
79 *
80 * A reference is held on the buffer while on this list.
81 */
82 struct list_head active_list;
83
84 /**
85 * List of breadcrumbs associated with GPU requests currently
86 * outstanding.
87 */
88 struct list_head request_list;
89
Daniel Vettera6910432010-02-02 17:08:37 +0100[diff] [blame]90 /**
91 * Do we have some not yet emitted requests outstanding?
92 */
93 bool outstanding_lazy_request;
94
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]95 wait_queue_head_t irq_queue;
96 drm_local_map_t map;
97};
98
99static inline u32
100intel_read_status_page(struct intel_ring_buffer *ring,
101 int reg)
102{
103 u32 *regs = ring->status_page.page_addr;
104 return regs[reg];
105}
106
107int intel_init_ring_buffer(struct drm_device *dev,
108 struct intel_ring_buffer *ring);
109void intel_cleanup_ring_buffer(struct drm_device *dev,
110 struct intel_ring_buffer *ring);
111int intel_wait_ring_buffer(struct drm_device *dev,
112 struct intel_ring_buffer *ring, int n);
113int intel_wrap_ring_buffer(struct drm_device *dev,
114 struct intel_ring_buffer *ring);
115void intel_ring_begin(struct drm_device *dev,
116 struct intel_ring_buffer *ring, int n);
Chris Wilsone898cd22010-08-04 15:18:14 +0100[diff] [blame]117
118static inline void intel_ring_emit(struct drm_device *dev,
119 struct intel_ring_buffer *ring,
120 unsigned int data)
121{
122 unsigned int *virt = ring->virtual_start + ring->tail;
123 *virt = data;
124 ring->tail += 4;
125}
126
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]127void intel_fill_struct(struct drm_device *dev,
128 struct intel_ring_buffer *ring,
129 void *data,
130 unsigned int len);
131void intel_ring_advance(struct drm_device *dev,
132 struct intel_ring_buffer *ring);
133
134u32 intel_ring_get_seqno(struct drm_device *dev,
135 struct intel_ring_buffer *ring);
136
Xiang, Haihao5c1143b2010-09-16 10:43:11 +0800[diff] [blame]137int intel_init_render_ring_buffer(struct drm_device *dev);
138int intel_init_bsd_ring_buffer(struct drm_device *dev);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800[diff] [blame]139
140#endif /* _INTEL_RINGBUFFER_H_ */