Jesper Nilsson | 58d0831 | 2007-11-29 17:21:59 +0100 | [diff] [blame] | 1 | #include <hwregs/asm/reg_map_asm.h> |
| 2 | #include <hwregs/asm/bif_core_defs_asm.h> |
| 3 | #include <hwregs/asm/gio_defs_asm.h> |
| 4 | #include <hwregs/asm/config_defs_asm.h> |
| 5 | |
| 6 | .macro GIO_INIT |
| 7 | move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0 |
| 8 | move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1 |
| 9 | move.d $r0, [$r1] |
| 10 | |
| 11 | move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0 |
| 12 | move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1 |
| 13 | move.d $r0, [$r1] |
| 14 | |
| 15 | move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0 |
| 16 | move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1 |
| 17 | move.d $r0, [$r1] |
| 18 | |
| 19 | move.d CONFIG_ETRAX_DEF_GIO_PB_OE, $r0 |
| 20 | move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1 |
| 21 | move.d $r0, [$r1] |
| 22 | |
| 23 | move.d CONFIG_ETRAX_DEF_GIO_PC_OUT, $r0 |
| 24 | move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1 |
| 25 | move.d $r0, [$r1] |
| 26 | |
| 27 | move.d CONFIG_ETRAX_DEF_GIO_PC_OE, $r0 |
| 28 | move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1 |
| 29 | move.d $r0, [$r1] |
| 30 | |
| 31 | move.d CONFIG_ETRAX_DEF_GIO_PD_OUT, $r0 |
| 32 | move.d REG_ADDR(gio, regi_gio, rw_pd_dout), $r1 |
| 33 | move.d $r0, [$r1] |
| 34 | |
| 35 | move.d CONFIG_ETRAX_DEF_GIO_PD_OE, $r0 |
| 36 | move.d REG_ADDR(gio, regi_gio, rw_pd_oe), $r1 |
| 37 | move.d $r0, [$r1] |
| 38 | |
| 39 | move.d CONFIG_ETRAX_DEF_GIO_PE_OUT, $r0 |
| 40 | move.d REG_ADDR(gio, regi_gio, rw_pe_dout), $r1 |
| 41 | move.d $r0, [$r1] |
| 42 | |
| 43 | move.d CONFIG_ETRAX_DEF_GIO_PE_OE, $r0 |
| 44 | move.d REG_ADDR(gio, regi_gio, rw_pe_oe), $r1 |
| 45 | move.d $r0, [$r1] |
| 46 | .endm |
| 47 | |
| 48 | .macro START_CLOCKS |
| 49 | move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1 |
| 50 | move.d [$r1], $r0 |
| 51 | or.d REG_STATE(config, rw_clk_ctrl, cpu, yes) | \ |
| 52 | REG_STATE(config, rw_clk_ctrl, bif, yes) | \ |
| 53 | REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0 |
| 54 | move.d $r0, [$r1] |
| 55 | .endm |
| 56 | |
| 57 | .macro SETUP_WAIT_STATES |
| 58 | ;; Set up waitstates etc |
| 59 | move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r0 |
| 60 | move.d CONFIG_ETRAX_MEM_GRP1_CONFIG, $r1 |
| 61 | move.d $r1, [$r0] |
| 62 | move.d REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg), $r0 |
| 63 | move.d CONFIG_ETRAX_MEM_GRP2_CONFIG, $r1 |
| 64 | move.d $r1, [$r0] |
| 65 | move.d REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r0 |
| 66 | move.d CONFIG_ETRAX_MEM_GRP3_CONFIG, $r1 |
| 67 | move.d $r1, [$r0] |
| 68 | move.d REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0 |
| 69 | move.d CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1 |
| 70 | move.d $r1, [$r0] |
| 71 | #ifdef CONFIG_ETRAX_VCS_SIM |
| 72 | ;; Set up minimal flash waitstates |
| 73 | move.d 0, $r10 |
| 74 | move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11 |
| 75 | move.d $r10, [$r11] |
| 76 | #endif |
| 77 | .endm |