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gerrit-public.fairphone.software / kernel / msm-4.9 / 33c36c0a556c307a2430e92148d5e8d5a84d29df / . / drivers / media / pci / cx25821 / cx25821.h
blob: 8a9c0c869412aa36d6fb0ce558755aa0e62711f1 [file] [log] [blame]
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]1/*
2 * Driver for the Conexant CX25821 PCIe bridge
3 *
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]4 * Copyright (C) 2009 Conexant Systems Inc.
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]5 * Authors <shu.lin@conexant.com>, <hiep.huynh@conexant.com>
6 * Based on Steven Toth <stoth@linuxtv.org> cx23885 driver
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 *
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]24#ifndef CX25821_H_
25#define CX25821_H_
26
27#include <linux/pci.h>
28#include <linux/i2c.h>
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]29#include <linux/interrupt.h>
30#include <linux/delay.h>
31#include <linux/sched.h>
32#include <linux/kdev_t.h>
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]33
34#include <media/v4l2-common.h>
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]35#include <media/v4l2-device.h>
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]36#include <media/tuner.h>
37#include <media/tveeprom.h>
38#include <media/videobuf-dma-sg.h>
39#include <media/videobuf-dvb.h>
40
41#include "btcx-risc.h"
42#include "cx25821-reg.h"
43#include "cx25821-medusa-reg.h"
44#include "cx25821-sram.h"
45#include "cx25821-audio.h"
46#include "media/cx2341x.h"
47
48#include <linux/version.h>
49#include <linux/mutex.h>
50
51#define CX25821_VERSION_CODE KERNEL_VERSION(0, 0, 106)
52
53#define UNSET (-1U)
54#define NO_SYNC_LINE (-1U)
55
56#define CX25821_MAXBOARDS 2
57
58#define TRUE 1
59#define FALSE 0
60#define LINE_SIZE_D1 1440
61
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]62/* Number of decoders and encoders */
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]63#define MAX_DECODERS 8
64#define MAX_ENCODERS 2
65#define QUAD_DECODERS 4
66#define MAX_CAMERAS 16
67
68/* Max number of inputs by card */
Leonid V. Fedorenchikc7855ee2011-10-22 01:43:56 -0300[diff] [blame]69#define MAX_CX25821_INPUT 8
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]70#define INPUT(nr) (&cx25821_boards[dev->board].input[nr])
71#define RESOURCE_VIDEO0 1
72#define RESOURCE_VIDEO1 2
73#define RESOURCE_VIDEO2 4
74#define RESOURCE_VIDEO3 8
75#define RESOURCE_VIDEO4 16
76#define RESOURCE_VIDEO5 32
77#define RESOURCE_VIDEO6 64
78#define RESOURCE_VIDEO7 128
79#define RESOURCE_VIDEO8 256
80#define RESOURCE_VIDEO9 512
81#define RESOURCE_VIDEO10 1024
82#define RESOURCE_VIDEO11 2048
83#define RESOURCE_VIDEO_IOCTL 4096
84
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]85#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]86
Leonid V. Fedorenchikc7855ee2011-10-22 01:43:56 -0300[diff] [blame]87#define UNKNOWN_BOARD 0
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]88#define CX25821_BOARD 1
89
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]90/* Currently supported by the driver */
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]91#define CX25821_NORMS (\
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]92 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_M_KR | \
93 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
94 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_H | \
95 V4L2_STD_PAL_Nc)
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]96
97#define CX25821_BOARD_CONEXANT_ATHENA10 1
98#define MAX_VID_CHANNEL_NUM 12
99#define VID_CHANNEL_NUM 8
Dan Carpenter567a23f2011-10-13 02:41:41 -0300[diff] [blame]100#define CX25821_NR_INPUT 2
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]101
102struct cx25821_fmt {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]103 char *name;
104 u32 fourcc; /* v4l2 format id */
105 int depth;
106 int flags;
107 u32 cxformat;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]108};
109
110struct cx25821_ctrl {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]111 struct v4l2_queryctrl v;
112 u32 off;
113 u32 reg;
114 u32 mask;
115 u32 shift;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]116};
117
118struct cx25821_tvnorm {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]119 char *name;
120 v4l2_std_id id;
121 u32 cxiformat;
122 u32 cxoformat;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]123};
124
125struct cx25821_fh {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]126 struct cx25821_dev *dev;
127 enum v4l2_buf_type type;
128 int radio;
129 u32 resources;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]130
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]131 enum v4l2_priority prio;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]132
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]133 /* video overlay */
134 struct v4l2_window win;
135 struct v4l2_clip *clips;
136 unsigned int nclips;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]137
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]138 /* video capture */
139 struct cx25821_fmt *fmt;
140 unsigned int width, height;
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]141 int channel_id;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]142
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]143 /* vbi capture */
144 struct videobuf_queue vidq;
145 struct videobuf_queue vbiq;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]146
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]147 /* H264 Encoder specifics ONLY */
148 struct videobuf_queue mpegq;
149 atomic_t v4l_reading;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]150};
151
152enum cx25821_itype {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]153 CX25821_VMUX_COMPOSITE = 1,
154 CX25821_VMUX_SVIDEO,
155 CX25821_VMUX_DEBUG,
156 CX25821_RADIO,
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]157};
158
159enum cx25821_src_sel_type {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]160 CX25821_SRC_SEL_EXT_656_VIDEO = 0,
161 CX25821_SRC_SEL_PARALLEL_MPEG_VIDEO
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]162};
163
164/* buffer for one video frame */
165struct cx25821_buffer {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]166 /* common v4l buffer stuff -- must be first */
167 struct videobuf_buffer vb;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]168
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]169 /* cx25821 specific */
170 unsigned int bpl;
171 struct btcx_riscmem risc;
172 struct cx25821_fmt *fmt;
173 u32 count;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]174};
175
176struct cx25821_input {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]177 enum cx25821_itype type;
178 unsigned int vmux;
179 u32 gpio0, gpio1, gpio2, gpio3;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]180};
181
Leonid V. Fedorenchik7ae70c82011-09-02 11:55:29 +0800[diff] [blame]182enum port {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]183 CX25821_UNDEFINED = 0,
184 CX25821_RAW,
185 CX25821_264
Leonid V. Fedorenchik7ae70c82011-09-02 11:55:29 +0800[diff] [blame]186};
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]187
188struct cx25821_board {
Ezequiel Garcíac854d882012-07-18 13:41:11 -0300[diff] [blame]189 const char *name;
Leonid V. Fedorenchik7ae70c82011-09-02 11:55:29 +0800[diff] [blame]190 enum port porta;
191 enum port portb;
192 enum port portc;
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]193 unsigned int tuner_type;
194 unsigned int radio_type;
195 unsigned char tuner_addr;
196 unsigned char radio_addr;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]197
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]198 u32 clk_freq;
Dan Carpenter567a23f2011-10-13 02:41:41 -0300[diff] [blame]199 struct cx25821_input input[CX25821_NR_INPUT];
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]200};
201
202struct cx25821_subid {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]203 u16 subvendor;
204 u16 subdevice;
205 u32 card;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]206};
207
208struct cx25821_i2c {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]209 struct cx25821_dev *dev;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]210
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]211 int nr;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]212
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]213 /* i2c i/o */
214 struct i2c_adapter i2c_adap;
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]215 struct i2c_client i2c_client;
216 u32 i2c_rc;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]217
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]218 /* cx25821 registers used for raw addess */
219 u32 i2c_period;
220 u32 reg_ctrl;
221 u32 reg_stat;
222 u32 reg_addr;
223 u32 reg_rdata;
224 u32 reg_wdata;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]225};
226
227struct cx25821_dmaqueue {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]228 struct list_head active;
229 struct list_head queued;
230 struct timer_list timeout;
231 struct btcx_riscmem stopper;
232 u32 count;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]233};
234
235struct cx25821_data {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]236 struct cx25821_dev *dev;
237 struct sram_channel *channel;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]238};
239
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]240struct cx25821_channel {
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]241 struct v4l2_prio_state prio;
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]242
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]243 int ctl_bright;
244 int ctl_contrast;
245 int ctl_hue;
246 int ctl_saturation;
247 struct cx25821_data timeout_data;
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]248
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]249 struct video_device *video_dev;
250 struct cx25821_dmaqueue vidq;
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]251
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]252 struct sram_channel *sram_channels;
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]253
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]254 struct mutex lock;
255 int resources;
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]256
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]257 int pixel_formats;
258 int use_cif_resolution;
259 int cif_width;
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]260};
261
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]262struct cx25821_dev {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]263 struct list_head devlist;
264 atomic_t refcount;
265 struct v4l2_device v4l2_dev;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]266
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]267 /* pci stuff */
268 struct pci_dev *pci;
269 unsigned char pci_rev, pci_lat;
270 int pci_bus, pci_slot;
271 u32 base_io_addr;
272 u32 __iomem *lmmio;
273 u8 __iomem *bmmio;
274 int pci_irqmask;
275 int hwrevision;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]276
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]277 u32 clk_freq;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]278
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]279 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
280 struct cx25821_i2c i2c_bus[3];
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]281
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]282 int nr;
283 struct mutex lock;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]284
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]285 struct cx25821_channel channels[MAX_VID_CHANNEL_NUM];
Palash Bandyopadhyay6d8c2ba2010-07-04 14:15:38 -0300[diff] [blame]286
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]287 /* board details */
288 unsigned int board;
289 char name[32];
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]290
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]291 /* Analog video */
292 u32 resources;
293 unsigned int input;
294 u32 tvaudio;
295 v4l2_std_id tvnorm;
296 unsigned int tuner_type;
297 unsigned char tuner_addr;
298 unsigned int radio_type;
299 unsigned char radio_addr;
300 unsigned int has_radio;
301 unsigned int videc_type;
302 unsigned char videc_addr;
303 unsigned short _max_num_decoders;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]304
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]305 /* Analog Audio Upstream */
306 int _audio_is_running;
307 int _audiopixel_format;
308 int _is_first_audio_frame;
309 int _audiofile_status;
310 int _audio_lines_count;
311 int _audioframe_count;
Leonid V. Fedorenchik6100c572011-09-02 11:55:30 +0800[diff] [blame]312 int _audio_upstream_channel;
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]313 int _last_index_irq; /* The last interrupt index processed. */
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]314
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]315 __le32 *_risc_audio_jmp_addr;
316 __le32 *_risc_virt_start_addr;
317 __le32 *_risc_virt_addr;
318 dma_addr_t _risc_phys_addr;
319 dma_addr_t _risc_phys_start_addr;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]320
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]321 unsigned int _audiorisc_size;
322 unsigned int _audiodata_buf_size;
323 __le32 *_audiodata_buf_virt_addr;
324 dma_addr_t _audiodata_buf_phys_addr;
325 char *_audiofilename;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]326
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]327 /* V4l */
328 u32 freq;
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]329 struct video_device *vbi_dev;
330 struct video_device *radio_dev;
331 struct video_device *ioctl_dev;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]332
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]333 spinlock_t slock;
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]334
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]335 /* Video Upstream */
336 int _line_size;
337 int _prog_cnt;
338 int _pixel_format;
339 int _is_first_frame;
340 int _is_running;
341 int _file_status;
342 int _lines_count;
343 int _frame_count;
344 int _channel_upstream_select;
345 unsigned int _risc_size;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]346
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]347 __le32 *_dma_virt_start_addr;
348 __le32 *_dma_virt_addr;
349 dma_addr_t _dma_phys_addr;
350 dma_addr_t _dma_phys_start_addr;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]351
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]352 unsigned int _data_buf_size;
353 __le32 *_data_buf_virt_addr;
354 dma_addr_t _data_buf_phys_addr;
355 char *_filename;
356 char *_defaultname;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]357
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]358 int _line_size_ch2;
359 int _prog_cnt_ch2;
360 int _pixel_format_ch2;
361 int _is_first_frame_ch2;
362 int _is_running_ch2;
363 int _file_status_ch2;
364 int _lines_count_ch2;
365 int _frame_count_ch2;
366 int _channel2_upstream_select;
367 unsigned int _risc_size_ch2;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]368
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]369 __le32 *_dma_virt_start_addr_ch2;
370 __le32 *_dma_virt_addr_ch2;
371 dma_addr_t _dma_phys_addr_ch2;
372 dma_addr_t _dma_phys_start_addr_ch2;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]373
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]374 unsigned int _data_buf_size_ch2;
375 __le32 *_data_buf_virt_addr_ch2;
376 dma_addr_t _data_buf_phys_addr_ch2;
377 char *_filename_ch2;
378 char *_defaultname_ch2;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]379
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]380 /* MPEG Encoder ONLY settings */
381 u32 cx23417_mailbox;
382 struct cx2341x_mpeg_params mpeg_params;
383 struct video_device *v4l_device;
384 atomic_t v4l_reader_count;
385 struct cx25821_tvnorm encodernorm;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]386
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]387 u32 upstream_riscbuf_size;
388 u32 upstream_databuf_size;
389 u32 upstream_riscbuf_size_ch2;
390 u32 upstream_databuf_size_ch2;
391 u32 audio_upstream_riscbuf_size;
392 u32 audio_upstream_databuf_size;
393 int _isNTSC;
394 int _frame_index;
395 int _audioframe_index;
396 struct workqueue_struct *_irq_queues;
397 struct work_struct _irq_work_entry;
398 struct workqueue_struct *_irq_queues_ch2;
399 struct work_struct _irq_work_entry_ch2;
400 struct workqueue_struct *_irq_audio_queues;
401 struct work_struct _audio_work_entry;
402 char *input_filename;
403 char *input_filename_ch2;
404 int _frame_index_ch2;
405 int _isNTSC_ch2;
406 char *vid_stdname_ch2;
407 int pixel_format_ch2;
408 int channel_select_ch2;
409 int command_ch2;
410 char *input_audiofilename;
411 char *vid_stdname;
412 int pixel_format;
413 int channel_select;
414 int command;
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]415 int channel_opened;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]416};
417
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]418struct upstream_user_struct {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]419 char *input_filename;
420 char *vid_stdname;
421 int pixel_format;
422 int channel_select;
423 int command;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]424};
425
426struct downstream_user_struct {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]427 char *vid_stdname;
428 int pixel_format;
429 int cif_resolution_enable;
430 int cif_width;
431 int decoder_select;
432 int command;
433 int reg_address;
434 int reg_data;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]435};
436
437extern struct upstream_user_struct *up_data;
438
439static inline struct cx25821_dev *get_cx25821(struct v4l2_device *v4l2_dev)
440{
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]441 return container_of(v4l2_dev, struct cx25821_dev, v4l2_dev);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]442}
443
444#define cx25821_call_all(dev, o, f, args...) \
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]445 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]446
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]447extern struct list_head cx25821_devlist;
Arnd Bergmann0cd301f2011-03-02 17:15:15 -0300[diff] [blame]448extern struct mutex cx25821_devlist_mutex;
449
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]450extern struct cx25821_board cx25821_boards[];
451extern struct cx25821_subid cx25821_subids[];
452
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]453#define SRAM_CH00 0 /* Video A */
454#define SRAM_CH01 1 /* Video B */
455#define SRAM_CH02 2 /* Video C */
456#define SRAM_CH03 3 /* Video D */
457#define SRAM_CH04 4 /* Video E */
458#define SRAM_CH05 5 /* Video F */
459#define SRAM_CH06 6 /* Video G */
460#define SRAM_CH07 7 /* Video H */
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]461
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]462#define SRAM_CH08 8 /* Audio A */
463#define SRAM_CH09 9 /* Video Upstream I */
464#define SRAM_CH10 10 /* Video Upstream J */
465#define SRAM_CH11 11 /* Audio Upstream AUD_CHANNEL_B */
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]466
467#define VID_UPSTREAM_SRAM_CHANNEL_I SRAM_CH09
468#define VID_UPSTREAM_SRAM_CHANNEL_J SRAM_CH10
469#define AUDIO_UPSTREAM_SRAM_CHANNEL_B SRAM_CH11
470#define VIDEO_IOCTL_CH 11
471
472struct sram_channel {
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]473 char *name;
474 u32 i;
475 u32 cmds_start;
476 u32 ctrl_start;
477 u32 cdt;
478 u32 fifo_start;
479 u32 fifo_size;
480 u32 ptr1_reg;
481 u32 ptr2_reg;
482 u32 cnt1_reg;
483 u32 cnt2_reg;
484 u32 int_msk;
485 u32 int_stat;
486 u32 int_mstat;
487 u32 dma_ctl;
488 u32 gpcnt_ctl;
489 u32 gpcnt;
490 u32 aud_length;
491 u32 aud_cfg;
492 u32 fld_aud_fifo_en;
493 u32 fld_aud_risc_en;
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]494
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]495 /* For Upstream Video */
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]496 u32 vid_fmt_ctl;
497 u32 vid_active_ctl1;
498 u32 vid_active_ctl2;
499 u32 vid_cdt_size;
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]500
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]501 u32 vip_ctl;
502 u32 pix_frmt;
503 u32 jumponly;
504 u32 irq_bit;
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]505};
506extern struct sram_channel cx25821_sram_channels[];
507
508#define STATUS_SUCCESS 0
509#define STATUS_UNSUCCESSFUL -1
510
511#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
512#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
513
514#define cx_andor(reg, mask, value) \
Ruslan Pisareve4115bb2010-09-27 10:01:36 -0300[diff] [blame]515 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
516 ((value) & (mask)), dev->lmmio+((reg)>>2))
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]517
518#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
519#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
520
521#define Set_GPIO_Bit(Bit) (1 << Bit)
522#define Clear_GPIO_Bit(Bit) (~(1 << Bit))
523
Joe Perches36d89f72010-11-07 17:48:21 -0300[diff] [blame]524#define CX25821_ERR(fmt, args...) \
525 pr_err("(%d): " fmt, dev->board, ##args)
526#define CX25821_WARN(fmt, args...) \
527 pr_warn("(%d): " fmt, dev->board, ##args)
528#define CX25821_INFO(fmt, args...) \
529 pr_info("(%d): " fmt, dev->board, ##args)
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]530
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]531extern int cx25821_i2c_register(struct cx25821_i2c *bus);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]532extern void cx25821_card_setup(struct cx25821_dev *dev);
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]533extern int cx25821_ir_init(struct cx25821_dev *dev);
534extern int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value);
535extern int cx25821_i2c_write(struct cx25821_i2c *bus, u16 reg_addr, int value);
536extern int cx25821_i2c_unregister(struct cx25821_i2c *bus);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]537extern void cx25821_gpio_init(struct cx25821_dev *dev);
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]538extern void cx25821_set_gpiopin_direction(struct cx25821_dev *dev,
539 int pin_number, int pin_logic_value);
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]540
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]541extern int medusa_video_init(struct cx25821_dev *dev);
542extern int medusa_set_videostandard(struct cx25821_dev *dev);
543extern void medusa_set_resolution(struct cx25821_dev *dev, int width,
544 int decoder_select);
545extern int medusa_set_brightness(struct cx25821_dev *dev, int brightness,
546 int decoder);
547extern int medusa_set_contrast(struct cx25821_dev *dev, int contrast,
548 int decoder);
549extern int medusa_set_hue(struct cx25821_dev *dev, int hue, int decoder);
550extern int medusa_set_saturation(struct cx25821_dev *dev, int saturation,
551 int decoder);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]552
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]553extern int cx25821_sram_channel_setup(struct cx25821_dev *dev,
554 struct sram_channel *ch, unsigned int bpl,
555 u32 risc);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]556
557extern int cx25821_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]558 struct scatterlist *sglist,
559 unsigned int top_offset,
560 unsigned int bottom_offset,
561 unsigned int bpl,
562 unsigned int padding, unsigned int lines);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]563extern int cx25821_risc_databuffer_audio(struct pci_dev *pci,
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]564 struct btcx_riscmem *risc,
565 struct scatterlist *sglist,
566 unsigned int bpl,
567 unsigned int lines, unsigned int lpi);
568extern void cx25821_free_buffer(struct videobuf_queue *q,
569 struct cx25821_buffer *buf);
570extern int cx25821_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
571 u32 reg, u32 mask, u32 value);
572extern void cx25821_sram_channel_dump(struct cx25821_dev *dev,
573 struct sram_channel *ch);
574extern void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev,
575 struct sram_channel *ch);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]576
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]577extern struct cx25821_dev *cx25821_dev_get(struct pci_dev *pci);
578extern void cx25821_print_irqbits(char *name, char *tag, char **strings,
579 int len, u32 bits, u32 mask);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]580extern void cx25821_dev_unregister(struct cx25821_dev *dev);
581extern int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev,
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]582 struct sram_channel *ch,
583 unsigned int bpl, u32 risc);
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]584
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]585extern int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev,
586 int channel_select, int pixel_format);
587extern int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev,
588 int channel_select, int pixel_format);
589extern int cx25821_audio_upstream_init(struct cx25821_dev *dev,
590 int channel_select);
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]591extern void cx25821_free_mem_upstream_ch1(struct cx25821_dev *dev);
592extern void cx25821_free_mem_upstream_ch2(struct cx25821_dev *dev);
593extern void cx25821_free_mem_upstream_audio(struct cx25821_dev *dev);
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]594extern void cx25821_start_upstream_video_ch1(struct cx25821_dev *dev,
595 struct upstream_user_struct
596 *up_data);
597extern void cx25821_start_upstream_video_ch2(struct cx25821_dev *dev,
598 struct upstream_user_struct
599 *up_data);
600extern void cx25821_start_upstream_audio(struct cx25821_dev *dev,
601 struct upstream_user_struct *up_data);
Mauro Carvalho Chehabbb4c9a72009-09-13 11:25:45 -0300[diff] [blame]602extern void cx25821_stop_upstream_video_ch1(struct cx25821_dev *dev);
603extern void cx25821_stop_upstream_video_ch2(struct cx25821_dev *dev);
604extern void cx25821_stop_upstream_audio(struct cx25821_dev *dev);
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]605extern int cx25821_sram_channel_setup_upstream(struct cx25821_dev *dev,
606 struct sram_channel *ch,
607 unsigned int bpl, u32 risc);
608extern void cx25821_set_pixel_format(struct cx25821_dev *dev, int channel,
609 u32 format);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]610extern void cx25821_videoioctl_unregister(struct cx25821_dev *dev);
611extern struct video_device *cx25821_vdev_init(struct cx25821_dev *dev,
Mauro Carvalho Chehab1a9fc852009-09-13 11:30:11 -0300[diff] [blame]612 struct pci_dev *pci,
613 struct video_device *template,
614 char *type);
Mauro Carvalho Chehab02b20b02009-09-15 11:33:54 -0300[diff] [blame]615#endif