blob: 887dd6f96ac48c8f1f8b03f869be555ab59b8c40 [file] [log] [blame]
Ray Zhangebb763a2018-01-22 10:46:40 +08001/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#define pr_fmt(fmt) "%s: " fmt, __func__
15
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/platform_device.h>
22#include <linux/fs.h>
23#include <linux/delay.h>
24#include <linux/i2c.h>
25#include <linux/gpio.h>
26#include <linux/interrupt.h>
27#include <linux/of_gpio.h>
28#include <linux/of_graph.h>
29#include <linux/of_irq.h>
30#include <linux/regulator/consumer.h>
31#include <linux/hdmi.h>
32#include <drm/drmP.h>
33#include <drm/drm_atomic.h>
34#include <drm/drm_atomic_helper.h>
35#include <drm/drm_edid.h>
36#include <drm/drm_mipi_dsi.h>
37
38
39#define CFG_HPD_INTERRUPTS BIT(0)
40#define CFG_EDID_INTERRUPTS BIT(1)
41#define CFG_CEC_INTERRUPTS BIT(2)
42#define CFG_VID_CHK_INTERRUPTS BIT(3)
43
44#define EDID_SEG_SIZE 256
45
46struct lt9611_reg_cfg {
47 u8 reg;
48 u8 val;
49 int sleep_in_ms;
50};
51
52struct lt9611_vreg {
53 struct regulator *vreg; /* vreg handle */
54 char vreg_name[32];
55 int min_voltage;
56 int max_voltage;
57 int enable_load;
58 int disable_load;
59 int pre_on_sleep;
60 int post_on_sleep;
61 int pre_off_sleep;
62 int post_off_sleep;
63};
64
65struct lt9611_video_cfg {
66 u32 h_active;
67 u32 h_front_porch;
68 u32 h_pulse_width;
69 u32 h_back_porch;
70 bool h_polarity;
71 u32 v_active;
72 u32 v_front_porch;
73 u32 v_pulse_width;
74 u32 v_back_porch;
75 bool v_polarity;
76 u32 pclk_khz;
77 bool interlaced;
78 u32 vic;
79 enum hdmi_picture_aspect ar;
80 u32 num_of_lanes;
81 u32 num_of_intfs;
82 u8 scaninfo;
83};
84
85struct lt9611 {
86 struct device *dev;
87 struct drm_bridge bridge;
88
89 struct device_node *host_node;
90 struct mipi_dsi_device *dsi;
91
92 u8 i2c_addr;
93 int irq;
94 bool ac_mode;
95
96 u32 irq_gpio;
97 u32 reset_gpio;
98 u32 hdmi_ps_gpio;
99 u32 hdmi_en_gpio;
100
101 unsigned int num_vreg;
102 struct lt9611_vreg *vreg_config;
103
104 struct i2c_client *i2c_client;
105
106 enum drm_connector_status status;
107 bool power_on;
108
109 /* get display modes from device tree */
110 bool non_pluggable;
111 u32 num_of_modes;
112 struct list_head mode_list;
113
114 struct drm_display_mode curr_mode;
115 struct lt9611_video_cfg video_cfg;
116
117 u8 edid_buf[EDID_SEG_SIZE];
118 bool hdmi_mode;
119};
120
121static struct lt9611_reg_cfg lt9611_init_setup[] = {
122 /* LT9611_System_Init */
123 {0xFF, 0x81, 0},
124 {0x01, 0x18, 0}, /* sel xtal clock */
125
126 /* timer for frequency meter */
127 {0xff, 0x82, 0},
128 {0x1b, 0x69, 0}, /*timer 2*/
129 {0x1c, 0x78, 0},
130 {0xcb, 0x69, 0}, /*timer 1 */
131 {0xcc, 0x78, 0},
132
133 /* irq init */
134 {0xff, 0x82, 0},
135 {0x51, 0x01, 0},
136 {0x58, 0x0a, 0}, /* hpd irq */
137 {0x59, 0x80, 0}, /* hpd debounce width */
138 {0x9e, 0xf7, 0}, /* video check irq */
139
140 /* power consumption for work */
141 {0xff, 0x80, 0},
142 {0x04, 0xf0, 0},
143 {0x06, 0xf0, 0},
144 {0x0a, 0x80, 0},
145 {0x0b, 0x40, 0},
146 {0x0d, 0xef, 0},
147 {0x11, 0xfa, 0},
148};
149
150struct lt9611_timing_info {
151 u16 xres;
152 u16 yres;
153 u8 bpp;
154 u8 fps;
155 u8 lanes;
156 u8 intfs;
157};
158
159static struct lt9611_timing_info lt9611_supp_timing_cfg[] = {
160 {3840, 2160, 24, 30, 4, 2}, /* 3840x2160 24bit 30Hz 4Lane 2ports */
161 {1920, 1080, 24, 60, 4, 1}, /* 1080P 24bit 60Hz 4lane 1port */
162 {1920, 1080, 24, 30, 3, 1}, /* 1080P 24bit 30Hz 3lane 1port */
163 {1920, 1080, 24, 24, 3, 1},
164 {720, 480, 24, 60, 2, 1},
165 {720, 576, 24, 50, 2, 1},
166 {640, 480, 24, 60, 2, 1},
167 {0xffff, 0xffff, 0xff, 0xff, 0xff},
168};
169
170static struct lt9611 *bridge_to_lt9611(struct drm_bridge *bridge)
171{
172 return container_of(bridge, struct lt9611, bridge);
173}
174
175static struct lt9611 *connector_to_lt9611(struct drm_connector *connector)
176{
177 WARN_ON(!connector->private);
178
179 return bridge_to_lt9611(connector->private);
180}
181
182static int lt9611_write(struct lt9611 *pdata, u8 reg, u8 val)
183{
184 struct i2c_client *client = pdata->i2c_client;
185 u8 buf[2] = {reg, val};
186 struct i2c_msg msg = {
187 .addr = client->addr,
188 .flags = 0,
189 .len = 2,
190 .buf = buf,
191 };
192
193 if (i2c_transfer(client->adapter, &msg, 1) < 1) {
194 pr_err("i2c write failed\n");
195 return -EIO;
196 }
197
198 return 0;
199}
200
201static int lt9611_read(struct lt9611 *pdata, u8 reg, char *buf, u32 size)
202{
203 struct i2c_client *client = pdata->i2c_client;
204 struct i2c_msg msg[2] = {
205 {
206 .addr = client->addr,
207 .flags = 0,
208 .len = 1,
209 .buf = &reg,
210 },
211 {
212 .addr = client->addr,
213 .flags = I2C_M_RD,
214 .len = size,
215 .buf = buf,
216 }
217 };
218
219 if (i2c_transfer(client->adapter, msg, 2) != 2) {
220 pr_err("i2c read failed\n");
221 return -EIO;
222 }
223
224 return 0;
225}
226
227static int lt9611_write_array(struct lt9611 *pdata,
228 struct lt9611_reg_cfg *cfg, int size)
229{
230 int ret = 0;
231 int i;
232
233 size = size / sizeof(struct lt9611_reg_cfg);
234 for (i = 0; i < size; i++) {
235 ret = lt9611_write(pdata, cfg[i].reg, cfg[i].val);
236
237 if (ret != 0) {
238 pr_err("reg writes failed. Last write %02X to %02X\n",
239 cfg[i].val, cfg[i].reg);
240 goto w_regs_fail;
241 }
242
243 if (cfg[i].sleep_in_ms)
244 msleep(cfg[i].sleep_in_ms);
245 }
246
247w_regs_fail:
248 if (ret != 0)
249 pr_err("exiting with ret = %d after %d writes\n", ret, i);
250
251 return ret;
252}
253
254static int lt9611_parse_dt_modes(struct device_node *np,
255 struct list_head *head,
256 u32 *num_of_modes)
257{
258 int rc = 0;
259 struct drm_display_mode *mode;
260 u32 mode_count = 0;
261 struct device_node *node = NULL;
262 struct device_node *root_node = NULL;
263 u32 h_front_porch, h_pulse_width, h_back_porch;
264 u32 v_front_porch, v_pulse_width, v_back_porch;
265 bool h_active_high, v_active_high;
266 u32 flags = 0;
267
268 root_node = of_get_child_by_name(np, "lt,customize-modes");
269 if (!root_node) {
270 root_node = of_parse_phandle(np, "lt,customize-modes", 0);
271 if (!root_node) {
272 pr_info("No entry present for lt,customize-modes");
273 goto end;
274 }
275 }
276
277 for_each_child_of_node(root_node, node) {
278 rc = 0;
279 mode = kzalloc(sizeof(*mode), GFP_KERNEL);
280 if (!mode) {
281 pr_err("Out of memory\n");
282 rc = -ENOMEM;
283 continue;
284 }
285
286 rc = of_property_read_u32(node, "lt,mode-h-active",
287 &mode->hdisplay);
288 if (rc) {
289 pr_err("failed to read h-active, rc=%d\n", rc);
290 goto fail;
291 }
292
293 rc = of_property_read_u32(node, "lt,mode-h-front-porch",
294 &h_front_porch);
295 if (rc) {
296 pr_err("failed to read h-front-porch, rc=%d\n", rc);
297 goto fail;
298 }
299
300 rc = of_property_read_u32(node, "lt,mode-h-pulse-width",
301 &h_pulse_width);
302 if (rc) {
303 pr_err("failed to read h-pulse-width, rc=%d\n", rc);
304 goto fail;
305 }
306
307 rc = of_property_read_u32(node, "lt,mode-h-back-porch",
308 &h_back_porch);
309 if (rc) {
310 pr_err("failed to read h-back-porch, rc=%d\n", rc);
311 goto fail;
312 }
313
314 h_active_high = of_property_read_bool(node,
315 "lt,mode-h-active-high");
316
317 rc = of_property_read_u32(node, "lt,mode-v-active",
318 &mode->vdisplay);
319 if (rc) {
320 pr_err("failed to read v-active, rc=%d\n", rc);
321 goto fail;
322 }
323
324 rc = of_property_read_u32(node, "lt,mode-v-front-porch",
325 &v_front_porch);
326 if (rc) {
327 pr_err("failed to read v-front-porch, rc=%d\n", rc);
328 goto fail;
329 }
330
331 rc = of_property_read_u32(node, "lt,mode-v-pulse-width",
332 &v_pulse_width);
333 if (rc) {
334 pr_err("failed to read v-pulse-width, rc=%d\n", rc);
335 goto fail;
336 }
337
338 rc = of_property_read_u32(node, "lt,mode-v-back-porch",
339 &v_back_porch);
340 if (rc) {
341 pr_err("failed to read v-back-porch, rc=%d\n", rc);
342 goto fail;
343 }
344
345 v_active_high = of_property_read_bool(node,
346 "lt,mode-v-active-high");
347
348 rc = of_property_read_u32(node, "lt,mode-refresh-rate",
349 &mode->vrefresh);
350 if (rc) {
351 pr_err("failed to read refresh-rate, rc=%d\n", rc);
352 goto fail;
353 }
354
355 rc = of_property_read_u32(node, "lt,mode-clock-in-khz",
356 &mode->clock);
357 if (rc) {
358 pr_err("failed to read clock, rc=%d\n", rc);
359 goto fail;
360 }
361
362 mode->hsync_start = mode->hdisplay + h_front_porch;
363 mode->hsync_end = mode->hsync_start + h_pulse_width;
364 mode->htotal = mode->hsync_end + h_back_porch;
365 mode->vsync_start = mode->vdisplay + v_front_porch;
366 mode->vsync_end = mode->vsync_start + v_pulse_width;
367 mode->vtotal = mode->vsync_end + v_back_porch;
368 if (h_active_high)
369 flags |= DRM_MODE_FLAG_PHSYNC;
370 else
371 flags |= DRM_MODE_FLAG_NHSYNC;
372 if (v_active_high)
373 flags |= DRM_MODE_FLAG_PVSYNC;
374 else
375 flags |= DRM_MODE_FLAG_NVSYNC;
376 mode->flags = flags;
377
378 if (!rc) {
379 mode_count++;
380 list_add_tail(&mode->head, head);
381 }
382
383 drm_mode_set_name(mode);
384
385 pr_debug("mode[%s] h[%d,%d,%d,%d] v[%d,%d,%d,%d] %d %x %dkHZ\n",
386 mode->name, mode->hdisplay, mode->hsync_start,
387 mode->hsync_end, mode->htotal, mode->vdisplay,
388 mode->vsync_start, mode->vsync_end, mode->vtotal,
389 mode->vrefresh, mode->flags, mode->clock);
390fail:
391 if (rc) {
392 kfree(mode);
393 continue;
394 }
395 }
396
397 if (num_of_modes)
398 *num_of_modes = mode_count;
399
400end:
401 return rc;
402}
403
404
405static int lt9611_parse_dt(struct device *dev,
406 struct lt9611 *pdata)
407{
408 struct device_node *np = dev->of_node;
409 struct device_node *end_node;
410 int ret = 0;
411
412 end_node = of_graph_get_endpoint_by_regs(dev->of_node, 0, 0);
413 if (!end_node) {
414 pr_err("remote endpoint not found\n");
415 return -ENODEV;
416 }
417
418 pdata->host_node = of_graph_get_remote_port_parent(end_node);
419 of_node_put(end_node);
420 if (!pdata->host_node) {
421 pr_err("remote node not found\n");
422 return -ENODEV;
423 }
424 of_node_put(pdata->host_node);
425
426 pdata->irq_gpio =
427 of_get_named_gpio(np, "lt,irq-gpio", 0);
428 if (!gpio_is_valid(pdata->irq_gpio)) {
429 pr_err("irq gpio not specified\n");
430 ret = -EINVAL;
431 }
432 pr_debug("irq_gpio=%d\n", pdata->irq_gpio);
433
434 pdata->reset_gpio =
435 of_get_named_gpio(np, "lt,reset-gpio", 0);
436 if (!gpio_is_valid(pdata->reset_gpio)) {
437 pr_err("reset gpio not specified\n");
438 ret = -EINVAL;
439 }
440 pr_debug("reset_gpio=%d\n", pdata->reset_gpio);
441
442 pdata->hdmi_ps_gpio =
443 of_get_named_gpio(np, "lt,hdmi-ps-gpio", 0);
444 if (!gpio_is_valid(pdata->hdmi_ps_gpio))
445 pr_debug("hdmi ps gpio not specified\n");
446 else
447 pr_debug("hdmi_ps_gpio=%d\n", pdata->hdmi_ps_gpio);
448
449 pdata->hdmi_en_gpio =
450 of_get_named_gpio(np, "lt,hdmi-en-gpio", 0);
451 if (!gpio_is_valid(pdata->hdmi_en_gpio))
452 pr_debug("hdmi en gpio not specified\n");
453 else
454 pr_debug("hdmi_en_gpio=%d\n", pdata->hdmi_en_gpio);
455
456 pdata->ac_mode = of_property_read_bool(np, "lt,ac-mode");
457 pr_debug("ac_mode=%d\n", pdata->ac_mode);
458
459 pdata->non_pluggable = of_property_read_bool(np, "lt,non-pluggable");
460 pr_debug("non_pluggable = %d\n", pdata->non_pluggable);
461 if (pdata->non_pluggable) {
462 INIT_LIST_HEAD(&pdata->mode_list);
463 ret = lt9611_parse_dt_modes(np,
464 &pdata->mode_list, &pdata->num_of_modes);
465 }
466
467 return ret;
468}
469
470static int lt9611_gpio_configure(struct lt9611 *pdata, bool on)
471{
472 int ret = 0;
473
474 if (on) {
475 ret = gpio_request(pdata->reset_gpio,
476 "lt9611-reset-gpio");
477 if (ret) {
478 pr_err("lt9611 reset gpio request failed\n");
479 goto error;
480 }
481
482 ret = gpio_direction_output(pdata->reset_gpio, 0);
483 if (ret) {
484 pr_err("lt9611 reset gpio direction failed\n");
485 goto reset_error;
486 }
487
488 if (gpio_is_valid(pdata->hdmi_en_gpio)) {
489 ret = gpio_request(pdata->hdmi_en_gpio,
490 "lt9611-hdmi-en-gpio");
491 if (ret) {
492 pr_err("lt9611 hdmi en gpio request failed\n");
493 goto reset_error;
494 }
495
496 ret = gpio_direction_output(pdata->hdmi_en_gpio, 1);
497 if (ret) {
498 pr_err("lt9611 hdmi en gpio direction failed\n");
499 goto hdmi_en_error;
500 }
501 }
502
503 if (gpio_is_valid(pdata->hdmi_ps_gpio)) {
504 ret = gpio_request(pdata->hdmi_ps_gpio,
505 "lt9611-hdmi-ps-gpio");
506 if (ret) {
507 pr_err("lt9611 hdmi ps gpio request failed\n");
508 goto hdmi_en_error;
509 }
510
511 ret = gpio_direction_input(pdata->hdmi_ps_gpio);
512 if (ret) {
513 pr_err("lt9611 hdmi ps gpio direction failed\n");
514 goto hdmi_ps_error;
515 }
516 }
517
518 ret = gpio_request(pdata->irq_gpio, "lt9611-irq-gpio");
519 if (ret) {
520 pr_err("lt9611 irq gpio request failed\n");
521 goto hdmi_ps_error;
522 }
523
524 ret = gpio_direction_input(pdata->irq_gpio);
525 if (ret) {
526 pr_err("lt9611 irq gpio direction failed\n");
527 goto irq_error;
528 }
529 } else {
530 gpio_free(pdata->irq_gpio);
531 if (gpio_is_valid(pdata->hdmi_ps_gpio))
532 gpio_free(pdata->hdmi_ps_gpio);
533 if (gpio_is_valid(pdata->hdmi_en_gpio))
534 gpio_free(pdata->hdmi_en_gpio);
535 gpio_free(pdata->reset_gpio);
536 }
537
538 return ret;
539
540
541irq_error:
542 gpio_free(pdata->irq_gpio);
543hdmi_ps_error:
544 if (gpio_is_valid(pdata->hdmi_ps_gpio))
545 gpio_free(pdata->hdmi_ps_gpio);
546hdmi_en_error:
547 if (gpio_is_valid(pdata->hdmi_en_gpio))
548 gpio_free(pdata->hdmi_en_gpio);
549reset_error:
550 gpio_free(pdata->reset_gpio);
551error:
552 return ret;
553}
554
555static int lt9611_read_device_rev(struct lt9611 *pdata)
556{
557 u8 rev = 0;
558 int ret = 0;
559
560 lt9611_write(pdata, 0xff, 0x80);
561 lt9611_write(pdata, 0xee, 0x01);
562
563 ret = lt9611_read(pdata, 0x02, &rev, 1);
564
565 if (ret == 0)
566 pr_info("LT9611 revsion: 0x%x\n", rev);
567
568 return ret;
569}
570
571static int lt9611_mipi_input_analog(struct lt9611 *pdata,
572 struct lt9611_video_cfg *cfg)
573{
574 struct lt9611_reg_cfg reg_cfg[] = {
575 {0xff, 0x81, 0},
576 {0x06, 0x40, 0}, /*port A rx current*/
577 {0x0a, 0xfe, 0}, /*port A ldo voltage set*/
578 {0x0b, 0xbf, 0}, /*enable port A lprx*/
579 {0x11, 0x40, 0}, /*port B rx current*/
580 {0x15, 0xfe, 0}, /*port B ldo voltage set*/
581 {0x16, 0xbf, 0}, /*enable port B lprx*/
582
583 {0x1c, 0x03, 0}, /*PortA clk lane no-LP mode*/
584 {0x20, 0x03, 0}, /*PortB clk lane with-LP mode*/
585 };
586
587 if (!pdata || !cfg) {
588 pr_err("invalid input\n");
589 return -EINVAL;
590 }
591
592 lt9611_write_array(pdata, reg_cfg, sizeof(reg_cfg));
593
594 return 0;
595}
596
597static int lt9611_mipi_input_digital(struct lt9611 *pdata,
598 struct lt9611_video_cfg *cfg)
599{
600 u8 lanes = 0;
601 u8 ports = 0;
602 struct lt9611_reg_cfg reg_cfg[] = {
603 {0xff, 0x82, 0},
604 {0x4f, 0x80, 0},
605 {0x50, 0x10, 0},
606 {0xff, 0x83, 0},
607
608 {0x02, 0x0a, 0},
609 {0x06, 0x0a, 0},
610 };
611
612 if (!pdata || !cfg) {
613 pr_err("invalid input\n");
614 return -EINVAL;
615 }
616
617 lanes = cfg->num_of_lanes;
618 ports = cfg->num_of_intfs;
619
620 lt9611_write(pdata, 0xff, 0x83);
621 if (lanes == 4)
622 lt9611_write(pdata, 0x00, 0x00);
623 else if (lanes < 4)
624 lt9611_write(pdata, 0x00, lanes);
625 else {
626 pr_err("invalid lane count\n");
627 return -EINVAL;
628 }
629
630 if (ports == 1)
631 lt9611_write(pdata, 0x0a, 0x00);
632 else if (ports == 2)
633 lt9611_write(pdata, 0x0a, 0x03);
634 else {
635 pr_err("invalid port count\n");
636 return -EINVAL;
637 }
638
639 lt9611_write_array(pdata, reg_cfg, sizeof(reg_cfg));
640
641 return 0;
642}
643
644static void lt9611_mipi_video_setup(struct lt9611 *pdata,
645 struct lt9611_video_cfg *cfg)
646{
647 u32 h_total, h_act, hpw, hfp, hss;
648 u32 v_total, v_act, vpw, vfp, vss;
649
650 if (!pdata || !cfg) {
651 pr_err("invalid input\n");
652 return;
653 }
654
655 h_total = cfg->h_active + cfg->h_front_porch +
656 cfg->h_pulse_width + cfg->h_back_porch;
657 v_total = cfg->v_active + cfg->v_front_porch +
658 cfg->v_pulse_width + cfg->v_back_porch;
659
660 h_act = cfg->h_active;
661 hpw = cfg->h_pulse_width;
662 hfp = cfg->h_front_porch;
663 hss = cfg->h_pulse_width + cfg->h_back_porch;
664
665 v_act = cfg->v_active;
666 vpw = cfg->v_pulse_width;
667 vfp = cfg->v_front_porch;
668 vss = cfg->v_pulse_width + cfg->v_back_porch;
669
670 pr_debug("h_total=%d, h_active=%d, hfp=%d, hpw=%d, hbp=%d\n",
671 h_total, cfg->h_active, cfg->h_front_porch,
672 cfg->h_pulse_width, cfg->h_back_porch);
673
674 pr_debug("v_total=%d, v_active=%d, vfp=%d, vpw=%d, vbp=%d\n",
675 v_total, cfg->v_active, cfg->v_front_porch,
676 cfg->v_pulse_width, cfg->v_back_porch);
677
678 lt9611_write(pdata, 0xff, 0x83);
679
680 lt9611_write(pdata, 0x0d, (u8)(v_total / 256));
681 lt9611_write(pdata, 0x0e, (u8)(v_total % 256));
682
683 lt9611_write(pdata, 0x0f, (u8)(v_act / 256));
684 lt9611_write(pdata, 0x10, (u8)(v_act % 256));
685
686 lt9611_write(pdata, 0x11, (u8)(h_total / 256));
687 lt9611_write(pdata, 0x12, (u8)(h_total % 256));
688
689 lt9611_write(pdata, 0x13, (u8)(h_act / 256));
690 lt9611_write(pdata, 0x14, (u8)(h_act % 256));
691
692 lt9611_write(pdata, 0x15, (u8)(vpw % 256));
693 lt9611_write(pdata, 0x16, (u8)(hpw % 256));
694
695 lt9611_write(pdata, 0x17, (u8)(vfp % 256));
696
697 lt9611_write(pdata, 0x18, (u8)(vss % 256));
698
699 lt9611_write(pdata, 0x19, (u8)(hfp % 256));
700
701 lt9611_write(pdata, 0x1a, (u8)(hss / 256));
702 lt9611_write(pdata, 0x1b, (u8)(hss % 256));
703}
704
705static int lt9611_pcr_setup(struct lt9611 *pdata,
706 struct lt9611_video_cfg *cfg)
707{
708 u32 h_act = 0;
709 struct lt9611_reg_cfg reg_cfg[] = {
710 {0xff, 0x83, 0},
Ray Zhang56039f52018-03-07 11:02:21 +0800711 {0x0b, 0x01, 0},
712 {0x0c, 0x10, 0},
713 {0x48, 0x00, 0},
714 {0x49, 0x81, 0},
Ray Zhangebb763a2018-01-22 10:46:40 +0800715
Ray Zhang56039f52018-03-07 11:02:21 +0800716 /* stage 1 */
717 {0x21, 0x4a, 0},
718 {0x24, 0x71, 0},
719 {0x25, 0x30, 0},
720 {0x2a, 0x01, 0},
Ray Zhangebb763a2018-01-22 10:46:40 +0800721
Ray Zhang56039f52018-03-07 11:02:21 +0800722 /* stage 2 */
723 {0x4a, 0x40, 0},
724 {0x1d, 0x10, 0},
725
726 /* MK limit */
727 {0x2d, 0x38, 0},
728 {0x31, 0x08, 0},
Ray Zhangebb763a2018-01-22 10:46:40 +0800729 };
730
731 if (!pdata || !cfg) {
732 pr_err("invalid input\n");
733 return -EINVAL;
734 }
735
Ray Zhang56039f52018-03-07 11:02:21 +0800736 lt9611_write_array(pdata, reg_cfg, sizeof(reg_cfg));
737
Ray Zhangebb763a2018-01-22 10:46:40 +0800738 h_act = cfg->h_active;
739
740 if (h_act == 1920) {
Ray Zhangebb763a2018-01-22 10:46:40 +0800741 lt9611_write(pdata, 0x26, 0x37);
Ray Zhangebb763a2018-01-22 10:46:40 +0800742 } else if (h_act == 3840) {
Ray Zhangebb763a2018-01-22 10:46:40 +0800743 lt9611_write(pdata, 0x0b, 0x03);
744 lt9611_write(pdata, 0x0c, 0xd0);
745 lt9611_write(pdata, 0x48, 0x03);
Ray Zhang56039f52018-03-07 11:02:21 +0800746 lt9611_write(pdata, 0x49, 0xe0);
747 lt9611_write(pdata, 0x24, 0x72);
748 lt9611_write(pdata, 0x25, 0x00);
749 lt9611_write(pdata, 0x2a, 0x01);
Ray Zhangebb763a2018-01-22 10:46:40 +0800750 lt9611_write(pdata, 0x4a, 0x10);
751 lt9611_write(pdata, 0x1d, 0x10);
Ray Zhang56039f52018-03-07 11:02:21 +0800752 lt9611_write(pdata, 0x26, 0x37);
753 } else if (h_act == 640) {
754 lt9611_write(pdata, 0x26, 0x14);
Ray Zhangebb763a2018-01-22 10:46:40 +0800755 }
756
Ray Zhang56039f52018-03-07 11:02:21 +0800757 /* pcr rst */
758 lt9611_write(pdata, 0xff, 0x80);
759 lt9611_write(pdata, 0x11, 0x5a);
760 lt9611_write(pdata, 0x11, 0xfa);
Ray Zhangebb763a2018-01-22 10:46:40 +0800761
762 return 0;
763}
764
765static int lt9611_pll_setup(struct lt9611 *pdata,
766 struct lt9611_video_cfg *cfg)
767{
768 u32 pclk = 0;
769 struct lt9611_reg_cfg reg_cfg[] = {
770 /* txpll init */
771 {0xff, 0x81, 0},
772 {0x23, 0x40, 0},
773 {0x24, 0x64, 0},
774 {0x25, 0x80, 0},
775 {0x26, 0x55, 0},
776 {0x2c, 0x37, 0},
777 {0x2f, 0x01, 0},
778 {0x26, 0x55, 0},
779 {0x27, 0x66, 0},
780 {0x28, 0x88, 0},
781 };
782
783 if (!pdata || !cfg) {
784 pr_err("invalid input\n");
785 return -EINVAL;
786 }
787
788 pclk = cfg->pclk_khz;
789
790 lt9611_write_array(pdata, reg_cfg, sizeof(reg_cfg));
791
792 if (pclk > 150000)
793 lt9611_write(pdata, 0x2d, 0x88);
794 else if (pclk > 70000)
795 lt9611_write(pdata, 0x2d, 0x99);
796 else
797 lt9611_write(pdata, 0x2d, 0xaa);
798
799 lt9611_write(pdata, 0xff, 0x82);
800 pclk = pclk / 2;
801 lt9611_write(pdata, 0xe3, pclk/65536); /* pclk[19:16] */
802 pclk = pclk % 65536;
803 lt9611_write(pdata, 0xe4, pclk/256); /* pclk[15:8] */
804 lt9611_write(pdata, 0xe5, pclk%256); /* pclk[7:0] */
805
806 lt9611_write(pdata, 0xde, 0x20);
807 lt9611_write(pdata, 0xde, 0xe0);
808
809 lt9611_write(pdata, 0xff, 0x80);
810 lt9611_write(pdata, 0x16, 0xf1);
811 lt9611_write(pdata, 0x16, 0xf3);
812
813 return 0;
814}
815
816static int lt9611_video_check(struct lt9611 *pdata)
817{
818 int ret = 0;
819 u32 v_total, v_act, h_act_a, h_act_b, h_total_sysclk;
820 u8 temp = 0;
821
822 if (!pdata) {
823 pr_err("invalid input\n");
824 return -EINVAL;
825 }
826
827 /* top module video check */
828 lt9611_write(pdata, 0xff, 0x82);
829
830 /* v_act */
831 ret = lt9611_read(pdata, 0x82, &temp, 1);
832 if (ret)
833 goto end;
834
835 v_act = temp << 8;
836 ret = lt9611_read(pdata, 0x83, &temp, 1);
837 if (ret)
838 goto end;
839 v_act = v_act + temp;
840
841 /* v_total */
842 ret = lt9611_read(pdata, 0x6c, &temp, 1);
843 if (ret)
844 goto end;
845 v_total = temp << 8;
846 ret = lt9611_read(pdata, 0x6d, &temp, 1);
847 if (ret)
848 goto end;
849 v_total = v_total + temp;
850
851 /* h_total_sysclk */
852 ret = lt9611_read(pdata, 0x86, &temp, 1);
853 if (ret)
854 goto end;
855 h_total_sysclk = temp << 8;
856 ret = lt9611_read(pdata, 0x87, &temp, 1);
857 if (ret)
858 goto end;
859 h_total_sysclk = h_total_sysclk + temp;
860
861 /* h_act_a */
862 lt9611_write(pdata, 0xff, 0x83);
863 ret = lt9611_read(pdata, 0x82, &temp, 1);
864 if (ret)
865 goto end;
866 h_act_a = temp << 8;
867 ret = lt9611_read(pdata, 0x83, &temp, 1);
868 if (ret)
869 goto end;
870 h_act_a = (h_act_a + temp)/3;
871
872 /* h_act_b */
873 lt9611_write(pdata, 0xff, 0x83);
874 ret = lt9611_read(pdata, 0x86, &temp, 1);
875 if (ret)
876 goto end;
877 h_act_b = temp << 8;
878 ret = lt9611_read(pdata, 0x87, &temp, 1);
879 if (ret)
880 goto end;
881 h_act_b = (h_act_b + temp)/3;
882
883 pr_info("video check: h_act_a=%d, h_act_b=%d, v_act=%d, v_total=%d, h_total_sysclk=%d\n",
884 h_act_a, h_act_b, v_act, v_total, h_total_sysclk);
885
886 return 0;
887
888end:
889 pr_err("read video check error\n");
890 return ret;
891}
892
893static int lt9611_hdmi_tx_digital(struct lt9611 *pdata,
894 struct lt9611_video_cfg *cfg)
895{
896 int ret = -EINVAL;
897 u32 checksum, vic;
898
899 if (!pdata || !cfg) {
900 pr_err("invalid input\n");
901 return ret;
902 }
903
904 vic = cfg->vic;
905 checksum = 0x46 - vic;
906
907 lt9611_write(pdata, 0xff, 0x84);
908 lt9611_write(pdata, 0x43, checksum);
909 lt9611_write(pdata, 0x44, 0x84);
910 lt9611_write(pdata, 0x47, vic);
911
912 lt9611_write(pdata, 0xff, 0x82);
913 lt9611_write(pdata, 0xd6, 0x8c);
914 lt9611_write(pdata, 0xd7, 0x04);
915
916 return ret;
917}
918
919static int lt9611_hdmi_tx_phy(struct lt9611 *pdata,
920 struct lt9611_video_cfg *cfg)
921{
922 int ret = -EINVAL;
923 struct lt9611_reg_cfg reg_cfg[] = {
924 {0xff, 0x81, 0},
925 {0x30, 0x6a, 0},
926 {0x31, 0x44, 0}, /* HDMI DC mode */
927 {0x32, 0x4a, 0},
928 {0x33, 0x0b, 0},
929 {0x34, 0x00, 0},
930 {0x35, 0x00, 0},
931 {0x36, 0x00, 0},
932 {0x37, 0x44, 0},
933 {0x3f, 0x0f, 0},
934 {0x40, 0xa0, 0},
935 {0x41, 0xa0, 0},
936 {0x42, 0xa0, 0},
937 {0x43, 0xa0, 0},
938 {0x44, 0x0a, 0},
939 };
940
941 if (!pdata || !cfg) {
942 pr_err("invalid input\n");
943 return ret;
944 }
945
946 /* HDMI AC mode */
947 if (pdata->ac_mode)
948 reg_cfg[2].val = 0x73;
949
950 lt9611_write_array(pdata, reg_cfg, sizeof(reg_cfg));
951
952 return ret;
953}
954
955static void lt9611_hdmi_output_enable(struct lt9611 *pdata)
956{
957 lt9611_write(pdata, 0xff, 0x81);
958 lt9611_write(pdata, 0x30, 0xea);
959}
960
961static void lt9611_hdmi_output_disable(struct lt9611 *pdata)
962{
963 lt9611_write(pdata, 0xff, 0x81);
964 lt9611_write(pdata, 0x30, 0x6a);
965}
966
967static irqreturn_t lt9611_irq_thread_handler(int irq, void *dev_id)
968{
969 struct lt9611 *pdata = dev_id;
970 u8 irq_flag0 = 0;
971 u8 irq_flag3 = 0;
972
973 lt9611_write(pdata, 0xff, 0x82);
974 lt9611_read(pdata, 0x0f, &irq_flag3, 1);
975 lt9611_read(pdata, 0x0c, &irq_flag0, 1);
976
977 /* hpd changed low */
978 if (irq_flag3 & 0x80) {
979 pr_info("hdmi cable disconnected\n");
980
981 lt9611_write(pdata, 0xff, 0x82); /* irq 3 clear flag */
982 lt9611_write(pdata, 0x07, 0xbf);
983 lt9611_write(pdata, 0x07, 0x3f);
984 }
985 /* hpd changed high */
986 if (irq_flag3 & 0x40) {
987 pr_info("hdmi cable connected\n");
988
989 lt9611_write(pdata, 0xff, 0x82); /* irq 3 clear flag */
990 lt9611_write(pdata, 0x07, 0x7f);
991 lt9611_write(pdata, 0x07, 0x3f);
992 }
993
994 /* video input changed */
995 if (irq_flag0 & 0x01) {
996 pr_info("video input changed\n");
997 lt9611_write(pdata, 0xff, 0x82); /* irq 0 clear flag */
998 lt9611_write(pdata, 0x9e, 0xff);
999 lt9611_write(pdata, 0x9e, 0xf7);
1000 lt9611_write(pdata, 0x04, 0xff);
1001 lt9611_write(pdata, 0x04, 0xfe);
1002 }
1003
1004 return IRQ_HANDLED;
1005}
1006
1007static int lt9611_enable_interrupts(struct lt9611 *pdata, int interrupts)
1008{
1009 int ret = 0;
1010 u8 reg_val = 0;
1011 u8 init_reg_val;
1012
1013 if (!pdata) {
1014 pr_err("invalid input\n");
1015 goto end;
1016 }
1017
1018 if (interrupts & CFG_VID_CHK_INTERRUPTS) {
1019 lt9611_write(pdata, 0xff, 0x82);
1020 lt9611_read(pdata, 0x00, &reg_val, 1);
1021
1022 if (reg_val & 0x01) {
1023 init_reg_val = reg_val & 0xfe;
1024 pr_debug("enabling video check interrupts\n");
1025 lt9611_write(pdata, 0x00, init_reg_val);
1026 }
1027 lt9611_write(pdata, 0x04, 0xff); /* clear */
1028 lt9611_write(pdata, 0x04, 0xfe);
1029 }
1030
1031 if (interrupts & CFG_HPD_INTERRUPTS) {
1032 lt9611_write(pdata, 0xff, 0x82);
1033 lt9611_read(pdata, 0x03, &reg_val, 1);
1034
1035 if (reg_val & 0xc0) { //reg_val | 0xc0???
1036 init_reg_val = reg_val & 0x3f;
1037 pr_debug("enabling hpd interrupts\n");
1038 lt9611_write(pdata, 0x03, init_reg_val);
1039 }
1040
1041 lt9611_write(pdata, 0x07, 0xff); //clear
1042 lt9611_write(pdata, 0x07, 0x3f);
1043 }
1044
1045end:
1046 return ret;
1047}
1048
1049static void lt9611_pcr_mk_debug(struct lt9611 *pdata)
1050{
1051 u8 m = 0, k1 = 0, k2 = 0, k3 = 0;
1052
1053 lt9611_write(pdata, 0xff, 0x83);
1054 lt9611_read(pdata, 0xb4, &m, 1);
1055 lt9611_read(pdata, 0xb5, &k1, 1);
1056 lt9611_read(pdata, 0xb6, &k2, 1);
1057 lt9611_read(pdata, 0xb7, &k3, 1);
1058
1059 pr_info("pcr mk:0x%x 0x%x 0x%x 0x%x\n",
1060 m, k1, k2, k3);
1061}
1062
1063static void lt9611_sleep_setup(struct lt9611 *pdata)
1064{
1065 struct lt9611_reg_cfg sleep_setup[] = {
1066 {0xff, 0x80, 0}, //register I2C addr
1067 {0x24, 0x76, 0},
1068 {0x23, 0x01, 0},
1069 {0xff, 0x81, 0}, //set addr pin as output
1070 {0x57, 0x03, 0},
1071 {0x49, 0x0b, 0},
1072 {0xff, 0x81, 0}, //anlog power down
1073 {0x51, 0x30, 0}, //disable IRQ
1074 {0x02, 0x48, 0}, //MIPI Rx power down
1075 {0x23, 0x80, 0},
1076 {0x30, 0x00, 0},
1077 {0x00, 0x01, 0}, //bandgap power down
1078 {0x01, 0x00, 0}, //system clk power down
1079 };
1080
1081 pr_err("sleep\n");
1082
1083 lt9611_write_array(pdata, sleep_setup, sizeof(sleep_setup));
1084}
1085
1086static int lt9611_power_on(struct lt9611 *pdata, bool on)
1087{
1088 int ret = 0;
1089
1090 pr_debug("power_on: on=%d\n", on);
1091
1092 if (on && !pdata->power_on) {
1093 lt9611_write_array(pdata, lt9611_init_setup,
1094 sizeof(lt9611_init_setup));
1095
1096 ret = lt9611_enable_interrupts(pdata, CFG_HPD_INTERRUPTS);
1097 if (ret) {
1098 pr_err("Failed to enable HPD intr %d\n", ret);
1099 return ret;
1100 }
1101 pdata->power_on = true;
1102 } else if (!on) {
1103 lt9611_write(pdata, 0xff, 0x81);
1104 lt9611_write(pdata, 0x30, 0x6a);
1105
1106 pdata->power_on = false;
1107 }
1108
1109 return ret;
1110}
1111
1112static int lt9611_video_on(struct lt9611 *pdata, bool on)
1113{
1114 int ret = 0;
1115 struct lt9611_video_cfg *cfg = &pdata->video_cfg;
1116
1117 pr_debug("on=%d\n", on);
1118
1119 if (on) {
1120 lt9611_mipi_input_analog(pdata, cfg);
1121 lt9611_mipi_input_digital(pdata, cfg);
1122 lt9611_pll_setup(pdata, cfg);
1123 lt9611_mipi_video_setup(pdata, cfg);
1124 lt9611_pcr_setup(pdata, cfg);
1125 lt9611_hdmi_tx_digital(pdata, cfg);
1126 lt9611_hdmi_tx_phy(pdata, cfg);
1127
1128 msleep(500);
1129
1130 lt9611_video_check(pdata);
1131 lt9611_hdmi_output_enable(pdata);
1132 } else {
1133 lt9611_hdmi_output_disable(pdata);
1134 }
1135
1136 return ret;
1137}
1138
1139static void lt9611_mipi_byte_clk_debug(struct lt9611 *pdata)
1140{
1141 u8 reg_val = 0;
1142 u32 byte_clk;
1143
1144 /* port A byte clk meter */
1145 lt9611_write(pdata, 0xff, 0x82);
1146 lt9611_write(pdata, 0xc7, 0x03); /* port A */
1147 msleep(50);
1148 lt9611_read(pdata, 0xcd, &reg_val, 1);
1149
1150 if ((reg_val & 0x60) == 0x60) {
1151 byte_clk = (reg_val & 0x0f) * 65536;
1152 lt9611_read(pdata, 0xce, &reg_val, 1);
1153 byte_clk = byte_clk + reg_val * 256;
1154 lt9611_read(pdata, 0xcf, &reg_val, 1);
1155 byte_clk = byte_clk + reg_val;
1156
1157 pr_info("port A byte clk = %d khz,\n", byte_clk);
1158 } else
1159 pr_info("port A byte clk unstable\n");
1160
1161 /* port B byte clk meter */
1162 lt9611_write(pdata, 0xff, 0x82);
1163 lt9611_write(pdata, 0xc7, 0x04); /* port B */
1164 msleep(50);
1165 lt9611_read(pdata, 0xcd, &reg_val, 1);
1166
1167 if ((reg_val & 0x60) == 0x60) {
1168 byte_clk = (reg_val & 0x0f) * 65536;
1169 lt9611_read(pdata, 0xce, &reg_val, 1);
1170 byte_clk = byte_clk + reg_val * 256;
1171 lt9611_read(pdata, 0xcf, &reg_val, 1);
1172 byte_clk = byte_clk + reg_val;
1173
1174 pr_info("port B byte clk = %d khz,\n", byte_clk);
1175 } else
1176 pr_info("port B byte clk unstable\n");
1177}
1178
1179static void lt9611_reset(struct lt9611 *pdata)
1180{
1181 gpio_set_value(pdata->reset_gpio, 1);
1182 msleep(20);
1183 gpio_set_value(pdata->reset_gpio, 0);
1184 msleep(20);
1185 gpio_set_value(pdata->reset_gpio, 1);
1186 msleep(20);
1187}
1188
1189static void lt9611_assert_5v(struct lt9611 *pdata)
1190{
1191 if (gpio_is_valid(pdata->hdmi_en_gpio)) {
1192 gpio_set_value(pdata->hdmi_en_gpio, 1);
1193 msleep(20);
1194 }
1195}
1196
1197static int lt9611_config_vreg(struct device *dev,
1198 struct lt9611_vreg *in_vreg, int num_vreg, bool config)
1199{
1200 int i = 0, rc = 0;
1201 struct lt9611_vreg *curr_vreg = NULL;
1202
1203 if (!in_vreg || !num_vreg)
1204 return rc;
1205
1206 if (config) {
1207 for (i = 0; i < num_vreg; i++) {
1208 curr_vreg = &in_vreg[i];
1209 curr_vreg->vreg = regulator_get(dev,
1210 curr_vreg->vreg_name);
1211 rc = PTR_RET(curr_vreg->vreg);
1212 if (rc) {
1213 pr_err("%s get failed. rc=%d\n",
1214 curr_vreg->vreg_name, rc);
1215 curr_vreg->vreg = NULL;
1216 goto vreg_get_fail;
1217 }
1218
1219 rc = regulator_set_voltage(
1220 curr_vreg->vreg,
1221 curr_vreg->min_voltage,
1222 curr_vreg->max_voltage);
1223 if (rc < 0) {
1224 pr_err("%s set vltg fail\n",
1225 curr_vreg->vreg_name);
1226 goto vreg_set_voltage_fail;
1227 }
1228 }
1229 } else {
1230 for (i = num_vreg-1; i >= 0; i--) {
1231 curr_vreg = &in_vreg[i];
1232 if (curr_vreg->vreg) {
1233 regulator_set_voltage(curr_vreg->vreg,
1234 0, curr_vreg->max_voltage);
1235
1236 regulator_put(curr_vreg->vreg);
1237 curr_vreg->vreg = NULL;
1238 }
1239 }
1240 }
1241 return 0;
1242
1243vreg_unconfig:
1244 regulator_set_load(curr_vreg->vreg, 0);
1245
1246vreg_set_voltage_fail:
1247 regulator_put(curr_vreg->vreg);
1248 curr_vreg->vreg = NULL;
1249
1250vreg_get_fail:
1251 for (i--; i >= 0; i--) {
1252 curr_vreg = &in_vreg[i];
1253 goto vreg_unconfig;
1254 }
1255 return rc;
1256}
1257
1258static int lt9611_get_dt_supply(struct device *dev,
1259 struct lt9611 *pdata)
1260{
1261 int i = 0, rc = 0;
1262 u32 tmp = 0;
1263 struct device_node *of_node = NULL, *supply_root_node = NULL;
1264 struct device_node *supply_node = NULL;
1265
1266 if (!dev || !pdata) {
1267 pr_err("invalid input param dev:%pK pdata:%pK\n", dev, pdata);
1268 return -EINVAL;
1269 }
1270
1271 of_node = dev->of_node;
1272
1273 pdata->num_vreg = 0;
1274 supply_root_node = of_get_child_by_name(of_node,
1275 "lt,supply-entries");
1276 if (!supply_root_node) {
1277 pr_info("no supply entry present\n");
1278 return 0;
1279 }
1280
1281 pdata->num_vreg = of_get_available_child_count(supply_root_node);
1282 if (pdata->num_vreg == 0) {
1283 pr_info("no vreg present\n");
1284 return 0;
1285 }
1286
1287 pr_debug("vreg found. count=%d\n", pdata->num_vreg);
1288 pdata->vreg_config = devm_kzalloc(dev, sizeof(struct lt9611_vreg) *
1289 pdata->num_vreg, GFP_KERNEL);
1290 if (!pdata->vreg_config)
1291 return -ENOMEM;
1292
1293 for_each_available_child_of_node(supply_root_node, supply_node) {
1294 const char *st = NULL;
1295
1296 rc = of_property_read_string(supply_node,
1297 "lt,supply-name", &st);
1298 if (rc) {
1299 pr_err("error reading name. rc=%d\n", rc);
1300 goto error;
1301 }
1302
1303 strlcpy(pdata->vreg_config[i].vreg_name, st,
1304 sizeof(pdata->vreg_config[i].vreg_name));
1305
1306 rc = of_property_read_u32(supply_node,
1307 "lt,supply-min-voltage", &tmp);
1308 if (rc) {
1309 pr_err("error reading min volt. rc=%d\n", rc);
1310 goto error;
1311 }
1312 pdata->vreg_config[i].min_voltage = tmp;
1313
1314 rc = of_property_read_u32(supply_node,
1315 "lt,supply-max-voltage", &tmp);
1316 if (rc) {
1317 pr_err("error reading max volt. rc=%d\n", rc);
1318 goto error;
1319 }
1320 pdata->vreg_config[i].max_voltage = tmp;
1321
1322 rc = of_property_read_u32(supply_node,
1323 "lt,supply-enable-load", &tmp);
1324 if (rc)
1325 pr_debug("no supply enable load value. rc=%d\n", rc);
1326
1327 pdata->vreg_config[i].enable_load = (!rc ? tmp : 0);
1328
1329 rc = of_property_read_u32(supply_node,
1330 "lt,supply-disable-load", &tmp);
1331 if (rc)
1332 pr_debug("no supply disable load value. rc=%d\n", rc);
1333
1334 pdata->vreg_config[i].disable_load = (!rc ? tmp : 0);
1335
1336 rc = of_property_read_u32(supply_node,
1337 "lt,supply-pre-on-sleep", &tmp);
1338 if (rc)
1339 pr_debug("no supply pre on sleep value. rc=%d\n", rc);
1340
1341 pdata->vreg_config[i].pre_on_sleep = (!rc ? tmp : 0);
1342
1343 rc = of_property_read_u32(supply_node,
1344 "lt,supply-pre-off-sleep", &tmp);
1345 if (rc)
1346 pr_debug("no supply pre off sleep value. rc=%d\n", rc);
1347
1348 pdata->vreg_config[i].pre_off_sleep = (!rc ? tmp : 0);
1349
1350 rc = of_property_read_u32(supply_node,
1351 "lt,supply-post-on-sleep", &tmp);
1352 if (rc)
1353 pr_debug("no supply post on sleep value. rc=%d\n", rc);
1354
1355 pdata->vreg_config[i].post_on_sleep = (!rc ? tmp : 0);
1356
1357 rc = of_property_read_u32(supply_node,
1358 "lt,supply-post-off-sleep", &tmp);
1359 if (rc)
1360 pr_debug("no supply post off sleep value. rc=%d\n", rc);
1361
1362 pdata->vreg_config[i].post_off_sleep = (!rc ? tmp : 0);
1363
1364 pr_debug("%s min=%d, max=%d, enable=%d, disable=%d, preonsleep=%d, postonsleep=%d, preoffsleep=%d, postoffsleep=%d\n",
1365 pdata->vreg_config[i].vreg_name,
1366 pdata->vreg_config[i].min_voltage,
1367 pdata->vreg_config[i].max_voltage,
1368 pdata->vreg_config[i].enable_load,
1369 pdata->vreg_config[i].disable_load,
1370 pdata->vreg_config[i].pre_on_sleep,
1371 pdata->vreg_config[i].post_on_sleep,
1372 pdata->vreg_config[i].pre_off_sleep,
1373 pdata->vreg_config[i].post_off_sleep);
1374 ++i;
1375
1376 rc = 0;
1377 }
1378
1379 rc = lt9611_config_vreg(dev,
1380 pdata->vreg_config, pdata->num_vreg, true);
1381 if (rc)
1382 goto error;
1383
1384 return rc;
1385
1386error:
1387 if (pdata->vreg_config) {
1388 devm_kfree(dev, pdata->vreg_config);
1389 pdata->vreg_config = NULL;
1390 pdata->num_vreg = 0;
1391 }
1392
1393 return rc;
1394}
1395
1396static void lt9611_put_dt_supply(struct device *dev,
1397 struct lt9611 *pdata)
1398{
1399 if (!dev || !pdata) {
1400 pr_err("invalid input param dev:%pK pdata:%pK\n", dev, pdata);
1401 return;
1402 }
1403
1404 lt9611_config_vreg(dev,
1405 pdata->vreg_config, pdata->num_vreg, false);
1406
1407 if (pdata->vreg_config) {
1408 devm_kfree(dev, pdata->vreg_config);
1409 pdata->vreg_config = NULL;
1410 }
1411 pdata->num_vreg = 0;
1412}
1413
1414static int lt9611_enable_vreg(struct lt9611 *pdata, int enable)
1415{
1416 int i = 0, rc = 0;
1417 bool need_sleep;
1418 struct lt9611_vreg *in_vreg = pdata->vreg_config;
1419 int num_vreg = pdata->num_vreg;
1420
1421 if (enable) {
1422 for (i = 0; i < num_vreg; i++) {
1423 rc = PTR_RET(in_vreg[i].vreg);
1424 if (rc) {
1425 pr_err("%s regulator error. rc=%d\n",
1426 in_vreg[i].vreg_name, rc);
1427 goto vreg_set_opt_mode_fail;
1428 }
1429 need_sleep = !regulator_is_enabled(in_vreg[i].vreg);
1430 if (in_vreg[i].pre_on_sleep && need_sleep)
1431 usleep_range(in_vreg[i].pre_on_sleep * 1000,
1432 in_vreg[i].pre_on_sleep * 1000);
1433 rc = regulator_set_load(in_vreg[i].vreg,
1434 in_vreg[i].enable_load);
1435 if (rc < 0) {
1436 pr_err("%s set opt m fail\n",
1437 in_vreg[i].vreg_name);
1438 goto vreg_set_opt_mode_fail;
1439 }
1440 rc = regulator_enable(in_vreg[i].vreg);
1441 if (in_vreg[i].post_on_sleep && need_sleep)
1442 usleep_range(in_vreg[i].post_on_sleep * 1000,
1443 in_vreg[i].post_on_sleep * 1000);
1444 if (rc < 0) {
1445 pr_err("%s enable failed\n",
1446 in_vreg[i].vreg_name);
1447 goto disable_vreg;
1448 }
1449 }
1450 } else {
1451 for (i = num_vreg-1; i >= 0; i--) {
1452 if (in_vreg[i].pre_off_sleep)
1453 usleep_range(in_vreg[i].pre_off_sleep * 1000,
1454 in_vreg[i].pre_off_sleep * 1000);
1455 regulator_set_load(in_vreg[i].vreg,
1456 in_vreg[i].disable_load);
1457 regulator_disable(in_vreg[i].vreg);
1458 if (in_vreg[i].post_off_sleep)
1459 usleep_range(in_vreg[i].post_off_sleep * 1000,
1460 in_vreg[i].post_off_sleep * 1000);
1461 }
1462 }
1463 return rc;
1464
1465disable_vreg:
1466 regulator_set_load(in_vreg[i].vreg, in_vreg[i].disable_load);
1467
1468vreg_set_opt_mode_fail:
1469 for (i--; i >= 0; i--) {
1470 if (in_vreg[i].pre_off_sleep)
1471 usleep_range(in_vreg[i].pre_off_sleep * 1000,
1472 in_vreg[i].pre_off_sleep * 1000);
1473 regulator_set_load(in_vreg[i].vreg,
1474 in_vreg[i].disable_load);
1475 regulator_disable(in_vreg[i].vreg);
1476 if (in_vreg[i].post_off_sleep)
1477 usleep_range(in_vreg[i].post_off_sleep * 1000,
1478 in_vreg[i].post_off_sleep * 1000);
1479 }
1480
1481 return rc;
1482}
1483
1484static struct lt9611_timing_info *lt9611_get_supported_timing(
1485 struct drm_display_mode *mode) {
1486 int i = 0;
1487
1488 while (lt9611_supp_timing_cfg[i].xres != 0xffff) {
1489 if (lt9611_supp_timing_cfg[i].xres == mode->hdisplay &&
1490 lt9611_supp_timing_cfg[i].yres == mode->vdisplay &&
1491 lt9611_supp_timing_cfg[i].fps ==
1492 drm_mode_vrefresh(mode)) {
1493 return &lt9611_supp_timing_cfg[i];
1494 }
1495 i++;
1496 }
1497
1498 return NULL;
1499}
1500
1501/* TODO: intf/lane number needs info from both DSI host and client */
1502static int lt9611_get_intf_num(struct lt9611 *pdata,
1503 struct drm_display_mode *mode)
1504{
1505 int num_of_intfs = 0;
1506 struct lt9611_timing_info *timing =
1507 lt9611_get_supported_timing(mode);
1508
1509 if (timing)
1510 num_of_intfs = timing->intfs;
1511 else {
1512 pr_err("interface number not defined by bridge chip\n");
1513 num_of_intfs = 0;
1514 }
1515
1516 return num_of_intfs;
1517}
1518
1519static int lt9611_get_lane_num(struct lt9611 *pdata,
1520 struct drm_display_mode *mode)
1521{
1522 int num_of_lanes = 0;
1523 struct lt9611_timing_info *timing =
1524 lt9611_get_supported_timing(mode);
1525
1526 if (timing)
1527 num_of_lanes = timing->lanes;
1528 else {
1529 pr_err("lane number not defined by bridge chip\n");
1530 num_of_lanes = 0;
1531 }
1532
1533 return num_of_lanes;
1534}
1535
1536static void lt9611_get_video_cfg(struct lt9611 *pdata,
1537 struct drm_display_mode *mode,
1538 struct lt9611_video_cfg *video_cfg)
1539{
1540 int rc = 0;
1541 struct hdmi_avi_infoframe avi_frame;
1542
1543 memset(&avi_frame, 0, sizeof(avi_frame));
1544
1545 video_cfg->h_active = mode->hdisplay;
1546 video_cfg->v_active = mode->vdisplay;
1547 video_cfg->h_front_porch = mode->hsync_start - mode->hdisplay;
1548 video_cfg->v_front_porch = mode->vsync_start - mode->vdisplay;
1549 video_cfg->h_back_porch = mode->htotal - mode->hsync_end;
1550 video_cfg->v_back_porch = mode->vtotal - mode->vsync_end;
1551 video_cfg->h_pulse_width = mode->hsync_end - mode->hsync_start;
1552 video_cfg->v_pulse_width = mode->vsync_end - mode->vsync_start;
1553 video_cfg->pclk_khz = mode->clock;
1554
1555 video_cfg->h_polarity = !!(mode->flags & DRM_MODE_FLAG_PHSYNC);
1556 video_cfg->v_polarity = !!(mode->flags & DRM_MODE_FLAG_PVSYNC);
1557
1558 video_cfg->num_of_lanes = lt9611_get_lane_num(pdata, mode);
1559 video_cfg->num_of_intfs = lt9611_get_intf_num(pdata, mode);
1560
1561 pr_debug("video=h[%d,%d,%d,%d] v[%d,%d,%d,%d] pclk=%d lane=%d intf=%d\n",
1562 video_cfg->h_active, video_cfg->h_front_porch,
1563 video_cfg->h_pulse_width, video_cfg->h_back_porch,
1564 video_cfg->v_active, video_cfg->v_front_porch,
1565 video_cfg->v_pulse_width, video_cfg->v_back_porch,
1566 video_cfg->pclk_khz, video_cfg->num_of_lanes,
1567 video_cfg->num_of_intfs);
1568
1569 rc = drm_hdmi_avi_infoframe_from_display_mode(&avi_frame, mode);
1570 if (rc) {
1571 pr_err("get avi frame failed ret=%d\n", rc);
1572 } else {
1573 video_cfg->scaninfo = avi_frame.scan_mode;
1574 video_cfg->ar = avi_frame.picture_aspect;
1575 video_cfg->vic = avi_frame.video_code;
1576 pr_debug("scaninfo=%d ar=%d vic=%d\n",
1577 video_cfg->scaninfo, video_cfg->ar, video_cfg->vic);
1578 }
1579}
1580
1581/* connector funcs */
1582static enum drm_connector_status
1583lt9611_connector_detect(struct drm_connector *connector, bool force)
1584{
1585 struct lt9611 *pdata = connector_to_lt9611(connector);
1586
1587 if (!pdata->non_pluggable) {
1588 u8 reg_val = 0;
1589 int connected = 0;
1590
1591 lt9611_write(pdata, 0xff, 0x82);
1592 lt9611_read(pdata, 0x5e, &reg_val, 1);
1593 connected = (reg_val & BIT(2));
1594 pr_debug("connected = %x\n", connected);
1595
1596 pdata->status = connected ? connector_status_connected :
1597 connector_status_disconnected;
1598 } else
1599 pdata->status = connector_status_connected;
1600
1601 return pdata->status;
1602}
1603
1604static int lt9611_read_edid(struct lt9611 *pdata)
1605{
1606 int ret = 0;
1607 u8 i, j;
1608 u8 temp = 0;
1609
1610 if (!pdata) {
1611 pr_err("invalid input\n");
1612 return -EINVAL;
1613 }
1614
1615 memset(pdata->edid_buf, 0, EDID_SEG_SIZE);
1616
1617 lt9611_write(pdata, 0xff, 0x85);
1618 lt9611_write(pdata, 0x03, 0xc9);
1619 lt9611_write(pdata, 0x04, 0xa0); /* 0xA0 is EDID device address */
1620 lt9611_write(pdata, 0x05, 0x00); /* 0x00 is EDID offset address */
1621 lt9611_write(pdata, 0x06, 0x20); /* length for read */
1622 lt9611_write(pdata, 0x14, 0x7f);
1623
1624 for (i = 0 ; i < 8 ; i++) {
1625 lt9611_write(pdata, 0x05, i * 32); /* offset address */
1626 lt9611_write(pdata, 0x07, 0x36);
1627 lt9611_write(pdata, 0x07, 0x31);
1628 lt9611_write(pdata, 0x07, 0x37);
1629 usleep_range(5000, 10000);
1630
1631 lt9611_read(pdata, 0x40, &temp, 1);
1632
1633 if (temp & 0x02) { /*KEY_DDC_ACCS_DONE=1*/
1634 for (j = 0; j < 32; j++) {
1635 lt9611_read(pdata, 0x83,
1636 &(pdata->edid_buf[i*32+j]), 1);
1637 }
1638 } else if (temp & 0x50) { /* DDC No Ack or Abitration lost */
1639 pr_err("read edid failed: no ack\n");
1640 ret = -EIO;
1641 goto end;
1642 } else {
1643 pr_err("read edid failed: access not done\n");
1644 ret = -EIO;
1645 goto end;
1646 }
1647 }
1648
1649 pr_debug("read edid succeeded, checksum = 0x%x\n",
1650 pdata->edid_buf[255]);
1651
1652end:
1653 lt9611_write(pdata, 0x07, 0x1f);
1654 return ret;
1655}
1656
1657/* TODO: add support for more extenstion blocks */
1658static int lt9611_get_edid_block(void *data, u8 *buf, unsigned int block,
1659 size_t len)
1660{
1661 struct lt9611 *pdata = data;
1662 int ret = 0;
1663
1664 pr_debug("get edid block: block=%d, len=%d\n", block, (int)len);
1665
1666 if (len > 128)
1667 return -EINVAL;
1668
1669 /* support up to 1 extension block */
1670 if (block > 1)
1671 return -EINVAL;
1672
1673 if (block == 0) {
1674 /* always read 2 edid blocks once */
1675 ret = lt9611_read_edid(pdata);
1676 if (ret) {
1677 pr_err("edid read failed\n");
1678 return ret;
1679 }
1680 }
1681
1682 if (block % 2 == 0)
1683 memcpy(buf, pdata->edid_buf, len);
1684 else
1685 memcpy(buf, pdata->edid_buf + 128, len);
1686
1687 return 0;
1688}
1689
1690static int lt9611_connector_get_modes(struct drm_connector *connector)
1691{
1692 struct lt9611 *pdata = connector_to_lt9611(connector);
1693 struct drm_display_mode *mode, *m;
1694 unsigned int count = 0;
1695
1696 pr_debug("get modes\n");
1697
1698 if (pdata->non_pluggable) {
1699 list_for_each_entry(mode, &pdata->mode_list, head) {
1700 m = drm_mode_duplicate(connector->dev, mode);
1701 if (!m) {
1702 pr_err("failed to add hdmi mode %dx%d\n",
1703 mode->hdisplay, mode->vdisplay);
1704 break;
1705 }
1706 drm_mode_probed_add(connector, m);
1707 }
1708 count = pdata->num_of_modes;
1709 } else {
1710 struct edid *edid;
1711
1712 if (!pdata->power_on)
1713 lt9611_power_on(pdata, true);
1714 edid = drm_do_get_edid(connector, lt9611_get_edid_block, pdata);
1715
1716 drm_mode_connector_update_edid_property(connector, edid);
1717 count = drm_add_edid_modes(connector, edid);
1718
1719 pdata->hdmi_mode = drm_detect_hdmi_monitor(edid);
1720 pr_debug("hdmi_mode = %d\n", pdata->hdmi_mode);
1721
1722 /* TODO: this should not be hard coded */
1723 drm_set_preferred_mode(connector, 1920, 1080);
1724
1725 kfree(edid);
1726 }
1727
1728 return count;
1729}
1730
1731static enum drm_mode_status lt9611_connector_mode_valid(
1732 struct drm_connector *connector, struct drm_display_mode *mode)
1733{
1734 struct lt9611_timing_info *timing =
1735 lt9611_get_supported_timing(mode);
1736
1737 return timing ? MODE_OK : MODE_BAD;
1738}
1739
1740/* bridge funcs */
1741static void lt9611_bridge_enable(struct drm_bridge *bridge)
1742{
1743 struct lt9611 *pdata = bridge_to_lt9611(bridge);
1744
1745 pr_debug("bridge enable\n");
1746
1747 if (lt9611_power_on(pdata, true)) {
1748 pr_err("power on failed\n");
1749 return;
1750 }
1751
1752 if (lt9611_video_on(pdata, true)) {
1753 pr_err("video on failed\n");
1754 return;
1755 }
1756}
1757
1758static void lt9611_bridge_disable(struct drm_bridge *bridge)
1759{
1760 struct lt9611 *pdata = bridge_to_lt9611(bridge);
1761
1762 pr_debug("bridge disable\n");
1763
1764 if (lt9611_video_on(pdata, false)) {
1765 pr_err("video on failed\n");
1766 return;
1767 }
1768
1769 if (lt9611_power_on(pdata, false)) {
1770 pr_err("power on failed\n");
1771 return;
1772 }
1773}
1774
1775static void lt9611_bridge_mode_set(struct drm_bridge *bridge,
1776 struct drm_display_mode *mode,
1777 struct drm_display_mode *adj_mode)
1778{
1779 struct lt9611 *pdata = bridge_to_lt9611(bridge);
1780 struct lt9611_video_cfg *video_cfg = &pdata->video_cfg;
1781 int ret = 0;
1782
1783 pr_debug("bridge mode_set: hdisplay=%d, vdisplay=%d, vrefresh=%d, clock=%d\n",
1784 adj_mode->hdisplay, adj_mode->vdisplay,
1785 adj_mode->vrefresh, adj_mode->clock);
1786
1787 drm_mode_copy(&pdata->curr_mode, adj_mode);
1788
1789 memset(video_cfg, 0, sizeof(struct lt9611_video_cfg));
1790 lt9611_get_video_cfg(pdata, adj_mode, video_cfg);
1791
1792 /* TODO: update intf number of host */
1793 if (video_cfg->num_of_lanes != pdata->dsi->lanes) {
1794 mipi_dsi_detach(pdata->dsi);
1795 pdata->dsi->lanes = video_cfg->num_of_lanes;
1796 ret = mipi_dsi_attach(pdata->dsi);
1797 if (ret)
1798 pr_err("failed to change host lanes\n");
1799 }
1800}
1801
1802static int lt9611_bridge_attach(struct drm_bridge *bridge)
1803{
1804 struct mipi_dsi_host *host;
1805 struct mipi_dsi_device *dsi;
1806 struct lt9611 *pdata = bridge_to_lt9611(bridge);
1807 int ret;
1808 const struct mipi_dsi_device_info info = { .type = "lt9611",
1809 .channel = 0,
1810 .node = NULL,
1811 };
1812
1813 pr_debug("bridge attach\n");
1814
1815 if (!bridge->encoder) {
1816 DRM_ERROR("Parent encoder object not found");
1817 return -ENODEV;
1818 }
1819
1820 host = of_find_mipi_dsi_host_by_node(pdata->host_node);
1821 if (!host) {
1822 pr_err("failed to find dsi host\n");
1823 return -EPROBE_DEFER;
1824 }
1825
1826 dsi = mipi_dsi_device_register_full(host, &info);
1827 if (IS_ERR(dsi)) {
1828 pr_err("failed to create dsi device\n");
1829 ret = PTR_ERR(dsi);
1830 goto err_dsi_device;
1831 }
1832
1833 dsi->lanes = 4;
1834 dsi->format = MIPI_DSI_FMT_RGB888;
1835 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1836 MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO_BLLP |
1837 MIPI_DSI_MODE_VIDEO_EOF_BLLP;
1838
1839 ret = mipi_dsi_attach(dsi);
1840 if (ret < 0) {
1841 pr_err("failed to attach dsi to host\n");
1842 goto err_dsi_attach;
1843 }
1844
1845 pdata->dsi = dsi;
1846
1847 return 0;
1848
1849err_dsi_attach:
1850 mipi_dsi_device_unregister(dsi);
1851err_dsi_device:
1852 return ret;
1853}
1854
1855static void lt9611_bridge_pre_enable(struct drm_bridge *bridge)
1856{
1857 struct lt9611 *pdata = bridge_to_lt9611(bridge);
1858
1859 pr_debug("bridge pre_enable\n");
1860
1861 lt9611_reset(pdata);
1862
1863 lt9611_write(pdata, 0xff, 0x80);
1864 lt9611_write(pdata, 0xee, 0x01);
1865}
1866
1867static bool lt9611_bridge_mode_fixup(struct drm_bridge *bridge,
1868 const struct drm_display_mode *mode,
1869 struct drm_display_mode *adjusted_mode)
1870{
1871 pr_debug("bridge mode_fixup\n");
1872
1873 return true;
1874}
1875
1876static void lt9611_bridge_post_disable(struct drm_bridge *bridge)
1877{
1878 struct lt9611 *pdata = bridge_to_lt9611(bridge);
1879
1880 pr_debug("bridge post_disable\n");
1881
1882 lt9611_sleep_setup(pdata);
1883}
1884
1885static struct drm_connector_funcs override_funcs;
1886static struct drm_connector_helper_funcs override_helper_private;
1887
1888static int lt9611_bridge_connector_init(struct drm_bridge *bridge,
1889 struct drm_connector *connector)
1890{
1891 pr_debug("bridge connector_init\n");
1892
1893 if (connector->encoder != bridge->encoder) {
1894 pr_err("bridge and connector need attach to the same encoder\n");
1895 return -EINVAL;
1896 }
1897
1898 connector->private = bridge;
1899
1900 /*
1901 * Make a copy of drm_connector_funcs and drm_connector_helper_funcs. To
1902 * make sure other KMS components won't be broken. For example, if other
1903 * connectors share the implementation for ->funs, overwriting this will
1904 * break other connectors.
1905 */
1906 override_funcs = *connector->funcs;
1907 override_funcs.detect = lt9611_connector_detect;
1908 connector->funcs = &override_funcs;
1909
1910 override_helper_private = *connector->helper_private;
1911 override_helper_private.get_modes = lt9611_connector_get_modes;
1912 override_helper_private.mode_valid = lt9611_connector_mode_valid;
1913 connector->helper_private = &override_helper_private;
1914
1915 return 0;
1916}
1917
1918static const struct drm_bridge_funcs lt9611_bridge_funcs = {
1919 .attach = lt9611_bridge_attach,
1920 .mode_fixup = lt9611_bridge_mode_fixup,
1921 .pre_enable = lt9611_bridge_pre_enable,
1922 .enable = lt9611_bridge_enable,
1923 .disable = lt9611_bridge_disable,
1924 .post_disable = lt9611_bridge_post_disable,
1925 .mode_set = lt9611_bridge_mode_set,
1926 .connector_init = lt9611_bridge_connector_init,
1927};
1928
1929/* sysfs */
1930static int lt9611_dump_debug_info(struct lt9611 *pdata)
1931{
1932 if (!pdata->power_on) {
1933 pr_err("device is not power on\n");
1934 return -EINVAL;
1935 }
1936
1937 lt9611_video_check(pdata);
1938
1939 lt9611_pcr_mk_debug(pdata);
1940
1941 lt9611_mipi_byte_clk_debug(pdata);
1942
1943 return 0;
1944}
1945
1946static ssize_t lt9611_dump_info_wta_attr(struct device *dev,
1947 struct device_attribute *attr,
1948 const char *buf,
1949 size_t count)
1950{
1951 struct lt9611 *pdata = dev_get_drvdata(dev);
1952
1953 if (!pdata) {
1954 pr_err("pdata is NULL\n");
1955 return -EINVAL;
1956 }
1957
1958 lt9611_dump_debug_info(pdata);
1959
1960 return count;
1961}
1962
1963static DEVICE_ATTR(dump_info, 0200, NULL, lt9611_dump_info_wta_attr);
1964
1965static struct attribute *lt9611_sysfs_attrs[] = {
1966 &dev_attr_dump_info.attr,
1967 NULL,
1968};
1969
1970static struct attribute_group lt9611_sysfs_attr_grp = {
1971 .attrs = lt9611_sysfs_attrs,
1972};
1973
1974static int lt9611_sysfs_init(struct device *dev)
1975{
1976 int rc = 0;
1977
1978 if (!dev) {
1979 pr_err("%s: Invalid params\n", __func__);
1980 return -EINVAL;
1981 }
1982
1983 rc = sysfs_create_group(&dev->kobj, &lt9611_sysfs_attr_grp);
1984 if (rc)
1985 pr_err("%s: sysfs group creation failed %d\n", __func__, rc);
1986
1987 return rc;
1988}
1989
1990static void lt9611_sysfs_remove(struct device *dev)
1991{
1992 if (!dev) {
1993 pr_err("%s: Invalid params\n", __func__);
1994 return;
1995 }
1996
1997 sysfs_remove_group(&dev->kobj, &lt9611_sysfs_attr_grp);
1998}
1999
2000static int lt9611_probe(struct i2c_client *client,
2001 const struct i2c_device_id *id)
2002{
2003 struct lt9611 *pdata;
2004 int ret = 0;
2005
2006 if (!client || !client->dev.of_node) {
2007 pr_err("invalid input\n");
2008 return -EINVAL;
2009 }
2010
2011 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
2012 pr_err("device doesn't support I2C\n");
2013 return -ENODEV;
2014 }
2015
2016 pdata = devm_kzalloc(&client->dev,
2017 sizeof(struct lt9611), GFP_KERNEL);
2018 if (!pdata)
2019 return -ENOMEM;
2020
2021 ret = lt9611_parse_dt(&client->dev, pdata);
2022 if (ret) {
2023 pr_err("failed to parse device tree\n");
2024 goto err_dt_parse;
2025 }
2026
2027 ret = lt9611_get_dt_supply(&client->dev, pdata);
2028 if (ret) {
2029 pr_err("failed to get dt supply\n");
2030 goto err_dt_parse;
2031 }
2032
2033 pdata->dev = &client->dev;
2034 pdata->i2c_client = client;
2035 pr_debug("I2C address is %x\n", client->addr);
2036
2037 ret = lt9611_gpio_configure(pdata, true);
2038 if (ret) {
2039 pr_err("failed to configure GPIOs\n");
2040 goto err_dt_supply;
2041 }
2042
2043 lt9611_assert_5v(pdata);
2044
2045 ret = lt9611_enable_vreg(pdata, true);
2046 if (ret) {
2047 pr_err("failed to enable vreg\n");
2048 goto err_dt_supply;
2049 }
2050
2051 lt9611_reset(pdata);
2052
2053 ret = lt9611_read_device_rev(pdata);
2054 if (ret) {
2055 pr_err("failed to read chip rev\n");
2056 goto err_i2c_prog;
2057 }
2058
2059 pdata->irq = gpio_to_irq(pdata->irq_gpio);
2060 ret = request_threaded_irq(pdata->irq, NULL, lt9611_irq_thread_handler,
2061 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, "lt9611", pdata);
2062 if (ret) {
2063 pr_err("failed to request irq\n");
2064 goto err_i2c_prog;
2065 }
2066
2067 i2c_set_clientdata(client, pdata);
2068 dev_set_drvdata(&client->dev, pdata);
2069
2070 ret = lt9611_sysfs_init(&client->dev);
2071 if (ret) {
2072 pr_err("sysfs init failed\n");
2073 goto err_sysfs_init;
2074 }
2075
2076 pdata->bridge.funcs = &lt9611_bridge_funcs;
2077 pdata->bridge.of_node = client->dev.of_node;
2078
2079 drm_bridge_add(&pdata->bridge);
2080
2081 return ret;
2082
2083err_sysfs_init:
2084 disable_irq(pdata->irq);
2085 free_irq(pdata->irq, pdata);
2086err_i2c_prog:
2087 lt9611_gpio_configure(pdata, false);
2088err_dt_supply:
2089 lt9611_put_dt_supply(&client->dev, pdata);
2090err_dt_parse:
2091 devm_kfree(&client->dev, pdata);
2092 return ret;
2093}
2094
2095static int lt9611_remove(struct i2c_client *client)
2096{
2097 int ret = -EINVAL;
2098 struct lt9611 *pdata = i2c_get_clientdata(client);
2099 struct drm_display_mode *mode, *n;
2100
2101 if (!pdata)
2102 goto end;
2103
2104 mipi_dsi_detach(pdata->dsi);
2105 mipi_dsi_device_unregister(pdata->dsi);
2106
2107 drm_bridge_remove(&pdata->bridge);
2108
2109 lt9611_sysfs_remove(&client->dev);
2110
2111 disable_irq(pdata->irq);
2112 free_irq(pdata->irq, pdata);
2113
2114 ret = lt9611_gpio_configure(pdata, false);
2115
2116 lt9611_put_dt_supply(&client->dev, pdata);
2117
2118 if (pdata->non_pluggable) {
2119 list_for_each_entry_safe(mode, n, &pdata->mode_list, head) {
2120 list_del(&mode->head);
2121 kfree(mode);
2122 }
2123 }
2124
2125 devm_kfree(&client->dev, pdata);
2126
2127end:
2128 return ret;
2129}
2130
2131
2132static struct i2c_device_id lt9611_id[] = {
2133 { "lt,lt9611", 0},
2134 {}
2135};
2136
2137static const struct of_device_id lt9611_match_table[] = {
2138 {.compatible = "lt,lt9611"},
2139 {}
2140};
2141MODULE_DEVICE_TABLE(of, lt9611_match_table);
2142
2143static struct i2c_driver lt9611_driver = {
2144 .driver = {
2145 .name = "lt9611",
2146 .owner = THIS_MODULE,
2147 .of_match_table = lt9611_match_table,
2148 },
2149 .probe = lt9611_probe,
2150 .remove = lt9611_remove,
2151 .id_table = lt9611_id,
2152};
2153
2154static int __init lt9611_init(void)
2155{
2156 return i2c_add_driver(&lt9611_driver);
2157}
2158
2159static void __exit lt9611_exit(void)
2160{
2161 i2c_del_driver(&lt9611_driver);
2162}
2163
2164module_init(lt9611_init);
2165module_exit(lt9611_exit);
2166