blob: b852c483a2eb13fb969ca72818a0488f0990f093 [file] [log] [blame]
Steve Glendinningd0cad872010-03-16 08:46:46 +00001 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
Steve Glendinning899a3912012-10-30 07:46:32 +000029#include <linux/bitrev.h>
30#include <linux/crc16.h>
Steve Glendinningd0cad872010-03-16 08:46:46 +000031#include <linux/crc32.h>
32#include <linux/usb/usbnet.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090033#include <linux/slab.h>
Steve Glendinningd0cad872010-03-16 08:46:46 +000034#include "smsc75xx.h"
35
36#define SMSC_CHIPNAME "smsc75xx"
37#define SMSC_DRIVER_VERSION "1.0.0"
38#define HS_USB_PKT_SIZE (512)
39#define FS_USB_PKT_SIZE (64)
40#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
41#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
42#define DEFAULT_BULK_IN_DELAY (0x00002000)
43#define MAX_SINGLE_PACKET_SIZE (9000)
44#define LAN75XX_EEPROM_MAGIC (0x7500)
45#define EEPROM_MAC_OFFSET (0x01)
46#define DEFAULT_TX_CSUM_ENABLE (true)
47#define DEFAULT_RX_CSUM_ENABLE (true)
48#define DEFAULT_TSO_ENABLE (true)
49#define SMSC75XX_INTERNAL_PHY_ID (1)
50#define SMSC75XX_TX_OVERHEAD (8)
51#define MAX_RX_FIFO_SIZE (20 * 1024)
52#define MAX_TX_FIFO_SIZE (12 * 1024)
53#define USB_VENDOR_ID_SMSC (0x0424)
54#define USB_PRODUCT_ID_LAN7500 (0x7500)
55#define USB_PRODUCT_ID_LAN7505 (0x7505)
Nico Erfurthea1649d2011-11-08 07:30:40 +000056#define RXW_PADDING 2
Steve Glendinningf329ccd2012-11-28 05:59:47 +000057#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
Steve Glendinning899a3912012-10-30 07:46:32 +000058 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
Steve Glendinningd0cad872010-03-16 08:46:46 +000059
Steve Glendinningb4cdea92012-11-28 05:59:49 +000060#define SUSPEND_SUSPEND0 (0x01)
61#define SUSPEND_SUSPEND1 (0x02)
62#define SUSPEND_SUSPEND2 (0x04)
63#define SUSPEND_SUSPEND3 (0x08)
64#define SUSPEND_REMOTEWAKE (0x10)
65#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
66 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
67
Steve Glendinningd0cad872010-03-16 08:46:46 +000068#define check_warn(ret, fmt, args...) \
69 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
70
71#define check_warn_return(ret, fmt, args...) \
72 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
73
74#define check_warn_goto_done(ret, fmt, args...) \
75 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
76
77struct smsc75xx_priv {
78 struct usbnet *dev;
79 u32 rfe_ctl;
Steve Glendinning6c636502012-09-28 00:57:53 +000080 u32 wolopts;
Steve Glendinningd0cad872010-03-16 08:46:46 +000081 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
Steve Glendinningd0cad872010-03-16 08:46:46 +000082 struct mutex dataport_mutex;
83 spinlock_t rfe_ctl_lock;
84 struct work_struct set_multicast;
Steve Glendinningb4cdea92012-11-28 05:59:49 +000085 u8 suspend_flags;
Steve Glendinningd0cad872010-03-16 08:46:46 +000086};
87
88struct usb_context {
89 struct usb_ctrlrequest req;
90 struct usbnet *dev;
91};
92
Rusty Russelleb939922011-12-19 14:08:01 +000093static bool turbo_mode = true;
Steve Glendinningd0cad872010-03-16 08:46:46 +000094module_param(turbo_mode, bool, 0644);
95MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
96
Ming Lei47bbea42012-11-06 04:53:05 +000097static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index,
98 u32 *data, int in_pm)
Steve Glendinningd0cad872010-03-16 08:46:46 +000099{
Ming Lei2b2e41e2012-10-24 19:47:03 +0000100 u32 buf;
Steve Glendinningd0cad872010-03-16 08:46:46 +0000101 int ret;
Ming Lei47bbea42012-11-06 04:53:05 +0000102 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000103
104 BUG_ON(!dev);
105
Ming Lei47bbea42012-11-06 04:53:05 +0000106 if (!in_pm)
107 fn = usbnet_read_cmd;
108 else
109 fn = usbnet_read_cmd_nopm;
110
111 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
112 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
113 0, index, &buf, 4);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000114 if (unlikely(ret < 0))
Joe Perches1e1d7412012-11-24 01:27:49 +0000115 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
116 index, ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000117
Ming Lei2b2e41e2012-10-24 19:47:03 +0000118 le32_to_cpus(&buf);
119 *data = buf;
Steve Glendinningd0cad872010-03-16 08:46:46 +0000120
121 return ret;
122}
123
Ming Lei47bbea42012-11-06 04:53:05 +0000124static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index,
125 u32 data, int in_pm)
Steve Glendinningd0cad872010-03-16 08:46:46 +0000126{
Ming Lei2b2e41e2012-10-24 19:47:03 +0000127 u32 buf;
Steve Glendinningd0cad872010-03-16 08:46:46 +0000128 int ret;
Ming Lei47bbea42012-11-06 04:53:05 +0000129 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000130
131 BUG_ON(!dev);
132
Ming Lei47bbea42012-11-06 04:53:05 +0000133 if (!in_pm)
134 fn = usbnet_write_cmd;
135 else
136 fn = usbnet_write_cmd_nopm;
137
Ming Lei2b2e41e2012-10-24 19:47:03 +0000138 buf = data;
139 cpu_to_le32s(&buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000140
Ming Lei47bbea42012-11-06 04:53:05 +0000141 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
142 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
143 0, index, &buf, 4);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000144 if (unlikely(ret < 0))
Joe Perches1e1d7412012-11-24 01:27:49 +0000145 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
146 index, ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000147
Steve Glendinningd0cad872010-03-16 08:46:46 +0000148 return ret;
149}
150
Ming Lei47bbea42012-11-06 04:53:05 +0000151static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index,
152 u32 *data)
153{
154 return __smsc75xx_read_reg(dev, index, data, 1);
155}
156
157static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index,
158 u32 data)
159{
160 return __smsc75xx_write_reg(dev, index, data, 1);
161}
162
163static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
164 u32 *data)
165{
166 return __smsc75xx_read_reg(dev, index, data, 0);
167}
168
169static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
170 u32 data)
171{
172 return __smsc75xx_write_reg(dev, index, data, 0);
173}
174
Steve Glendinning6c636502012-09-28 00:57:53 +0000175static int smsc75xx_set_feature(struct usbnet *dev, u32 feature)
176{
177 if (WARN_ON_ONCE(!dev))
178 return -EINVAL;
179
Ming Lei47bbea42012-11-06 04:53:05 +0000180 return usbnet_write_cmd_nopm(dev, USB_REQ_SET_FEATURE,
181 USB_DIR_OUT | USB_RECIP_DEVICE,
182 feature, 0, NULL, 0);
Steve Glendinning6c636502012-09-28 00:57:53 +0000183}
184
185static int smsc75xx_clear_feature(struct usbnet *dev, u32 feature)
186{
187 if (WARN_ON_ONCE(!dev))
188 return -EINVAL;
189
Ming Lei47bbea42012-11-06 04:53:05 +0000190 return usbnet_write_cmd_nopm(dev, USB_REQ_CLEAR_FEATURE,
191 USB_DIR_OUT | USB_RECIP_DEVICE,
192 feature, 0, NULL, 0);
Steve Glendinning6c636502012-09-28 00:57:53 +0000193}
194
Steve Glendinningd0cad872010-03-16 08:46:46 +0000195/* Loop until the read is completed with timeout
196 * called with phy_mutex held */
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000197static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev,
198 int in_pm)
Steve Glendinningd0cad872010-03-16 08:46:46 +0000199{
200 unsigned long start_time = jiffies;
201 u32 val;
202 int ret;
203
204 do {
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000205 ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000206 check_warn_return(ret, "Error reading MII_ACCESS\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000207
208 if (!(val & MII_ACCESS_BUSY))
209 return 0;
210 } while (!time_after(jiffies, start_time + HZ));
211
212 return -EIO;
213}
214
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000215static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
216 int in_pm)
Steve Glendinningd0cad872010-03-16 08:46:46 +0000217{
218 struct usbnet *dev = netdev_priv(netdev);
219 u32 val, addr;
220 int ret;
221
222 mutex_lock(&dev->phy_mutex);
223
224 /* confirm MII not busy */
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000225 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000226 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000227
228 /* set the address, index & direction (read from PHY) */
229 phy_id &= dev->mii.phy_id_mask;
230 idx &= dev->mii.reg_num_mask;
231 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
232 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
Steve Glendinningcb8722d2012-04-30 07:56:51 +0000233 | MII_ACCESS_READ | MII_ACCESS_BUSY;
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000234 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000235 check_warn_goto_done(ret, "Error writing MII_ACCESS\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000236
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000237 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000238 check_warn_goto_done(ret, "Timed out reading MII reg %02X\n", idx);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000239
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000240 ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000241 check_warn_goto_done(ret, "Error reading MII_DATA\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000242
243 ret = (u16)(val & 0xFFFF);
244
245done:
246 mutex_unlock(&dev->phy_mutex);
247 return ret;
248}
249
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000250static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id,
251 int idx, int regval, int in_pm)
Steve Glendinningd0cad872010-03-16 08:46:46 +0000252{
253 struct usbnet *dev = netdev_priv(netdev);
254 u32 val, addr;
255 int ret;
256
257 mutex_lock(&dev->phy_mutex);
258
259 /* confirm MII not busy */
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000260 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000261 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000262
263 val = regval;
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000264 ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000265 check_warn_goto_done(ret, "Error writing MII_DATA\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000266
267 /* set the address, index & direction (write to PHY) */
268 phy_id &= dev->mii.phy_id_mask;
269 idx &= dev->mii.reg_num_mask;
270 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
271 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
Steve Glendinningcb8722d2012-04-30 07:56:51 +0000272 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000273 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000274 check_warn_goto_done(ret, "Error writing MII_ACCESS\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000275
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000276 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
Joe Perches1e1d7412012-11-24 01:27:49 +0000277 check_warn_goto_done(ret, "Timed out writing MII reg %02X\n", idx);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000278
279done:
280 mutex_unlock(&dev->phy_mutex);
281}
282
Steve Glendinningf329ccd2012-11-28 05:59:47 +0000283static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
284 int idx)
285{
286 return __smsc75xx_mdio_read(netdev, phy_id, idx, 1);
287}
288
289static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
290 int idx, int regval)
291{
292 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1);
293}
294
295static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
296{
297 return __smsc75xx_mdio_read(netdev, phy_id, idx, 0);
298}
299
300static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
301 int regval)
302{
303 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0);
304}
305
Steve Glendinningd0cad872010-03-16 08:46:46 +0000306static int smsc75xx_wait_eeprom(struct usbnet *dev)
307{
308 unsigned long start_time = jiffies;
309 u32 val;
310 int ret;
311
312 do {
313 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
Joe Perches1e1d7412012-11-24 01:27:49 +0000314 check_warn_return(ret, "Error reading E2P_CMD\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000315
316 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
317 break;
318 udelay(40);
319 } while (!time_after(jiffies, start_time + HZ));
320
321 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
Joe Perches1e1d7412012-11-24 01:27:49 +0000322 netdev_warn(dev->net, "EEPROM read operation timeout\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000323 return -EIO;
324 }
325
326 return 0;
327}
328
329static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
330{
331 unsigned long start_time = jiffies;
332 u32 val;
333 int ret;
334
335 do {
336 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
Joe Perches1e1d7412012-11-24 01:27:49 +0000337 check_warn_return(ret, "Error reading E2P_CMD\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000338
339 if (!(val & E2P_CMD_BUSY))
340 return 0;
341
342 udelay(40);
343 } while (!time_after(jiffies, start_time + HZ));
344
Joe Perches1e1d7412012-11-24 01:27:49 +0000345 netdev_warn(dev->net, "EEPROM is busy\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000346 return -EIO;
347}
348
349static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
350 u8 *data)
351{
352 u32 val;
353 int i, ret;
354
355 BUG_ON(!dev);
356 BUG_ON(!data);
357
358 ret = smsc75xx_eeprom_confirm_not_busy(dev);
359 if (ret)
360 return ret;
361
362 for (i = 0; i < length; i++) {
363 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
364 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
Joe Perches1e1d7412012-11-24 01:27:49 +0000365 check_warn_return(ret, "Error writing E2P_CMD\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000366
367 ret = smsc75xx_wait_eeprom(dev);
368 if (ret < 0)
369 return ret;
370
371 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
Joe Perches1e1d7412012-11-24 01:27:49 +0000372 check_warn_return(ret, "Error reading E2P_DATA\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000373
374 data[i] = val & 0xFF;
375 offset++;
376 }
377
378 return 0;
379}
380
381static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
382 u8 *data)
383{
384 u32 val;
385 int i, ret;
386
387 BUG_ON(!dev);
388 BUG_ON(!data);
389
390 ret = smsc75xx_eeprom_confirm_not_busy(dev);
391 if (ret)
392 return ret;
393
394 /* Issue write/erase enable command */
395 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
396 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
Joe Perches1e1d7412012-11-24 01:27:49 +0000397 check_warn_return(ret, "Error writing E2P_CMD\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000398
399 ret = smsc75xx_wait_eeprom(dev);
400 if (ret < 0)
401 return ret;
402
403 for (i = 0; i < length; i++) {
404
405 /* Fill data register */
406 val = data[i];
407 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
Joe Perches1e1d7412012-11-24 01:27:49 +0000408 check_warn_return(ret, "Error writing E2P_DATA\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000409
410 /* Send "write" command */
411 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
412 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
Joe Perches1e1d7412012-11-24 01:27:49 +0000413 check_warn_return(ret, "Error writing E2P_CMD\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000414
415 ret = smsc75xx_wait_eeprom(dev);
416 if (ret < 0)
417 return ret;
418
419 offset++;
420 }
421
422 return 0;
423}
424
425static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
426{
427 int i, ret;
428
429 for (i = 0; i < 100; i++) {
430 u32 dp_sel;
431 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
Joe Perches1e1d7412012-11-24 01:27:49 +0000432 check_warn_return(ret, "Error reading DP_SEL\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000433
434 if (dp_sel & DP_SEL_DPRDY)
435 return 0;
436
437 udelay(40);
438 }
439
Joe Perches1e1d7412012-11-24 01:27:49 +0000440 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000441
442 return -EIO;
443}
444
445static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
446 u32 length, u32 *buf)
447{
448 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
449 u32 dp_sel;
450 int i, ret;
451
452 mutex_lock(&pdata->dataport_mutex);
453
454 ret = smsc75xx_dataport_wait_not_busy(dev);
Joe Perches1e1d7412012-11-24 01:27:49 +0000455 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000456
457 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
Joe Perches1e1d7412012-11-24 01:27:49 +0000458 check_warn_goto_done(ret, "Error reading DP_SEL\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000459
460 dp_sel &= ~DP_SEL_RSEL;
461 dp_sel |= ram_select;
462 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
Joe Perches1e1d7412012-11-24 01:27:49 +0000463 check_warn_goto_done(ret, "Error writing DP_SEL\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000464
465 for (i = 0; i < length; i++) {
466 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
Joe Perches1e1d7412012-11-24 01:27:49 +0000467 check_warn_goto_done(ret, "Error writing DP_ADDR\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000468
469 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
Joe Perches1e1d7412012-11-24 01:27:49 +0000470 check_warn_goto_done(ret, "Error writing DP_DATA\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000471
472 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
Joe Perches1e1d7412012-11-24 01:27:49 +0000473 check_warn_goto_done(ret, "Error writing DP_CMD\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000474
475 ret = smsc75xx_dataport_wait_not_busy(dev);
Joe Perches1e1d7412012-11-24 01:27:49 +0000476 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000477 }
478
479done:
480 mutex_unlock(&pdata->dataport_mutex);
481 return ret;
482}
483
484/* returns hash bit number for given MAC address */
485static u32 smsc75xx_hash(char addr[ETH_ALEN])
486{
487 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
488}
489
490static void smsc75xx_deferred_multicast_write(struct work_struct *param)
491{
492 struct smsc75xx_priv *pdata =
493 container_of(param, struct smsc75xx_priv, set_multicast);
494 struct usbnet *dev = pdata->dev;
495 int ret;
496
Joe Perches1e1d7412012-11-24 01:27:49 +0000497 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
498 pdata->rfe_ctl);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000499
500 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
501 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
502
503 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
Joe Perches1e1d7412012-11-24 01:27:49 +0000504 check_warn(ret, "Error writing RFE_CRL\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000505}
506
507static void smsc75xx_set_multicast(struct net_device *netdev)
508{
509 struct usbnet *dev = netdev_priv(netdev);
510 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
511 unsigned long flags;
512 int i;
513
514 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
515
516 pdata->rfe_ctl &=
517 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
518 pdata->rfe_ctl |= RFE_CTL_AB;
519
520 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
521 pdata->multicast_hash_table[i] = 0;
522
523 if (dev->net->flags & IFF_PROMISC) {
Joe Perches1e1d7412012-11-24 01:27:49 +0000524 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000525 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
526 } else if (dev->net->flags & IFF_ALLMULTI) {
Joe Perches1e1d7412012-11-24 01:27:49 +0000527 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000528 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
529 } else if (!netdev_mc_empty(dev->net)) {
Jiri Pirko22bedad32010-04-01 21:22:57 +0000530 struct netdev_hw_addr *ha;
Steve Glendinningd0cad872010-03-16 08:46:46 +0000531
Joe Perches1e1d7412012-11-24 01:27:49 +0000532 netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000533
534 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
535
Jiri Pirko22bedad32010-04-01 21:22:57 +0000536 netdev_for_each_mc_addr(ha, netdev) {
537 u32 bitnum = smsc75xx_hash(ha->addr);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000538 pdata->multicast_hash_table[bitnum / 32] |=
539 (1 << (bitnum % 32));
540 }
541 } else {
Joe Perches1e1d7412012-11-24 01:27:49 +0000542 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000543 pdata->rfe_ctl |= RFE_CTL_DPF;
544 }
545
546 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
547
548 /* defer register writes to a sleepable context */
549 schedule_work(&pdata->set_multicast);
550}
551
552static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
553 u16 lcladv, u16 rmtadv)
554{
555 u32 flow = 0, fct_flow = 0;
556 int ret;
557
558 if (duplex == DUPLEX_FULL) {
559 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
560
561 if (cap & FLOW_CTRL_TX) {
562 flow = (FLOW_TX_FCEN | 0xFFFF);
563 /* set fct_flow thresholds to 20% and 80% */
564 fct_flow = (8 << 8) | 32;
565 }
566
567 if (cap & FLOW_CTRL_RX)
568 flow |= FLOW_RX_FCEN;
569
Joe Perches1e1d7412012-11-24 01:27:49 +0000570 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
571 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
572 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
Steve Glendinningd0cad872010-03-16 08:46:46 +0000573 } else {
Joe Perches1e1d7412012-11-24 01:27:49 +0000574 netif_dbg(dev, link, dev->net, "half duplex\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000575 }
576
577 ret = smsc75xx_write_reg(dev, FLOW, flow);
Joe Perches1e1d7412012-11-24 01:27:49 +0000578 check_warn_return(ret, "Error writing FLOW\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000579
580 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
Joe Perches1e1d7412012-11-24 01:27:49 +0000581 check_warn_return(ret, "Error writing FCT_FLOW\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000582
583 return 0;
584}
585
586static int smsc75xx_link_reset(struct usbnet *dev)
587{
588 struct mii_if_info *mii = &dev->mii;
David Decotigny8ae6dac2011-04-27 18:32:38 +0000589 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
Steve Glendinningd0cad872010-03-16 08:46:46 +0000590 u16 lcladv, rmtadv;
591 int ret;
592
Steve Glendinning4f94a922012-05-04 00:57:12 +0000593 /* write to clear phy interrupt status */
Steve Glendinning77496222012-05-04 00:57:11 +0000594 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
595 PHY_INT_SRC_CLEAR_ALL);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000596
597 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
Joe Perches1e1d7412012-11-24 01:27:49 +0000598 check_warn_return(ret, "Error writing INT_STS\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000599
600 mii_check_media(mii, 1, 1);
601 mii_ethtool_gset(&dev->mii, &ecmd);
602 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
603 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
604
Joe Perches1e1d7412012-11-24 01:27:49 +0000605 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
606 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000607
608 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
609}
610
611static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
612{
613 u32 intdata;
614
615 if (urb->actual_length != 4) {
Joe Perches1e1d7412012-11-24 01:27:49 +0000616 netdev_warn(dev->net, "unexpected urb length %d\n",
617 urb->actual_length);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000618 return;
619 }
620
621 memcpy(&intdata, urb->transfer_buffer, 4);
622 le32_to_cpus(&intdata);
623
Joe Perches1e1d7412012-11-24 01:27:49 +0000624 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000625
626 if (intdata & INT_ENP_PHY_INT)
627 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
628 else
Joe Perches1e1d7412012-11-24 01:27:49 +0000629 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
630 intdata);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000631}
632
Steve Glendinningd0cad872010-03-16 08:46:46 +0000633static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
634{
635 return MAX_EEPROM_SIZE;
636}
637
638static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
639 struct ethtool_eeprom *ee, u8 *data)
640{
641 struct usbnet *dev = netdev_priv(netdev);
642
643 ee->magic = LAN75XX_EEPROM_MAGIC;
644
645 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
646}
647
648static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
649 struct ethtool_eeprom *ee, u8 *data)
650{
651 struct usbnet *dev = netdev_priv(netdev);
652
653 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
Joe Perches1e1d7412012-11-24 01:27:49 +0000654 netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n",
655 ee->magic);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000656 return -EINVAL;
657 }
658
659 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
660}
661
Steve Glendinning6c636502012-09-28 00:57:53 +0000662static void smsc75xx_ethtool_get_wol(struct net_device *net,
663 struct ethtool_wolinfo *wolinfo)
664{
665 struct usbnet *dev = netdev_priv(net);
666 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
667
668 wolinfo->supported = SUPPORTED_WAKE;
669 wolinfo->wolopts = pdata->wolopts;
670}
671
672static int smsc75xx_ethtool_set_wol(struct net_device *net,
673 struct ethtool_wolinfo *wolinfo)
674{
675 struct usbnet *dev = netdev_priv(net);
676 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
677
678 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
679 return 0;
680}
681
Steve Glendinningd0cad872010-03-16 08:46:46 +0000682static const struct ethtool_ops smsc75xx_ethtool_ops = {
683 .get_link = usbnet_get_link,
684 .nway_reset = usbnet_nway_reset,
685 .get_drvinfo = usbnet_get_drvinfo,
686 .get_msglevel = usbnet_get_msglevel,
687 .set_msglevel = usbnet_set_msglevel,
688 .get_settings = usbnet_get_settings,
689 .set_settings = usbnet_set_settings,
690 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
691 .get_eeprom = smsc75xx_ethtool_get_eeprom,
692 .set_eeprom = smsc75xx_ethtool_set_eeprom,
Steve Glendinning6c636502012-09-28 00:57:53 +0000693 .get_wol = smsc75xx_ethtool_get_wol,
694 .set_wol = smsc75xx_ethtool_set_wol,
Steve Glendinningd0cad872010-03-16 08:46:46 +0000695};
696
697static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
698{
699 struct usbnet *dev = netdev_priv(netdev);
700
701 if (!netif_running(netdev))
702 return -EINVAL;
703
704 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
705}
706
707static void smsc75xx_init_mac_address(struct usbnet *dev)
708{
709 /* try reading mac address from EEPROM */
710 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
711 dev->net->dev_addr) == 0) {
712 if (is_valid_ether_addr(dev->net->dev_addr)) {
713 /* eeprom values are valid so use them */
714 netif_dbg(dev, ifup, dev->net,
Joe Perches1e1d7412012-11-24 01:27:49 +0000715 "MAC address read from EEPROM\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000716 return;
717 }
718 }
719
720 /* no eeprom, or eeprom values are invalid. generate random MAC */
Danny Kukawkaf2cedb62012-02-15 06:45:39 +0000721 eth_hw_addr_random(dev->net);
Joe Perches1e1d7412012-11-24 01:27:49 +0000722 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000723}
724
725static int smsc75xx_set_mac_address(struct usbnet *dev)
726{
727 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
728 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
729 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
730
731 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
Joe Perches1e1d7412012-11-24 01:27:49 +0000732 check_warn_return(ret, "Failed to write RX_ADDRH: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000733
734 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
Joe Perches1e1d7412012-11-24 01:27:49 +0000735 check_warn_return(ret, "Failed to write RX_ADDRL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000736
737 addr_hi |= ADDR_FILTX_FB_VALID;
738 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
Joe Perches1e1d7412012-11-24 01:27:49 +0000739 check_warn_return(ret, "Failed to write ADDR_FILTX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000740
741 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
Joe Perches1e1d7412012-11-24 01:27:49 +0000742 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000743
744 return 0;
745}
746
747static int smsc75xx_phy_initialize(struct usbnet *dev)
748{
Steve Glendinningb1405042012-04-30 07:56:54 +0000749 int bmcr, ret, timeout = 0;
Steve Glendinningd0cad872010-03-16 08:46:46 +0000750
751 /* Initialize MII structure */
752 dev->mii.dev = dev->net;
753 dev->mii.mdio_read = smsc75xx_mdio_read;
754 dev->mii.mdio_write = smsc75xx_mdio_write;
755 dev->mii.phy_id_mask = 0x1f;
756 dev->mii.reg_num_mask = 0x1f;
Steve Glendinningc0b92e42012-04-30 07:56:55 +0000757 dev->mii.supports_gmii = 1;
Steve Glendinningd0cad872010-03-16 08:46:46 +0000758 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
759
760 /* reset phy and wait for reset to complete */
761 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
762
763 do {
764 msleep(10);
765 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
Joe Perches1e1d7412012-11-24 01:27:49 +0000766 check_warn_return(bmcr, "Error reading MII_BMCR\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000767 timeout++;
Steve Glendinning8a1d59d2012-04-30 07:56:53 +0000768 } while ((bmcr & BMCR_RESET) && (timeout < 100));
Steve Glendinningd0cad872010-03-16 08:46:46 +0000769
770 if (timeout >= 100) {
Joe Perches1e1d7412012-11-24 01:27:49 +0000771 netdev_warn(dev->net, "timeout on PHY Reset\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000772 return -EIO;
773 }
774
775 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
776 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
777 ADVERTISE_PAUSE_ASYM);
Steve Glendinningc0b92e42012-04-30 07:56:55 +0000778 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
779 ADVERTISE_1000FULL);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000780
Steve Glendinningb1405042012-04-30 07:56:54 +0000781 /* read and write to clear phy interrupt status */
782 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
Joe Perches1e1d7412012-11-24 01:27:49 +0000783 check_warn_return(ret, "Error reading PHY_INT_SRC\n");
Steve Glendinningb1405042012-04-30 07:56:54 +0000784 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000785
786 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
787 PHY_INT_MASK_DEFAULT);
788 mii_nway_restart(&dev->mii);
789
Joe Perches1e1d7412012-11-24 01:27:49 +0000790 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000791 return 0;
792}
793
794static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
795{
796 int ret = 0;
797 u32 buf;
798 bool rxenabled;
799
800 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000801 check_warn_return(ret, "Failed to read MAC_RX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000802
803 rxenabled = ((buf & MAC_RX_RXEN) != 0);
804
805 if (rxenabled) {
806 buf &= ~MAC_RX_RXEN;
807 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000808 check_warn_return(ret, "Failed to write MAC_RX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000809 }
810
811 /* add 4 to size for FCS */
812 buf &= ~MAC_RX_MAX_SIZE;
813 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
814
815 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000816 check_warn_return(ret, "Failed to write MAC_RX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000817
818 if (rxenabled) {
819 buf |= MAC_RX_RXEN;
820 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000821 check_warn_return(ret, "Failed to write MAC_RX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000822 }
823
824 return 0;
825}
826
827static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
828{
829 struct usbnet *dev = netdev_priv(netdev);
830
831 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu);
Joe Perches1e1d7412012-11-24 01:27:49 +0000832 check_warn_return(ret, "Failed to set mac rx frame length\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000833
834 return usbnet_change_mtu(netdev, new_mtu);
835}
836
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700837/* Enable or disable Rx checksum offload engine */
Michał Mirosławc8f44af2011-11-15 15:29:55 +0000838static int smsc75xx_set_features(struct net_device *netdev,
839 netdev_features_t features)
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700840{
841 struct usbnet *dev = netdev_priv(netdev);
842 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
843 unsigned long flags;
844 int ret;
845
846 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
847
848 if (features & NETIF_F_RXCSUM)
849 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
850 else
851 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
852
853 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
854 /* it's racing here! */
855
856 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
Joe Perches1e1d7412012-11-24 01:27:49 +0000857 check_warn_return(ret, "Error writing RFE_CTL\n");
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700858
859 return 0;
860}
861
Ming Lei47bbea42012-11-06 04:53:05 +0000862static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm)
Steve Glendinning8762cec2012-09-28 00:57:51 +0000863{
864 int timeout = 0;
865
866 do {
867 u32 buf;
Ming Lei47bbea42012-11-06 04:53:05 +0000868 int ret;
869
870 ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm);
871
Joe Perches1e1d7412012-11-24 01:27:49 +0000872 check_warn_return(ret, "Failed to read PMT_CTL: %d\n", ret);
Steve Glendinning8762cec2012-09-28 00:57:51 +0000873
874 if (buf & PMT_CTL_DEV_RDY)
875 return 0;
876
877 msleep(10);
878 timeout++;
879 } while (timeout < 100);
880
Joe Perches1e1d7412012-11-24 01:27:49 +0000881 netdev_warn(dev->net, "timeout waiting for device ready\n");
Steve Glendinning8762cec2012-09-28 00:57:51 +0000882 return -EIO;
883}
884
Steve Glendinningd0cad872010-03-16 08:46:46 +0000885static int smsc75xx_reset(struct usbnet *dev)
886{
887 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
888 u32 buf;
889 int ret = 0, timeout;
890
Joe Perches1e1d7412012-11-24 01:27:49 +0000891 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000892
Ming Lei47bbea42012-11-06 04:53:05 +0000893 ret = smsc75xx_wait_ready(dev, 0);
Joe Perches1e1d7412012-11-24 01:27:49 +0000894 check_warn_return(ret, "device not ready in smsc75xx_reset\n");
Steve Glendinning8762cec2012-09-28 00:57:51 +0000895
Steve Glendinningd0cad872010-03-16 08:46:46 +0000896 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000897 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000898
899 buf |= HW_CFG_LRST;
900
901 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000902 check_warn_return(ret, "Failed to write HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000903
904 timeout = 0;
905 do {
906 msleep(10);
907 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000908 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000909 timeout++;
910 } while ((buf & HW_CFG_LRST) && (timeout < 100));
911
912 if (timeout >= 100) {
Joe Perches1e1d7412012-11-24 01:27:49 +0000913 netdev_warn(dev->net, "timeout on completion of Lite Reset\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000914 return -EIO;
915 }
916
Joe Perches1e1d7412012-11-24 01:27:49 +0000917 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000918
919 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000920 check_warn_return(ret, "Failed to read PMT_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000921
922 buf |= PMT_CTL_PHY_RST;
923
924 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000925 check_warn_return(ret, "Failed to write PMT_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000926
927 timeout = 0;
928 do {
929 msleep(10);
930 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000931 check_warn_return(ret, "Failed to read PMT_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000932 timeout++;
933 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
934
935 if (timeout >= 100) {
Joe Perches1e1d7412012-11-24 01:27:49 +0000936 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000937 return -EIO;
938 }
939
Joe Perches1e1d7412012-11-24 01:27:49 +0000940 netif_dbg(dev, ifup, dev->net, "PHY reset complete\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000941
942 smsc75xx_init_mac_address(dev);
943
944 ret = smsc75xx_set_mac_address(dev);
Joe Perches1e1d7412012-11-24 01:27:49 +0000945 check_warn_return(ret, "Failed to set mac address\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +0000946
Joe Perches1e1d7412012-11-24 01:27:49 +0000947 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
948 dev->net->dev_addr);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000949
950 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000951 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000952
Joe Perches1e1d7412012-11-24 01:27:49 +0000953 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
954 buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000955
956 buf |= HW_CFG_BIR;
957
958 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000959 check_warn_return(ret, "Failed to write HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000960
961 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000962 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000963
Joe Perches1e1d7412012-11-24 01:27:49 +0000964 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n",
965 buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000966
967 if (!turbo_mode) {
968 buf = 0;
969 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
970 } else if (dev->udev->speed == USB_SPEED_HIGH) {
971 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
972 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
973 } else {
974 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
975 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
976 }
977
Joe Perches1e1d7412012-11-24 01:27:49 +0000978 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
979 (ulong)dev->rx_urb_size);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000980
981 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000982 check_warn_return(ret, "Failed to write BURST_CAP: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000983
984 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000985 check_warn_return(ret, "Failed to read BURST_CAP: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000986
987 netif_dbg(dev, ifup, dev->net,
Joe Perches1e1d7412012-11-24 01:27:49 +0000988 "Read Value from BURST_CAP after writing: 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000989
990 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
Joe Perches1e1d7412012-11-24 01:27:49 +0000991 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000992
993 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +0000994 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000995
996 netif_dbg(dev, ifup, dev->net,
Joe Perches1e1d7412012-11-24 01:27:49 +0000997 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +0000998
999 if (turbo_mode) {
1000 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001001 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001002
Joe Perches1e1d7412012-11-24 01:27:49 +00001003 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001004
1005 buf |= (HW_CFG_MEF | HW_CFG_BCE);
1006
1007 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001008 check_warn_return(ret, "Failed to write HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001009
1010 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001011 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001012
Joe Perches1e1d7412012-11-24 01:27:49 +00001013 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001014 }
1015
1016 /* set FIFO sizes */
1017 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
1018 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001019 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001020
Joe Perches1e1d7412012-11-24 01:27:49 +00001021 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001022
1023 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
1024 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001025 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001026
Joe Perches1e1d7412012-11-24 01:27:49 +00001027 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001028
1029 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
Joe Perches1e1d7412012-11-24 01:27:49 +00001030 check_warn_return(ret, "Failed to write INT_STS: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001031
1032 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001033 check_warn_return(ret, "Failed to read ID_REV: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001034
Joe Perches1e1d7412012-11-24 01:27:49 +00001035 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001036
Steve Glendinning97138a12012-05-04 00:57:13 +00001037 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001038 check_warn_return(ret, "Failed to read E2P_CMD: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001039
Steve Glendinning97138a12012-05-04 00:57:13 +00001040 /* only set default GPIO/LED settings if no EEPROM is detected */
1041 if (!(buf & E2P_CMD_LOADED)) {
1042 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001043 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d\n",
1044 ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001045
Steve Glendinning97138a12012-05-04 00:57:13 +00001046 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
1047 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
1048
1049 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001050 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d\n",
1051 ret);
Steve Glendinning97138a12012-05-04 00:57:13 +00001052 }
Steve Glendinningd0cad872010-03-16 08:46:46 +00001053
1054 ret = smsc75xx_write_reg(dev, FLOW, 0);
Joe Perches1e1d7412012-11-24 01:27:49 +00001055 check_warn_return(ret, "Failed to write FLOW: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001056
1057 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
Joe Perches1e1d7412012-11-24 01:27:49 +00001058 check_warn_return(ret, "Failed to write FCT_FLOW: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001059
1060 /* Don't need rfe_ctl_lock during initialisation */
1061 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
Joe Perches1e1d7412012-11-24 01:27:49 +00001062 check_warn_return(ret, "Failed to read RFE_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001063
1064 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
1065
1066 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
Joe Perches1e1d7412012-11-24 01:27:49 +00001067 check_warn_return(ret, "Failed to write RFE_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001068
1069 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
Joe Perches1e1d7412012-11-24 01:27:49 +00001070 check_warn_return(ret, "Failed to read RFE_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001071
Joe Perches1e1d7412012-11-24 01:27:49 +00001072 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n",
1073 pdata->rfe_ctl);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001074
1075 /* Enable or disable checksum offload engines */
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001076 smsc75xx_set_features(dev->net, dev->net->features);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001077
1078 smsc75xx_set_multicast(dev->net);
1079
1080 ret = smsc75xx_phy_initialize(dev);
Joe Perches1e1d7412012-11-24 01:27:49 +00001081 check_warn_return(ret, "Failed to initialize PHY: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001082
1083 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001084 check_warn_return(ret, "Failed to read INT_EP_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001085
1086 /* enable PHY interrupts */
1087 buf |= INT_ENP_PHY_INT;
1088
1089 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001090 check_warn_return(ret, "Failed to write INT_EP_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001091
Steve Glendinning2f3a0812012-04-30 07:56:56 +00001092 /* allow mac to detect speed and duplex from phy */
1093 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001094 check_warn_return(ret, "Failed to read MAC_CR: %d\n", ret);
Steve Glendinning2f3a0812012-04-30 07:56:56 +00001095
1096 buf |= (MAC_CR_ADD | MAC_CR_ASD);
1097 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001098 check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
Steve Glendinning2f3a0812012-04-30 07:56:56 +00001099
Steve Glendinningd0cad872010-03-16 08:46:46 +00001100 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001101 check_warn_return(ret, "Failed to read MAC_TX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001102
1103 buf |= MAC_TX_TXEN;
1104
1105 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001106 check_warn_return(ret, "Failed to write MAC_TX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001107
Joe Perches1e1d7412012-11-24 01:27:49 +00001108 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001109
1110 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001111 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001112
1113 buf |= FCT_TX_CTL_EN;
1114
1115 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001116 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001117
Joe Perches1e1d7412012-11-24 01:27:49 +00001118 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001119
1120 ret = smsc75xx_set_rx_max_frame_length(dev, 1514);
Joe Perches1e1d7412012-11-24 01:27:49 +00001121 check_warn_return(ret, "Failed to set max rx frame length\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +00001122
1123 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001124 check_warn_return(ret, "Failed to read MAC_RX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001125
1126 buf |= MAC_RX_RXEN;
1127
1128 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001129 check_warn_return(ret, "Failed to write MAC_RX: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001130
Joe Perches1e1d7412012-11-24 01:27:49 +00001131 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001132
1133 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001134 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001135
1136 buf |= FCT_RX_CTL_EN;
1137
1138 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001139 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001140
Joe Perches1e1d7412012-11-24 01:27:49 +00001141 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001142
Joe Perches1e1d7412012-11-24 01:27:49 +00001143 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +00001144 return 0;
1145}
1146
1147static const struct net_device_ops smsc75xx_netdev_ops = {
1148 .ndo_open = usbnet_open,
1149 .ndo_stop = usbnet_stop,
1150 .ndo_start_xmit = usbnet_start_xmit,
1151 .ndo_tx_timeout = usbnet_tx_timeout,
1152 .ndo_change_mtu = smsc75xx_change_mtu,
1153 .ndo_set_mac_address = eth_mac_addr,
1154 .ndo_validate_addr = eth_validate_addr,
1155 .ndo_do_ioctl = smsc75xx_ioctl,
Jiri Pirkoafc4b132011-08-16 06:29:01 +00001156 .ndo_set_rx_mode = smsc75xx_set_multicast,
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001157 .ndo_set_features = smsc75xx_set_features,
Steve Glendinningd0cad872010-03-16 08:46:46 +00001158};
1159
1160static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1161{
1162 struct smsc75xx_priv *pdata = NULL;
1163 int ret;
1164
1165 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1166
1167 ret = usbnet_get_endpoints(dev, intf);
Joe Perches1e1d7412012-11-24 01:27:49 +00001168 check_warn_return(ret, "usbnet_get_endpoints failed: %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001169
1170 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1171 GFP_KERNEL);
1172
1173 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1174 if (!pdata) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001175 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +00001176 return -ENOMEM;
1177 }
1178
1179 pdata->dev = dev;
1180
1181 spin_lock_init(&pdata->rfe_ctl_lock);
1182 mutex_init(&pdata->dataport_mutex);
1183
1184 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1185
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001186 if (DEFAULT_TX_CSUM_ENABLE) {
1187 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1188 if (DEFAULT_TSO_ENABLE)
1189 dev->net->features |= NETIF_F_SG |
1190 NETIF_F_TSO | NETIF_F_TSO6;
1191 }
1192 if (DEFAULT_RX_CSUM_ENABLE)
1193 dev->net->features |= NETIF_F_RXCSUM;
Steve Glendinningd0cad872010-03-16 08:46:46 +00001194
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001195 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1196 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM;
Steve Glendinningd0cad872010-03-16 08:46:46 +00001197
1198 /* Init all registers */
1199 ret = smsc75xx_reset(dev);
Steve Glendinning33763b72012-11-28 05:59:45 +00001200 check_warn_return(ret, "smsc75xx_reset error %d\n", ret);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001201
1202 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1203 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1204 dev->net->flags |= IFF_MULTICAST;
1205 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
Stephane Filloda99ff7d2012-04-15 11:38:29 +00001206 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
Steve Glendinningd0cad872010-03-16 08:46:46 +00001207 return 0;
1208}
1209
1210static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1211{
1212 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1213 if (pdata) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001214 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +00001215 kfree(pdata);
1216 pdata = NULL;
1217 dev->data[0] = 0;
1218 }
1219}
1220
Steve Glendinning899a3912012-10-30 07:46:32 +00001221static u16 smsc_crc(const u8 *buffer, size_t len)
1222{
1223 return bitrev16(crc16(0xFFFF, buffer, len));
1224}
1225
1226static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg,
1227 u32 wuf_mask1)
1228{
1229 int cfg_base = WUF_CFGX + filter * 4;
1230 int mask_base = WUF_MASKX + filter * 16;
1231 int ret;
1232
1233 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg);
Joe Perches1e1d7412012-11-24 01:27:49 +00001234 check_warn_return(ret, "Error writing WUF_CFGX\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001235
1236 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1);
Joe Perches1e1d7412012-11-24 01:27:49 +00001237 check_warn_return(ret, "Error writing WUF_MASKX\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001238
1239 ret = smsc75xx_write_reg(dev, mask_base + 4, 0);
Joe Perches1e1d7412012-11-24 01:27:49 +00001240 check_warn_return(ret, "Error writing WUF_MASKX\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001241
1242 ret = smsc75xx_write_reg(dev, mask_base + 8, 0);
Joe Perches1e1d7412012-11-24 01:27:49 +00001243 check_warn_return(ret, "Error writing WUF_MASKX\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001244
1245 ret = smsc75xx_write_reg(dev, mask_base + 12, 0);
Joe Perches1e1d7412012-11-24 01:27:49 +00001246 check_warn_return(ret, "Error writing WUF_MASKX\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001247
1248 return 0;
1249}
1250
Steve Glendinning9deb2752012-11-28 05:59:46 +00001251static int smsc75xx_enter_suspend0(struct usbnet *dev)
1252{
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001253 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
Steve Glendinning9deb2752012-11-28 05:59:46 +00001254 u32 val;
1255 int ret;
1256
1257 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1258 check_warn_return(ret, "Error reading PMT_CTL\n");
1259
1260 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST));
1261 val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS;
1262
1263 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1264 check_warn_return(ret, "Error writing PMT_CTL\n");
1265
1266 smsc75xx_set_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1267
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001268 pdata->suspend_flags |= SUSPEND_SUSPEND0 | SUSPEND_REMOTEWAKE;
1269
Steve Glendinning9deb2752012-11-28 05:59:46 +00001270 return 0;
1271}
1272
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001273static int smsc75xx_enter_suspend1(struct usbnet *dev)
1274{
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001275 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001276 u32 val;
1277 int ret;
1278
1279 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1280 check_warn_return(ret, "Error reading PMT_CTL\n");
1281
1282 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1283 val |= PMT_CTL_SUS_MODE_1;
1284
1285 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1286 check_warn_return(ret, "Error writing PMT_CTL\n");
1287
1288 /* clear wol status, enable energy detection */
1289 val &= ~PMT_CTL_WUPS;
1290 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1291
1292 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1293 check_warn_return(ret, "Error writing PMT_CTL\n");
1294
1295 smsc75xx_set_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1296
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001297 pdata->suspend_flags |= SUSPEND_SUSPEND1 | SUSPEND_REMOTEWAKE;
1298
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001299 return 0;
1300}
1301
Steve Glendinning9deb2752012-11-28 05:59:46 +00001302static int smsc75xx_enter_suspend2(struct usbnet *dev)
1303{
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001304 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
Steve Glendinning9deb2752012-11-28 05:59:46 +00001305 u32 val;
1306 int ret;
1307
1308 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1309 check_warn_return(ret, "Error reading PMT_CTL\n");
1310
1311 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1312 val |= PMT_CTL_SUS_MODE_2;
1313
1314 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1315 check_warn_return(ret, "Error writing PMT_CTL\n");
1316
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001317 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1318
1319 return 0;
1320}
1321
1322static int smsc75xx_enter_suspend3(struct usbnet *dev)
1323{
1324 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1325 u32 val;
1326 int ret;
1327
1328 ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val);
1329 check_warn_return(ret, "Error reading FCT_RX_CTL\n");
1330
1331 if (val & FCT_RX_CTL_RXUSED) {
1332 netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n");
1333 return -EBUSY;
1334 }
1335
1336 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1337 check_warn_return(ret, "Error reading PMT_CTL\n");
1338
1339 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1340 val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN;
1341
1342 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1343 check_warn_return(ret, "Error writing PMT_CTL\n");
1344
1345 /* clear wol status */
1346 val &= ~PMT_CTL_WUPS;
1347 val |= PMT_CTL_WUPS_WOL;
1348
1349 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1350 check_warn_return(ret, "Error writing PMT_CTL\n");
1351
1352 smsc75xx_set_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1353
1354 pdata->suspend_flags |= SUSPEND_SUSPEND3 | SUSPEND_REMOTEWAKE;
1355
Steve Glendinning9deb2752012-11-28 05:59:46 +00001356 return 0;
1357}
1358
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001359static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1360{
1361 struct mii_if_info *mii = &dev->mii;
1362 int ret;
1363
1364 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
1365
1366 /* read to clear */
1367 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
1368 check_warn_return(ret, "Error reading PHY_INT_SRC\n");
1369
1370 /* enable interrupt source */
1371 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
1372 check_warn_return(ret, "Error reading PHY_INT_MASK\n");
1373
1374 ret |= mask;
1375
1376 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1377
1378 return 0;
1379}
1380
1381static int smsc75xx_link_ok_nopm(struct usbnet *dev)
1382{
1383 struct mii_if_info *mii = &dev->mii;
1384 int ret;
1385
1386 /* first, a dummy read, needed to latch some MII phys */
1387 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1388 check_warn_return(ret, "Error reading MII_BMSR\n");
1389
1390 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1391 check_warn_return(ret, "Error reading MII_BMSR\n");
1392
1393 return !!(ret & BMSR_LSTATUS);
1394}
1395
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001396static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up)
1397{
1398 int ret;
1399
1400 if (!netif_running(dev->net)) {
1401 /* interface is ifconfig down so fully power down hw */
1402 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1403 return smsc75xx_enter_suspend2(dev);
1404 }
1405
1406 if (!link_up) {
1407 /* link is down so enter EDPD mode */
1408 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1409
1410 /* enable PHY wakeup events for if cable is attached */
1411 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1412 PHY_INT_MASK_ANEG_COMP);
1413 check_warn_return(ret, "error enabling PHY wakeup ints\n");
1414
1415 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1416 return smsc75xx_enter_suspend1(dev);
1417 }
1418
1419 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1420 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1421 PHY_INT_MASK_LINK_DOWN);
1422 check_warn_return(ret, "error enabling PHY wakeup ints\n");
1423
1424 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1425 return smsc75xx_enter_suspend3(dev);
1426}
1427
Steve Glendinning16c79a02012-09-28 00:57:52 +00001428static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message)
1429{
1430 struct usbnet *dev = usb_get_intfdata(intf);
Steve Glendinning6c636502012-09-28 00:57:53 +00001431 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001432 u32 val, link_up;
Steve Glendinning16c79a02012-09-28 00:57:52 +00001433 int ret;
Steve Glendinning16c79a02012-09-28 00:57:52 +00001434
Steve Glendinning16c79a02012-09-28 00:57:52 +00001435 ret = usbnet_suspend(intf, message);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001436 check_warn_goto_done(ret, "usbnet_suspend error\n");
Steve Glendinning16c79a02012-09-28 00:57:52 +00001437
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001438 if (pdata->suspend_flags) {
1439 netdev_warn(dev->net, "error during last resume\n");
1440 pdata->suspend_flags = 0;
1441 }
1442
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001443 /* determine if link is up using only _nopm functions */
1444 link_up = smsc75xx_link_ok_nopm(dev);
1445
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001446 if (message.event == PM_EVENT_AUTO_SUSPEND) {
1447 ret = smsc75xx_autosuspend(dev, link_up);
1448 goto done;
1449 }
1450
1451 /* if we get this far we're not autosuspending */
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001452 /* if no wol options set, or if link is down and we're not waking on
1453 * PHY activity, enter lowest power SUSPEND2 mode
1454 */
1455 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1456 !(link_up || (pdata->wolopts & WAKE_PHY))) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001457 netdev_info(dev->net, "entering SUSPEND2 mode\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001458
1459 /* disable energy detect (link up) & wake up events */
Ming Lei47bbea42012-11-06 04:53:05 +00001460 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001461 check_warn_goto_done(ret, "Error reading WUCSR\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001462
1463 val &= ~(WUCSR_MPEN | WUCSR_WUEN);
1464
Ming Lei47bbea42012-11-06 04:53:05 +00001465 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001466 check_warn_goto_done(ret, "Error writing WUCSR\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001467
Ming Lei47bbea42012-11-06 04:53:05 +00001468 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001469 check_warn_goto_done(ret, "Error reading PMT_CTL\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001470
1471 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN);
1472
Ming Lei47bbea42012-11-06 04:53:05 +00001473 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001474 check_warn_goto_done(ret, "Error writing PMT_CTL\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001475
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001476 ret = smsc75xx_enter_suspend2(dev);
1477 goto done;
Steve Glendinning6c636502012-09-28 00:57:53 +00001478 }
1479
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001480 if (pdata->wolopts & WAKE_PHY) {
1481 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1482 (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN));
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001483 check_warn_goto_done(ret, "error enabling PHY wakeup ints\n");
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001484
1485 /* if link is down then configure EDPD and enter SUSPEND1,
1486 * otherwise enter SUSPEND0 below
1487 */
1488 if (!link_up) {
1489 struct mii_if_info *mii = &dev->mii;
1490 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1491
1492 /* enable energy detect power-down mode */
1493 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id,
1494 PHY_MODE_CTRL_STS);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001495 check_warn_goto_done(ret, "Error reading PHY_MODE_CTRL_STS\n");
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001496
1497 ret |= MODE_CTRL_STS_EDPWRDOWN;
1498
1499 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id,
1500 PHY_MODE_CTRL_STS, ret);
1501
1502 /* enter SUSPEND1 mode */
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001503 ret = smsc75xx_enter_suspend1(dev);
1504 goto done;
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001505 }
1506 }
1507
Steve Glendinning899a3912012-10-30 07:46:32 +00001508 if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) {
1509 int i, filter = 0;
1510
1511 /* disable all filters */
1512 for (i = 0; i < WUF_NUM; i++) {
Ming Lei47bbea42012-11-06 04:53:05 +00001513 ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001514 check_warn_goto_done(ret, "Error writing WUF_CFGX\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001515 }
1516
1517 if (pdata->wolopts & WAKE_MCAST) {
1518 const u8 mcast[] = {0x01, 0x00, 0x5E};
Joe Perches1e1d7412012-11-24 01:27:49 +00001519 netdev_info(dev->net, "enabling multicast detection\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001520
1521 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST
1522 | smsc_crc(mcast, 3);
1523 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001524 check_warn_goto_done(ret, "Error writing wakeup filter\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001525 }
1526
1527 if (pdata->wolopts & WAKE_ARP) {
1528 const u8 arp[] = {0x08, 0x06};
Joe Perches1e1d7412012-11-24 01:27:49 +00001529 netdev_info(dev->net, "enabling ARP detection\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001530
1531 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16)
1532 | smsc_crc(arp, 2);
1533 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001534 check_warn_goto_done(ret, "Error writing wakeup filter\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001535 }
1536
1537 /* clear any pending pattern match packet status */
Ming Lei47bbea42012-11-06 04:53:05 +00001538 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001539 check_warn_goto_done(ret, "Error reading WUCSR\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001540
Steve Glendinning899a3912012-10-30 07:46:32 +00001541 val |= WUCSR_WUFR;
1542
Ming Lei47bbea42012-11-06 04:53:05 +00001543 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001544 check_warn_goto_done(ret, "Error writing WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001545
Joe Perches1e1d7412012-11-24 01:27:49 +00001546 netdev_info(dev->net, "enabling packet match detection\n");
Ming Lei47bbea42012-11-06 04:53:05 +00001547 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001548 check_warn_goto_done(ret, "Error reading WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001549
1550 val |= WUCSR_WUEN;
1551
Ming Lei47bbea42012-11-06 04:53:05 +00001552 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001553 check_warn_goto_done(ret, "Error writing WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001554 } else {
Joe Perches1e1d7412012-11-24 01:27:49 +00001555 netdev_info(dev->net, "disabling packet match detection\n");
Ming Lei47bbea42012-11-06 04:53:05 +00001556 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001557 check_warn_goto_done(ret, "Error reading WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001558
1559 val &= ~WUCSR_WUEN;
Steve Glendinning6c636502012-09-28 00:57:53 +00001560
Ming Lei47bbea42012-11-06 04:53:05 +00001561 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001562 check_warn_goto_done(ret, "Error writing WUCSR\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001563 }
1564
Steve Glendinning899a3912012-10-30 07:46:32 +00001565 /* disable magic, bcast & unicast wakeup sources */
Ming Lei47bbea42012-11-06 04:53:05 +00001566 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001567 check_warn_goto_done(ret, "Error reading WUCSR\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001568
Steve Glendinning899a3912012-10-30 07:46:32 +00001569 val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN);
Steve Glendinning6c636502012-09-28 00:57:53 +00001570
Ming Lei47bbea42012-11-06 04:53:05 +00001571 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001572 check_warn_goto_done(ret, "Error writing WUCSR\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001573
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001574 if (pdata->wolopts & WAKE_PHY) {
1575 netdev_info(dev->net, "enabling PHY wakeup\n");
1576
1577 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001578 check_warn_goto_done(ret, "Error reading PMT_CTL\n");
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001579
1580 /* clear wol status, enable energy detection */
1581 val &= ~PMT_CTL_WUPS;
1582 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1583
1584 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001585 check_warn_goto_done(ret, "Error writing PMT_CTL\n");
Steve Glendinningf329ccd2012-11-28 05:59:47 +00001586 }
1587
Steve Glendinning899a3912012-10-30 07:46:32 +00001588 if (pdata->wolopts & WAKE_MAGIC) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001589 netdev_info(dev->net, "enabling magic packet wakeup\n");
Ming Lei47bbea42012-11-06 04:53:05 +00001590 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001591 check_warn_goto_done(ret, "Error reading WUCSR\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001592
Steve Glendinning899a3912012-10-30 07:46:32 +00001593 /* clear any pending magic packet status */
1594 val |= WUCSR_MPR | WUCSR_MPEN;
Steve Glendinning6c636502012-09-28 00:57:53 +00001595
Ming Lei47bbea42012-11-06 04:53:05 +00001596 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001597 check_warn_goto_done(ret, "Error writing WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001598 }
Steve Glendinning6c636502012-09-28 00:57:53 +00001599
Steve Glendinning899a3912012-10-30 07:46:32 +00001600 if (pdata->wolopts & WAKE_BCAST) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001601 netdev_info(dev->net, "enabling broadcast detection\n");
Ming Lei47bbea42012-11-06 04:53:05 +00001602 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001603 check_warn_goto_done(ret, "Error reading WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001604
1605 val |= WUCSR_BCAST_FR | WUCSR_BCST_EN;
1606
Ming Lei47bbea42012-11-06 04:53:05 +00001607 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001608 check_warn_goto_done(ret, "Error writing WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001609 }
1610
1611 if (pdata->wolopts & WAKE_UCAST) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001612 netdev_info(dev->net, "enabling unicast detection\n");
Ming Lei47bbea42012-11-06 04:53:05 +00001613 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001614 check_warn_goto_done(ret, "Error reading WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001615
1616 val |= WUCSR_WUFR | WUCSR_PFDA_EN;
1617
Ming Lei47bbea42012-11-06 04:53:05 +00001618 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001619 check_warn_goto_done(ret, "Error writing WUCSR\n");
Steve Glendinning899a3912012-10-30 07:46:32 +00001620 }
1621
1622 /* enable receiver to enable frame reception */
Ming Lei47bbea42012-11-06 04:53:05 +00001623 ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001624 check_warn_goto_done(ret, "Failed to read MAC_RX: %d\n", ret);
Steve Glendinning6c636502012-09-28 00:57:53 +00001625
1626 val |= MAC_RX_RXEN;
1627
Ming Lei47bbea42012-11-06 04:53:05 +00001628 ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val);
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001629 check_warn_goto_done(ret, "Failed to write MAC_RX: %d\n", ret);
Steve Glendinning6c636502012-09-28 00:57:53 +00001630
1631 /* some wol options are enabled, so enter SUSPEND0 */
Joe Perches1e1d7412012-11-24 01:27:49 +00001632 netdev_info(dev->net, "entering SUSPEND0 mode\n");
Steve Glendinningeacdd6c2012-11-28 05:59:48 +00001633 ret = smsc75xx_enter_suspend0(dev);
1634
1635done:
1636 if (ret)
1637 usbnet_resume(intf);
1638 return ret;
Steve Glendinning16c79a02012-09-28 00:57:52 +00001639}
1640
1641static int smsc75xx_resume(struct usb_interface *intf)
1642{
1643 struct usbnet *dev = usb_get_intfdata(intf);
Steve Glendinning6c636502012-09-28 00:57:53 +00001644 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001645 u8 suspend_flags = pdata->suspend_flags;
Steve Glendinning16c79a02012-09-28 00:57:52 +00001646 int ret;
1647 u32 val;
1648
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001649 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
Steve Glendinning16c79a02012-09-28 00:57:52 +00001650
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001651 /* do this first to ensure it's cleared even in error case */
1652 pdata->suspend_flags = 0;
Steve Glendinning16c79a02012-09-28 00:57:52 +00001653
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001654 if (suspend_flags & SUSPEND_REMOTEWAKE) {
1655 ret = smsc75xx_clear_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1656 check_warn_return(ret, "Error disabling remote wakeup\n");
1657 }
1658
1659 if (suspend_flags & SUSPEND_ALLMODES) {
Steve Glendinning899a3912012-10-30 07:46:32 +00001660 /* Disable wakeup sources */
Ming Lei47bbea42012-11-06 04:53:05 +00001661 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
Joe Perches1e1d7412012-11-24 01:27:49 +00001662 check_warn_return(ret, "Error reading WUCSR\n");
Steve Glendinning16c79a02012-09-28 00:57:52 +00001663
Steve Glendinning899a3912012-10-30 07:46:32 +00001664 val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN
1665 | WUCSR_BCST_EN);
Steve Glendinning16c79a02012-09-28 00:57:52 +00001666
Ming Lei47bbea42012-11-06 04:53:05 +00001667 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
Joe Perches1e1d7412012-11-24 01:27:49 +00001668 check_warn_return(ret, "Error writing WUCSR\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001669
1670 /* clear wake-up status */
Ming Lei47bbea42012-11-06 04:53:05 +00001671 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
Joe Perches1e1d7412012-11-24 01:27:49 +00001672 check_warn_return(ret, "Error reading PMT_CTL\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001673
1674 val &= ~PMT_CTL_WOL_EN;
1675 val |= PMT_CTL_WUPS;
1676
Ming Lei47bbea42012-11-06 04:53:05 +00001677 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
Joe Perches1e1d7412012-11-24 01:27:49 +00001678 check_warn_return(ret, "Error writing PMT_CTL\n");
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001679 }
1680
1681 if (suspend_flags & SUSPEND_SUSPEND2) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001682 netdev_info(dev->net, "resuming from SUSPEND2\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001683
Ming Lei47bbea42012-11-06 04:53:05 +00001684 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
Joe Perches1e1d7412012-11-24 01:27:49 +00001685 check_warn_return(ret, "Error reading PMT_CTL\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001686
1687 val |= PMT_CTL_PHY_PWRUP;
1688
Ming Lei47bbea42012-11-06 04:53:05 +00001689 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
Joe Perches1e1d7412012-11-24 01:27:49 +00001690 check_warn_return(ret, "Error writing PMT_CTL\n");
Steve Glendinning6c636502012-09-28 00:57:53 +00001691 }
Steve Glendinning16c79a02012-09-28 00:57:52 +00001692
Ming Lei47bbea42012-11-06 04:53:05 +00001693 ret = smsc75xx_wait_ready(dev, 1);
Joe Perches1e1d7412012-11-24 01:27:49 +00001694 check_warn_return(ret, "device not ready in smsc75xx_resume\n");
Steve Glendinning16c79a02012-09-28 00:57:52 +00001695
1696 return usbnet_resume(intf);
1697}
1698
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001699static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
1700 u32 rx_cmd_a, u32 rx_cmd_b)
Steve Glendinningd0cad872010-03-16 08:46:46 +00001701{
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001702 if (!(dev->net->features & NETIF_F_RXCSUM) ||
1703 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
Steve Glendinningd0cad872010-03-16 08:46:46 +00001704 skb->ip_summed = CHECKSUM_NONE;
1705 } else {
1706 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
1707 skb->ip_summed = CHECKSUM_COMPLETE;
1708 }
1709}
1710
1711static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1712{
Steve Glendinningd0cad872010-03-16 08:46:46 +00001713 while (skb->len > 0) {
1714 u32 rx_cmd_a, rx_cmd_b, align_count, size;
1715 struct sk_buff *ax_skb;
1716 unsigned char *packet;
1717
1718 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
1719 le32_to_cpus(&rx_cmd_a);
1720 skb_pull(skb, 4);
1721
1722 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
1723 le32_to_cpus(&rx_cmd_b);
Nico Erfurthea1649d2011-11-08 07:30:40 +00001724 skb_pull(skb, 4 + RXW_PADDING);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001725
1726 packet = skb->data;
1727
1728 /* get the packet length */
Nico Erfurthea1649d2011-11-08 07:30:40 +00001729 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
1730 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
Steve Glendinningd0cad872010-03-16 08:46:46 +00001731
1732 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
1733 netif_dbg(dev, rx_err, dev->net,
Joe Perches1e1d7412012-11-24 01:27:49 +00001734 "Error rx_cmd_a=0x%08x\n", rx_cmd_a);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001735 dev->net->stats.rx_errors++;
1736 dev->net->stats.rx_dropped++;
1737
1738 if (rx_cmd_a & RX_CMD_A_FCS)
1739 dev->net->stats.rx_crc_errors++;
1740 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
1741 dev->net->stats.rx_frame_errors++;
1742 } else {
1743 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1744 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1745 netif_dbg(dev, rx_err, dev->net,
Joe Perches1e1d7412012-11-24 01:27:49 +00001746 "size err rx_cmd_a=0x%08x\n",
1747 rx_cmd_a);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001748 return 0;
1749 }
1750
1751 /* last frame in this batch */
1752 if (skb->len == size) {
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001753 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
1754 rx_cmd_b);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001755
1756 skb_trim(skb, skb->len - 4); /* remove fcs */
1757 skb->truesize = size + sizeof(struct sk_buff);
1758
1759 return 1;
1760 }
1761
1762 ax_skb = skb_clone(skb, GFP_ATOMIC);
1763 if (unlikely(!ax_skb)) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001764 netdev_warn(dev->net, "Error allocating skb\n");
Steve Glendinningd0cad872010-03-16 08:46:46 +00001765 return 0;
1766 }
1767
1768 ax_skb->len = size;
1769 ax_skb->data = packet;
1770 skb_set_tail_pointer(ax_skb, size);
1771
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001772 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
1773 rx_cmd_b);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001774
1775 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1776 ax_skb->truesize = size + sizeof(struct sk_buff);
1777
1778 usbnet_skb_return(dev, ax_skb);
1779 }
1780
1781 skb_pull(skb, size);
1782
1783 /* padding bytes before the next frame starts */
1784 if (skb->len)
1785 skb_pull(skb, align_count);
1786 }
1787
1788 if (unlikely(skb->len < 0)) {
Joe Perches1e1d7412012-11-24 01:27:49 +00001789 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001790 return 0;
1791 }
1792
1793 return 1;
1794}
1795
1796static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
1797 struct sk_buff *skb, gfp_t flags)
1798{
1799 u32 tx_cmd_a, tx_cmd_b;
1800
1801 skb_linearize(skb);
1802
1803 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
1804 struct sk_buff *skb2 =
1805 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
1806 dev_kfree_skb_any(skb);
1807 skb = skb2;
1808 if (!skb)
1809 return NULL;
1810 }
1811
1812 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
1813
1814 if (skb->ip_summed == CHECKSUM_PARTIAL)
1815 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
1816
1817 if (skb_is_gso(skb)) {
1818 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
1819 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
1820
1821 tx_cmd_a |= TX_CMD_A_LSO;
1822 } else {
1823 tx_cmd_b = 0;
1824 }
1825
1826 skb_push(skb, 4);
1827 cpu_to_le32s(&tx_cmd_b);
1828 memcpy(skb->data, &tx_cmd_b, 4);
1829
1830 skb_push(skb, 4);
1831 cpu_to_le32s(&tx_cmd_a);
1832 memcpy(skb->data, &tx_cmd_a, 4);
1833
1834 return skb;
1835}
1836
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001837static int smsc75xx_manage_power(struct usbnet *dev, int on)
1838{
1839 dev->intf->needs_remote_wakeup = on;
1840 return 0;
1841}
1842
Steve Glendinningd0cad872010-03-16 08:46:46 +00001843static const struct driver_info smsc75xx_info = {
1844 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
1845 .bind = smsc75xx_bind,
1846 .unbind = smsc75xx_unbind,
1847 .link_reset = smsc75xx_link_reset,
1848 .reset = smsc75xx_reset,
1849 .rx_fixup = smsc75xx_rx_fixup,
1850 .tx_fixup = smsc75xx_tx_fixup,
1851 .status = smsc75xx_status,
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001852 .manage_power = smsc75xx_manage_power,
Steve Glendinning7bdd3052012-04-30 07:56:50 +00001853 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
Steve Glendinningd0cad872010-03-16 08:46:46 +00001854};
1855
1856static const struct usb_device_id products[] = {
1857 {
1858 /* SMSC7500 USB Gigabit Ethernet Device */
1859 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
1860 .driver_info = (unsigned long) &smsc75xx_info,
1861 },
1862 {
1863 /* SMSC7500 USB Gigabit Ethernet Device */
1864 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
1865 .driver_info = (unsigned long) &smsc75xx_info,
1866 },
1867 { }, /* END */
1868};
1869MODULE_DEVICE_TABLE(usb, products);
1870
1871static struct usb_driver smsc75xx_driver = {
1872 .name = SMSC_CHIPNAME,
1873 .id_table = products,
1874 .probe = usbnet_probe,
Steve Glendinning16c79a02012-09-28 00:57:52 +00001875 .suspend = smsc75xx_suspend,
1876 .resume = smsc75xx_resume,
1877 .reset_resume = smsc75xx_resume,
Steve Glendinningd0cad872010-03-16 08:46:46 +00001878 .disconnect = usbnet_disconnect,
Sarah Sharpe1f12eb2012-04-23 10:08:51 -07001879 .disable_hub_initiated_lpm = 1,
Steve Glendinningb4cdea92012-11-28 05:59:49 +00001880 .supports_autosuspend = 1,
Steve Glendinningd0cad872010-03-16 08:46:46 +00001881};
1882
Greg Kroah-Hartmand632eb12011-11-18 09:44:20 -08001883module_usb_driver(smsc75xx_driver);
Steve Glendinningd0cad872010-03-16 08:46:46 +00001884
1885MODULE_AUTHOR("Nancy Lin");
Steve Glendinning90b24cf2012-04-16 12:13:29 +01001886MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
Steve Glendinningd0cad872010-03-16 08:46:46 +00001887MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
1888MODULE_LICENSE("GPL");