blob: 6f4257fc56e5192f0b743a00d7bafcbb3b5566c3 [file] [log] [blame]
Michal Simekbd2a3372013-06-04 07:17:39 +00001/*
2 * Copyright (C) 2012-2013 Xilinx
3 *
4 * CPU idle support for Xilinx Zynq
5 *
6 * based on arch/arm/mach-at91/cpuidle.c
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
19 *
20 * The cpu idle uses wait-for-interrupt and RAM self refresh in order
21 * to implement two idle states -
22 * #1 wait-for-interrupt
23 * #2 wait-for-interrupt and RAM self refresh
24 *
25 * Maintainer: Michal Simek <michal.simek@xilinx.com>
26 */
27
28#include <linux/init.h>
Michal Simekbd2a3372013-06-04 07:17:39 +000029#include <linux/cpuidle.h>
Daniel Lezcano3e8ceca2013-09-21 18:41:02 +020030#include <linux/platform_device.h>
Michal Simekbd2a3372013-06-04 07:17:39 +000031#include <asm/cpuidle.h>
32
33#define ZYNQ_MAX_STATES 2
34
35/* Actual code that puts the SoC in different idle states */
36static int zynq_enter_idle(struct cpuidle_device *dev,
37 struct cpuidle_driver *drv, int index)
38{
Michal Simekbd2a3372013-06-04 07:17:39 +000039 /* Add code for DDR self refresh start */
40 cpu_do_idle();
41
Michal Simekbd2a3372013-06-04 07:17:39 +000042 return index;
43}
44
45static struct cpuidle_driver zynq_idle_driver = {
46 .name = "zynq_idle",
47 .owner = THIS_MODULE,
48 .states = {
49 ARM_CPUIDLE_WFI_STATE,
50 {
51 .enter = zynq_enter_idle,
52 .exit_latency = 10,
53 .target_residency = 10000,
Michal Simekbd2a3372013-06-04 07:17:39 +000054 .name = "RAM_SR",
55 .desc = "WFI and RAM Self Refresh",
56 },
57 },
58 .safe_state_index = 0,
59 .state_count = ZYNQ_MAX_STATES,
60};
61
62/* Initialize CPU idle by registering the idle states */
Daniel Lezcano3e8ceca2013-09-21 18:41:02 +020063static int zynq_cpuidle_probe(struct platform_device *pdev)
Michal Simekbd2a3372013-06-04 07:17:39 +000064{
Michal Simekbd2a3372013-06-04 07:17:39 +000065 pr_info("Xilinx Zynq CpuIdle Driver started\n");
66
67 return cpuidle_register(&zynq_idle_driver, NULL);
68}
69
Daniel Lezcano3e8ceca2013-09-21 18:41:02 +020070static struct platform_driver zynq_cpuidle_driver = {
71 .driver = {
72 .name = "cpuidle-zynq",
Daniel Lezcano3e8ceca2013-09-21 18:41:02 +020073 },
74 .probe = zynq_cpuidle_probe,
75};
Paul Gortmaker090d1cf2015-05-01 20:10:57 -040076builtin_platform_driver(zynq_cpuidle_driver);