Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2011 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 21 | * SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Jesse Barnes <jbarnes@virtuousgeek.org> |
| 25 | * |
| 26 | * New plane/sprite handling. |
| 27 | * |
| 28 | * The older chips had a separate interface for programming plane related |
| 29 | * registers; newer ones are much simpler and we can use the new DRM plane |
| 30 | * support. |
| 31 | */ |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 32 | #include <drm/drmP.h> |
| 33 | #include <drm/drm_crtc.h> |
| 34 | #include <drm/drm_fourcc.h> |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 35 | #include "intel_drv.h" |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 36 | #include <drm/i915_drm.h> |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 37 | #include "i915_drv.h" |
| 38 | |
| 39 | static void |
| 40 | ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, |
| 41 | struct drm_i915_gem_object *obj, int crtc_x, int crtc_y, |
| 42 | unsigned int crtc_w, unsigned int crtc_h, |
| 43 | uint32_t x, uint32_t y, |
| 44 | uint32_t src_w, uint32_t src_h) |
| 45 | { |
| 46 | struct drm_device *dev = plane->dev; |
| 47 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 48 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 49 | int pipe = intel_plane->pipe; |
| 50 | u32 sprctl, sprscale = 0; |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 51 | unsigned long sprsurf_offset, linear_offset; |
Ville Syrjälä | 2bd3c3c | 2012-10-31 17:50:20 +0200 | [diff] [blame] | 52 | int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); |
Ville Syrjälä | 2c6602d | 2013-02-08 23:13:35 +0200 | [diff] [blame] | 53 | bool scaling_was_enabled = dev_priv->sprite_scaling_enabled; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 54 | |
| 55 | sprctl = I915_READ(SPRCTL(pipe)); |
| 56 | |
| 57 | /* Mask out pixel format bits in case we change it */ |
| 58 | sprctl &= ~SPRITE_PIXFORMAT_MASK; |
| 59 | sprctl &= ~SPRITE_RGB_ORDER_RGBX; |
| 60 | sprctl &= ~SPRITE_YUV_BYTE_ORDER_MASK; |
Jesse Barnes | e86fe0d | 2012-06-26 13:10:11 -0700 | [diff] [blame] | 61 | sprctl &= ~SPRITE_TILED; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 62 | |
| 63 | switch (fb->pixel_format) { |
| 64 | case DRM_FORMAT_XBGR8888: |
Vijay Purushothaman | 5ee3691 | 2012-08-23 12:08:57 +0530 | [diff] [blame] | 65 | sprctl |= SPRITE_FORMAT_RGBX888 | SPRITE_RGB_ORDER_RGBX; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 66 | break; |
| 67 | case DRM_FORMAT_XRGB8888: |
Vijay Purushothaman | 5ee3691 | 2012-08-23 12:08:57 +0530 | [diff] [blame] | 68 | sprctl |= SPRITE_FORMAT_RGBX888; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 69 | break; |
| 70 | case DRM_FORMAT_YUYV: |
| 71 | sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_YUYV; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 72 | break; |
| 73 | case DRM_FORMAT_YVYU: |
| 74 | sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_YVYU; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 75 | break; |
| 76 | case DRM_FORMAT_UYVY: |
| 77 | sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_UYVY; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 78 | break; |
| 79 | case DRM_FORMAT_VYUY: |
| 80 | sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_VYUY; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 81 | break; |
| 82 | default: |
Ville Syrjälä | 28d491d | 2012-10-31 17:50:21 +0200 | [diff] [blame] | 83 | BUG(); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | if (obj->tiling_mode != I915_TILING_NONE) |
| 87 | sprctl |= SPRITE_TILED; |
| 88 | |
| 89 | /* must disable */ |
| 90 | sprctl |= SPRITE_TRICKLE_FEED_DISABLE; |
| 91 | sprctl |= SPRITE_ENABLE; |
| 92 | |
Ville Syrjälä | 86d3efc | 2013-01-18 19:11:38 +0200 | [diff] [blame] | 93 | if (IS_HASWELL(dev)) |
| 94 | sprctl |= SPRITE_PIPE_CSC_ENABLE; |
| 95 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 96 | /* Sizes are 0 based */ |
| 97 | src_w--; |
| 98 | src_h--; |
| 99 | crtc_w--; |
| 100 | crtc_h--; |
| 101 | |
| 102 | intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size); |
| 103 | |
| 104 | /* |
| 105 | * IVB workaround: must disable low power watermarks for at least |
| 106 | * one frame before enabling scaling. LP watermarks can be re-enabled |
| 107 | * when scaling is disabled. |
| 108 | */ |
| 109 | if (crtc_w != src_w || crtc_h != src_h) { |
Ville Syrjälä | 2c6602d | 2013-02-08 23:13:35 +0200 | [diff] [blame] | 110 | dev_priv->sprite_scaling_enabled |= 1 << pipe; |
| 111 | |
| 112 | if (!scaling_was_enabled) { |
Chris Wilson | 828ed3e | 2012-04-18 17:12:26 +0100 | [diff] [blame] | 113 | intel_update_watermarks(dev); |
| 114 | intel_wait_for_vblank(dev, pipe); |
| 115 | } |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 116 | sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h; |
Ville Syrjälä | 2c6602d | 2013-02-08 23:13:35 +0200 | [diff] [blame] | 117 | } else |
| 118 | dev_priv->sprite_scaling_enabled &= ~(1 << pipe); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 119 | |
| 120 | I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]); |
| 121 | I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x); |
Damien Lespiau | c54173a | 2012-10-26 18:20:11 +0100 | [diff] [blame] | 122 | |
Chris Wilson | ca320ac | 2012-12-19 12:14:22 +0000 | [diff] [blame] | 123 | linear_offset = y * fb->pitches[0] + x * pixel_size; |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 124 | sprsurf_offset = |
Chris Wilson | bc75286 | 2013-02-21 20:04:31 +0000 | [diff] [blame] | 125 | intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode, |
| 126 | pixel_size, fb->pitches[0]); |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 127 | linear_offset -= sprsurf_offset; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 128 | |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 129 | /* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET |
| 130 | * register */ |
| 131 | if (IS_HASWELL(dev)) |
| 132 | I915_WRITE(SPROFFSET(pipe), (y << 16) | x); |
| 133 | else if (obj->tiling_mode != I915_TILING_NONE) |
| 134 | I915_WRITE(SPRTILEOFF(pipe), (y << 16) | x); |
| 135 | else |
| 136 | I915_WRITE(SPRLINOFF(pipe), linear_offset); |
Damien Lespiau | c54173a | 2012-10-26 18:20:11 +0100 | [diff] [blame] | 137 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 138 | I915_WRITE(SPRSIZE(pipe), (crtc_h << 16) | crtc_w); |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 139 | if (intel_plane->can_scale) |
| 140 | I915_WRITE(SPRSCALE(pipe), sprscale); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 141 | I915_WRITE(SPRCTL(pipe), sprctl); |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 142 | I915_MODIFY_DISPBASE(SPRSURF(pipe), obj->gtt_offset + sprsurf_offset); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 143 | POSTING_READ(SPRSURF(pipe)); |
Ville Syrjälä | 2c6602d | 2013-02-08 23:13:35 +0200 | [diff] [blame] | 144 | |
| 145 | /* potentially re-enable LP watermarks */ |
| 146 | if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled) |
| 147 | intel_update_watermarks(dev); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | static void |
| 151 | ivb_disable_plane(struct drm_plane *plane) |
| 152 | { |
| 153 | struct drm_device *dev = plane->dev; |
| 154 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 155 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 156 | int pipe = intel_plane->pipe; |
Ville Syrjälä | 2c6602d | 2013-02-08 23:13:35 +0200 | [diff] [blame] | 157 | bool scaling_was_enabled = dev_priv->sprite_scaling_enabled; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 158 | |
| 159 | I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE); |
| 160 | /* Can't leave the scaler enabled... */ |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 161 | if (intel_plane->can_scale) |
| 162 | I915_WRITE(SPRSCALE(pipe), 0); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 163 | /* Activate double buffered register update */ |
Armin Reese | 446f254 | 2012-03-30 16:20:16 -0700 | [diff] [blame] | 164 | I915_MODIFY_DISPBASE(SPRSURF(pipe), 0); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 165 | POSTING_READ(SPRSURF(pipe)); |
Chris Wilson | 828ed3e | 2012-04-18 17:12:26 +0100 | [diff] [blame] | 166 | |
Ville Syrjälä | 2c6602d | 2013-02-08 23:13:35 +0200 | [diff] [blame] | 167 | dev_priv->sprite_scaling_enabled &= ~(1 << pipe); |
| 168 | |
| 169 | /* potentially re-enable LP watermarks */ |
| 170 | if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled) |
| 171 | intel_update_watermarks(dev); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 172 | } |
| 173 | |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 174 | static int |
| 175 | ivb_update_colorkey(struct drm_plane *plane, |
| 176 | struct drm_intel_sprite_colorkey *key) |
| 177 | { |
| 178 | struct drm_device *dev = plane->dev; |
| 179 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 180 | struct intel_plane *intel_plane; |
| 181 | u32 sprctl; |
| 182 | int ret = 0; |
| 183 | |
| 184 | intel_plane = to_intel_plane(plane); |
| 185 | |
| 186 | I915_WRITE(SPRKEYVAL(intel_plane->pipe), key->min_value); |
| 187 | I915_WRITE(SPRKEYMAX(intel_plane->pipe), key->max_value); |
| 188 | I915_WRITE(SPRKEYMSK(intel_plane->pipe), key->channel_mask); |
| 189 | |
| 190 | sprctl = I915_READ(SPRCTL(intel_plane->pipe)); |
| 191 | sprctl &= ~(SPRITE_SOURCE_KEY | SPRITE_DEST_KEY); |
| 192 | if (key->flags & I915_SET_COLORKEY_DESTINATION) |
| 193 | sprctl |= SPRITE_DEST_KEY; |
| 194 | else if (key->flags & I915_SET_COLORKEY_SOURCE) |
| 195 | sprctl |= SPRITE_SOURCE_KEY; |
| 196 | I915_WRITE(SPRCTL(intel_plane->pipe), sprctl); |
| 197 | |
| 198 | POSTING_READ(SPRKEYMSK(intel_plane->pipe)); |
| 199 | |
| 200 | return ret; |
| 201 | } |
| 202 | |
| 203 | static void |
| 204 | ivb_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key) |
| 205 | { |
| 206 | struct drm_device *dev = plane->dev; |
| 207 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 208 | struct intel_plane *intel_plane; |
| 209 | u32 sprctl; |
| 210 | |
| 211 | intel_plane = to_intel_plane(plane); |
| 212 | |
| 213 | key->min_value = I915_READ(SPRKEYVAL(intel_plane->pipe)); |
| 214 | key->max_value = I915_READ(SPRKEYMAX(intel_plane->pipe)); |
| 215 | key->channel_mask = I915_READ(SPRKEYMSK(intel_plane->pipe)); |
| 216 | key->flags = 0; |
| 217 | |
| 218 | sprctl = I915_READ(SPRCTL(intel_plane->pipe)); |
| 219 | |
| 220 | if (sprctl & SPRITE_DEST_KEY) |
| 221 | key->flags = I915_SET_COLORKEY_DESTINATION; |
| 222 | else if (sprctl & SPRITE_SOURCE_KEY) |
| 223 | key->flags = I915_SET_COLORKEY_SOURCE; |
| 224 | else |
| 225 | key->flags = I915_SET_COLORKEY_NONE; |
| 226 | } |
| 227 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 228 | static void |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 229 | ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 230 | struct drm_i915_gem_object *obj, int crtc_x, int crtc_y, |
| 231 | unsigned int crtc_w, unsigned int crtc_h, |
| 232 | uint32_t x, uint32_t y, |
| 233 | uint32_t src_w, uint32_t src_h) |
| 234 | { |
| 235 | struct drm_device *dev = plane->dev; |
| 236 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 237 | struct intel_plane *intel_plane = to_intel_plane(plane); |
Ville Syrjälä | 2bd3c3c | 2012-10-31 17:50:20 +0200 | [diff] [blame] | 238 | int pipe = intel_plane->pipe; |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 239 | unsigned long dvssurf_offset, linear_offset; |
Chris Wilson | 8aaa81a | 2012-04-14 22:14:26 +0100 | [diff] [blame] | 240 | u32 dvscntr, dvsscale; |
Ville Syrjälä | 2bd3c3c | 2012-10-31 17:50:20 +0200 | [diff] [blame] | 241 | int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 242 | |
| 243 | dvscntr = I915_READ(DVSCNTR(pipe)); |
| 244 | |
| 245 | /* Mask out pixel format bits in case we change it */ |
| 246 | dvscntr &= ~DVS_PIXFORMAT_MASK; |
Jesse Barnes | ab2f9df | 2012-02-27 12:40:10 -0800 | [diff] [blame] | 247 | dvscntr &= ~DVS_RGB_ORDER_XBGR; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 248 | dvscntr &= ~DVS_YUV_BYTE_ORDER_MASK; |
Ander Conselvan de Oliveira | 7962652 | 2012-07-13 15:50:33 +0300 | [diff] [blame] | 249 | dvscntr &= ~DVS_TILED; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 250 | |
| 251 | switch (fb->pixel_format) { |
| 252 | case DRM_FORMAT_XBGR8888: |
Jesse Barnes | ab2f9df | 2012-02-27 12:40:10 -0800 | [diff] [blame] | 253 | dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_XBGR; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 254 | break; |
| 255 | case DRM_FORMAT_XRGB8888: |
Jesse Barnes | ab2f9df | 2012-02-27 12:40:10 -0800 | [diff] [blame] | 256 | dvscntr |= DVS_FORMAT_RGBX888; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 257 | break; |
| 258 | case DRM_FORMAT_YUYV: |
| 259 | dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_YUYV; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 260 | break; |
| 261 | case DRM_FORMAT_YVYU: |
| 262 | dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_YVYU; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 263 | break; |
| 264 | case DRM_FORMAT_UYVY: |
| 265 | dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_UYVY; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 266 | break; |
| 267 | case DRM_FORMAT_VYUY: |
| 268 | dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_VYUY; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 269 | break; |
| 270 | default: |
Ville Syrjälä | 28d491d | 2012-10-31 17:50:21 +0200 | [diff] [blame] | 271 | BUG(); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 272 | } |
| 273 | |
| 274 | if (obj->tiling_mode != I915_TILING_NONE) |
| 275 | dvscntr |= DVS_TILED; |
| 276 | |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 277 | if (IS_GEN6(dev)) |
| 278 | dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */ |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 279 | dvscntr |= DVS_ENABLE; |
| 280 | |
| 281 | /* Sizes are 0 based */ |
| 282 | src_w--; |
| 283 | src_h--; |
| 284 | crtc_w--; |
| 285 | crtc_h--; |
| 286 | |
| 287 | intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size); |
| 288 | |
Chris Wilson | 8aaa81a | 2012-04-14 22:14:26 +0100 | [diff] [blame] | 289 | dvsscale = 0; |
| 290 | if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 291 | dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; |
| 292 | |
| 293 | I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]); |
| 294 | I915_WRITE(DVSPOS(pipe), (crtc_y << 16) | crtc_x); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 295 | |
Chris Wilson | ca320ac | 2012-12-19 12:14:22 +0000 | [diff] [blame] | 296 | linear_offset = y * fb->pitches[0] + x * pixel_size; |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 297 | dvssurf_offset = |
Chris Wilson | bc75286 | 2013-02-21 20:04:31 +0000 | [diff] [blame] | 298 | intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode, |
| 299 | pixel_size, fb->pitches[0]); |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 300 | linear_offset -= dvssurf_offset; |
| 301 | |
| 302 | if (obj->tiling_mode != I915_TILING_NONE) |
| 303 | I915_WRITE(DVSTILEOFF(pipe), (y << 16) | x); |
| 304 | else |
| 305 | I915_WRITE(DVSLINOFF(pipe), linear_offset); |
| 306 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 307 | I915_WRITE(DVSSIZE(pipe), (crtc_h << 16) | crtc_w); |
| 308 | I915_WRITE(DVSSCALE(pipe), dvsscale); |
| 309 | I915_WRITE(DVSCNTR(pipe), dvscntr); |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 310 | I915_MODIFY_DISPBASE(DVSSURF(pipe), obj->gtt_offset + dvssurf_offset); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 311 | POSTING_READ(DVSSURF(pipe)); |
| 312 | } |
| 313 | |
| 314 | static void |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 315 | ilk_disable_plane(struct drm_plane *plane) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 316 | { |
| 317 | struct drm_device *dev = plane->dev; |
| 318 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 319 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 320 | int pipe = intel_plane->pipe; |
| 321 | |
| 322 | I915_WRITE(DVSCNTR(pipe), I915_READ(DVSCNTR(pipe)) & ~DVS_ENABLE); |
| 323 | /* Disable the scaler */ |
| 324 | I915_WRITE(DVSSCALE(pipe), 0); |
| 325 | /* Flush double buffered register updates */ |
Armin Reese | 446f254 | 2012-03-30 16:20:16 -0700 | [diff] [blame] | 326 | I915_MODIFY_DISPBASE(DVSSURF(pipe), 0); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 327 | POSTING_READ(DVSSURF(pipe)); |
| 328 | } |
| 329 | |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 330 | static void |
| 331 | intel_enable_primary(struct drm_crtc *crtc) |
| 332 | { |
| 333 | struct drm_device *dev = crtc->dev; |
| 334 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 335 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 336 | int reg = DSPCNTR(intel_crtc->plane); |
| 337 | |
Chris Wilson | 93314b5 | 2012-06-13 17:36:55 +0100 | [diff] [blame] | 338 | if (!intel_crtc->primary_disabled) |
| 339 | return; |
| 340 | |
| 341 | intel_crtc->primary_disabled = false; |
| 342 | intel_update_fbc(dev); |
| 343 | |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 344 | I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE); |
| 345 | } |
| 346 | |
| 347 | static void |
| 348 | intel_disable_primary(struct drm_crtc *crtc) |
| 349 | { |
| 350 | struct drm_device *dev = crtc->dev; |
| 351 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 352 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 353 | int reg = DSPCNTR(intel_crtc->plane); |
| 354 | |
Chris Wilson | 93314b5 | 2012-06-13 17:36:55 +0100 | [diff] [blame] | 355 | if (intel_crtc->primary_disabled) |
| 356 | return; |
| 357 | |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 358 | I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE); |
Chris Wilson | 93314b5 | 2012-06-13 17:36:55 +0100 | [diff] [blame] | 359 | |
| 360 | intel_crtc->primary_disabled = true; |
| 361 | intel_update_fbc(dev); |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 362 | } |
| 363 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 364 | static int |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 365 | ilk_update_colorkey(struct drm_plane *plane, |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 366 | struct drm_intel_sprite_colorkey *key) |
| 367 | { |
| 368 | struct drm_device *dev = plane->dev; |
| 369 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 370 | struct intel_plane *intel_plane; |
| 371 | u32 dvscntr; |
| 372 | int ret = 0; |
| 373 | |
| 374 | intel_plane = to_intel_plane(plane); |
| 375 | |
| 376 | I915_WRITE(DVSKEYVAL(intel_plane->pipe), key->min_value); |
| 377 | I915_WRITE(DVSKEYMAX(intel_plane->pipe), key->max_value); |
| 378 | I915_WRITE(DVSKEYMSK(intel_plane->pipe), key->channel_mask); |
| 379 | |
| 380 | dvscntr = I915_READ(DVSCNTR(intel_plane->pipe)); |
| 381 | dvscntr &= ~(DVS_SOURCE_KEY | DVS_DEST_KEY); |
| 382 | if (key->flags & I915_SET_COLORKEY_DESTINATION) |
| 383 | dvscntr |= DVS_DEST_KEY; |
| 384 | else if (key->flags & I915_SET_COLORKEY_SOURCE) |
| 385 | dvscntr |= DVS_SOURCE_KEY; |
| 386 | I915_WRITE(DVSCNTR(intel_plane->pipe), dvscntr); |
| 387 | |
| 388 | POSTING_READ(DVSKEYMSK(intel_plane->pipe)); |
| 389 | |
| 390 | return ret; |
| 391 | } |
| 392 | |
| 393 | static void |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 394 | ilk_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key) |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 395 | { |
| 396 | struct drm_device *dev = plane->dev; |
| 397 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 398 | struct intel_plane *intel_plane; |
| 399 | u32 dvscntr; |
| 400 | |
| 401 | intel_plane = to_intel_plane(plane); |
| 402 | |
| 403 | key->min_value = I915_READ(DVSKEYVAL(intel_plane->pipe)); |
| 404 | key->max_value = I915_READ(DVSKEYMAX(intel_plane->pipe)); |
| 405 | key->channel_mask = I915_READ(DVSKEYMSK(intel_plane->pipe)); |
| 406 | key->flags = 0; |
| 407 | |
| 408 | dvscntr = I915_READ(DVSCNTR(intel_plane->pipe)); |
| 409 | |
| 410 | if (dvscntr & DVS_DEST_KEY) |
| 411 | key->flags = I915_SET_COLORKEY_DESTINATION; |
| 412 | else if (dvscntr & DVS_SOURCE_KEY) |
| 413 | key->flags = I915_SET_COLORKEY_SOURCE; |
| 414 | else |
| 415 | key->flags = I915_SET_COLORKEY_NONE; |
| 416 | } |
| 417 | |
| 418 | static int |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 419 | intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, |
| 420 | struct drm_framebuffer *fb, int crtc_x, int crtc_y, |
| 421 | unsigned int crtc_w, unsigned int crtc_h, |
| 422 | uint32_t src_x, uint32_t src_y, |
| 423 | uint32_t src_w, uint32_t src_h) |
| 424 | { |
| 425 | struct drm_device *dev = plane->dev; |
| 426 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 427 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 428 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 429 | struct intel_framebuffer *intel_fb; |
| 430 | struct drm_i915_gem_object *obj, *old_obj; |
| 431 | int pipe = intel_plane->pipe; |
Paulo Zanoni | 702e7a5 | 2012-10-23 18:29:59 -0200 | [diff] [blame] | 432 | enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, |
| 433 | pipe); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 434 | int ret = 0; |
| 435 | int x = src_x >> 16, y = src_y >> 16; |
| 436 | int primary_w = crtc->mode.hdisplay, primary_h = crtc->mode.vdisplay; |
| 437 | bool disable_primary = false; |
| 438 | |
| 439 | intel_fb = to_intel_framebuffer(fb); |
| 440 | obj = intel_fb->obj; |
| 441 | |
| 442 | old_obj = intel_plane->obj; |
| 443 | |
Jesse Barnes | 5e1bac2 | 2013-03-26 09:25:43 -0700 | [diff] [blame] | 444 | intel_plane->crtc_x = crtc_x; |
| 445 | intel_plane->crtc_y = crtc_y; |
| 446 | intel_plane->crtc_w = crtc_w; |
| 447 | intel_plane->crtc_h = crtc_h; |
| 448 | intel_plane->src_x = src_x; |
| 449 | intel_plane->src_y = src_y; |
| 450 | intel_plane->src_w = src_w; |
| 451 | intel_plane->src_h = src_h; |
| 452 | |
Jesse Barnes | b4db1e3 | 2012-03-20 10:59:09 -0700 | [diff] [blame] | 453 | src_w = src_w >> 16; |
| 454 | src_h = src_h >> 16; |
| 455 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 456 | /* Pipe must be running... */ |
Paulo Zanoni | 702e7a5 | 2012-10-23 18:29:59 -0200 | [diff] [blame] | 457 | if (!(I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE)) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 458 | return -EINVAL; |
| 459 | |
| 460 | if (crtc_x >= primary_w || crtc_y >= primary_h) |
| 461 | return -EINVAL; |
| 462 | |
| 463 | /* Don't modify another pipe's plane */ |
| 464 | if (intel_plane->pipe != intel_crtc->pipe) |
| 465 | return -EINVAL; |
| 466 | |
Damien Lespiau | 94c6419 | 2012-10-29 15:14:51 +0000 | [diff] [blame] | 467 | /* Sprite planes can be linear or x-tiled surfaces */ |
| 468 | switch (obj->tiling_mode) { |
| 469 | case I915_TILING_NONE: |
| 470 | case I915_TILING_X: |
| 471 | break; |
| 472 | default: |
| 473 | return -EINVAL; |
| 474 | } |
| 475 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 476 | /* |
| 477 | * Clamp the width & height into the visible area. Note we don't |
| 478 | * try to scale the source if part of the visible region is offscreen. |
| 479 | * The caller must handle that by adjusting source offset and size. |
| 480 | */ |
| 481 | if ((crtc_x < 0) && ((crtc_x + crtc_w) > 0)) { |
| 482 | crtc_w += crtc_x; |
| 483 | crtc_x = 0; |
| 484 | } |
| 485 | if ((crtc_x + crtc_w) <= 0) /* Nothing to display */ |
| 486 | goto out; |
| 487 | if ((crtc_x + crtc_w) > primary_w) |
| 488 | crtc_w = primary_w - crtc_x; |
| 489 | |
| 490 | if ((crtc_y < 0) && ((crtc_y + crtc_h) > 0)) { |
| 491 | crtc_h += crtc_y; |
| 492 | crtc_y = 0; |
| 493 | } |
| 494 | if ((crtc_y + crtc_h) <= 0) /* Nothing to display */ |
| 495 | goto out; |
| 496 | if (crtc_y + crtc_h > primary_h) |
| 497 | crtc_h = primary_h - crtc_y; |
| 498 | |
| 499 | if (!crtc_w || !crtc_h) /* Again, nothing to display */ |
| 500 | goto out; |
| 501 | |
| 502 | /* |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 503 | * We may not have a scaler, eg. HSW does not have it any more |
| 504 | */ |
| 505 | if (!intel_plane->can_scale && (crtc_w != src_w || crtc_h != src_h)) |
| 506 | return -EINVAL; |
| 507 | |
| 508 | /* |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 509 | * We can take a larger source and scale it down, but |
| 510 | * only so much... 16x is the max on SNB. |
| 511 | */ |
| 512 | if (((src_w * src_h) / (crtc_w * crtc_h)) > intel_plane->max_downscale) |
| 513 | return -EINVAL; |
| 514 | |
| 515 | /* |
| 516 | * If the sprite is completely covering the primary plane, |
| 517 | * we can disable the primary and save power. |
| 518 | */ |
| 519 | if ((crtc_x == 0) && (crtc_y == 0) && |
| 520 | (crtc_w == primary_w) && (crtc_h == primary_h)) |
| 521 | disable_primary = true; |
| 522 | |
| 523 | mutex_lock(&dev->struct_mutex); |
| 524 | |
Chris Wilson | 693db18 | 2013-03-05 14:52:39 +0000 | [diff] [blame] | 525 | /* Note that this will apply the VT-d workaround for scanouts, |
| 526 | * which is more restrictive than required for sprites. (The |
| 527 | * primary plane requires 256KiB alignment with 64 PTE padding, |
| 528 | * the sprite planes only require 128KiB alignment and 32 PTE padding. |
| 529 | */ |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 530 | ret = intel_pin_and_fence_fb_obj(dev, obj, NULL); |
Jesse Barnes | 00c2064b | 2012-01-13 15:48:39 -0800 | [diff] [blame] | 531 | if (ret) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 532 | goto out_unlock; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 533 | |
| 534 | intel_plane->obj = obj; |
| 535 | |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 536 | /* |
| 537 | * Be sure to re-enable the primary before the sprite is no longer |
| 538 | * covering it fully. |
| 539 | */ |
Chris Wilson | 93314b5 | 2012-06-13 17:36:55 +0100 | [diff] [blame] | 540 | if (!disable_primary) |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 541 | intel_enable_primary(crtc); |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 542 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 543 | intel_plane->update_plane(plane, fb, obj, crtc_x, crtc_y, |
| 544 | crtc_w, crtc_h, x, y, src_w, src_h); |
| 545 | |
Chris Wilson | 93314b5 | 2012-06-13 17:36:55 +0100 | [diff] [blame] | 546 | if (disable_primary) |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 547 | intel_disable_primary(crtc); |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 548 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 549 | /* Unpin old obj after new one is active to avoid ugliness */ |
| 550 | if (old_obj) { |
| 551 | /* |
| 552 | * It's fairly common to simply update the position of |
| 553 | * an existing object. In that case, we don't need to |
| 554 | * wait for vblank to avoid ugliness, we only need to |
| 555 | * do the pin & ref bookkeeping. |
| 556 | */ |
| 557 | if (old_obj != obj) { |
| 558 | mutex_unlock(&dev->struct_mutex); |
| 559 | intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe); |
| 560 | mutex_lock(&dev->struct_mutex); |
| 561 | } |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 562 | intel_unpin_fb_obj(old_obj); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 563 | } |
| 564 | |
| 565 | out_unlock: |
| 566 | mutex_unlock(&dev->struct_mutex); |
| 567 | out: |
| 568 | return ret; |
| 569 | } |
| 570 | |
| 571 | static int |
| 572 | intel_disable_plane(struct drm_plane *plane) |
| 573 | { |
| 574 | struct drm_device *dev = plane->dev; |
| 575 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 576 | int ret = 0; |
| 577 | |
Chris Wilson | 93314b5 | 2012-06-13 17:36:55 +0100 | [diff] [blame] | 578 | if (plane->crtc) |
Jesse Barnes | 175bd42 | 2011-12-13 13:19:39 -0800 | [diff] [blame] | 579 | intel_enable_primary(plane->crtc); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 580 | intel_plane->disable_plane(plane); |
| 581 | |
| 582 | if (!intel_plane->obj) |
| 583 | goto out; |
| 584 | |
Ville Syrjälä | c626d31 | 2013-03-27 17:49:13 +0200 | [diff] [blame] | 585 | intel_wait_for_vblank(dev, intel_plane->pipe); |
| 586 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 587 | mutex_lock(&dev->struct_mutex); |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 588 | intel_unpin_fb_obj(intel_plane->obj); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 589 | intel_plane->obj = NULL; |
| 590 | mutex_unlock(&dev->struct_mutex); |
| 591 | out: |
| 592 | |
| 593 | return ret; |
| 594 | } |
| 595 | |
| 596 | static void intel_destroy_plane(struct drm_plane *plane) |
| 597 | { |
| 598 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 599 | intel_disable_plane(plane); |
| 600 | drm_plane_cleanup(plane); |
| 601 | kfree(intel_plane); |
| 602 | } |
| 603 | |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 604 | int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
| 605 | struct drm_file *file_priv) |
| 606 | { |
| 607 | struct drm_intel_sprite_colorkey *set = data; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 608 | struct drm_mode_object *obj; |
| 609 | struct drm_plane *plane; |
| 610 | struct intel_plane *intel_plane; |
| 611 | int ret = 0; |
| 612 | |
Daniel Vetter | 1cff8f6 | 2012-04-24 09:55:08 +0200 | [diff] [blame] | 613 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) |
| 614 | return -ENODEV; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 615 | |
| 616 | /* Make sure we don't try to enable both src & dest simultaneously */ |
| 617 | if ((set->flags & (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE)) == (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE)) |
| 618 | return -EINVAL; |
| 619 | |
Daniel Vetter | a0e99e6 | 2012-12-02 01:05:46 +0100 | [diff] [blame] | 620 | drm_modeset_lock_all(dev); |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 621 | |
| 622 | obj = drm_mode_object_find(dev, set->plane_id, DRM_MODE_OBJECT_PLANE); |
| 623 | if (!obj) { |
| 624 | ret = -EINVAL; |
| 625 | goto out_unlock; |
| 626 | } |
| 627 | |
| 628 | plane = obj_to_plane(obj); |
| 629 | intel_plane = to_intel_plane(plane); |
| 630 | ret = intel_plane->update_colorkey(plane, set); |
| 631 | |
| 632 | out_unlock: |
Daniel Vetter | a0e99e6 | 2012-12-02 01:05:46 +0100 | [diff] [blame] | 633 | drm_modeset_unlock_all(dev); |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 634 | return ret; |
| 635 | } |
| 636 | |
| 637 | int intel_sprite_get_colorkey(struct drm_device *dev, void *data, |
| 638 | struct drm_file *file_priv) |
| 639 | { |
| 640 | struct drm_intel_sprite_colorkey *get = data; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 641 | struct drm_mode_object *obj; |
| 642 | struct drm_plane *plane; |
| 643 | struct intel_plane *intel_plane; |
| 644 | int ret = 0; |
| 645 | |
Daniel Vetter | 1cff8f6 | 2012-04-24 09:55:08 +0200 | [diff] [blame] | 646 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) |
| 647 | return -ENODEV; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 648 | |
Daniel Vetter | a0e99e6 | 2012-12-02 01:05:46 +0100 | [diff] [blame] | 649 | drm_modeset_lock_all(dev); |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 650 | |
| 651 | obj = drm_mode_object_find(dev, get->plane_id, DRM_MODE_OBJECT_PLANE); |
| 652 | if (!obj) { |
| 653 | ret = -EINVAL; |
| 654 | goto out_unlock; |
| 655 | } |
| 656 | |
| 657 | plane = obj_to_plane(obj); |
| 658 | intel_plane = to_intel_plane(plane); |
| 659 | intel_plane->get_colorkey(plane, get); |
| 660 | |
| 661 | out_unlock: |
Daniel Vetter | a0e99e6 | 2012-12-02 01:05:46 +0100 | [diff] [blame] | 662 | drm_modeset_unlock_all(dev); |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 663 | return ret; |
| 664 | } |
| 665 | |
Jesse Barnes | 5e1bac2 | 2013-03-26 09:25:43 -0700 | [diff] [blame] | 666 | void intel_plane_restore(struct drm_plane *plane) |
| 667 | { |
| 668 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 669 | |
| 670 | if (!plane->crtc || !plane->fb) |
| 671 | return; |
| 672 | |
| 673 | intel_update_plane(plane, plane->crtc, plane->fb, |
| 674 | intel_plane->crtc_x, intel_plane->crtc_y, |
| 675 | intel_plane->crtc_w, intel_plane->crtc_h, |
| 676 | intel_plane->src_x, intel_plane->src_y, |
| 677 | intel_plane->src_w, intel_plane->src_h); |
| 678 | } |
| 679 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 680 | static const struct drm_plane_funcs intel_plane_funcs = { |
| 681 | .update_plane = intel_update_plane, |
| 682 | .disable_plane = intel_disable_plane, |
| 683 | .destroy = intel_destroy_plane, |
| 684 | }; |
| 685 | |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 686 | static uint32_t ilk_plane_formats[] = { |
| 687 | DRM_FORMAT_XRGB8888, |
| 688 | DRM_FORMAT_YUYV, |
| 689 | DRM_FORMAT_YVYU, |
| 690 | DRM_FORMAT_UYVY, |
| 691 | DRM_FORMAT_VYUY, |
| 692 | }; |
| 693 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 694 | static uint32_t snb_plane_formats[] = { |
| 695 | DRM_FORMAT_XBGR8888, |
| 696 | DRM_FORMAT_XRGB8888, |
| 697 | DRM_FORMAT_YUYV, |
| 698 | DRM_FORMAT_YVYU, |
| 699 | DRM_FORMAT_UYVY, |
| 700 | DRM_FORMAT_VYUY, |
| 701 | }; |
| 702 | |
| 703 | int |
| 704 | intel_plane_init(struct drm_device *dev, enum pipe pipe) |
| 705 | { |
| 706 | struct intel_plane *intel_plane; |
| 707 | unsigned long possible_crtcs; |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 708 | const uint32_t *plane_formats; |
| 709 | int num_plane_formats; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 710 | int ret; |
| 711 | |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 712 | if (INTEL_INFO(dev)->gen < 5) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 713 | return -ENODEV; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 714 | |
| 715 | intel_plane = kzalloc(sizeof(struct intel_plane), GFP_KERNEL); |
| 716 | if (!intel_plane) |
| 717 | return -ENOMEM; |
| 718 | |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 719 | switch (INTEL_INFO(dev)->gen) { |
| 720 | case 5: |
| 721 | case 6: |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 722 | intel_plane->can_scale = true; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 723 | intel_plane->max_downscale = 16; |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 724 | intel_plane->update_plane = ilk_update_plane; |
| 725 | intel_plane->disable_plane = ilk_disable_plane; |
| 726 | intel_plane->update_colorkey = ilk_update_colorkey; |
| 727 | intel_plane->get_colorkey = ilk_get_colorkey; |
| 728 | |
| 729 | if (IS_GEN6(dev)) { |
| 730 | plane_formats = snb_plane_formats; |
| 731 | num_plane_formats = ARRAY_SIZE(snb_plane_formats); |
| 732 | } else { |
| 733 | plane_formats = ilk_plane_formats; |
| 734 | num_plane_formats = ARRAY_SIZE(ilk_plane_formats); |
| 735 | } |
| 736 | break; |
| 737 | |
| 738 | case 7: |
Damien Lespiau | 4d8d71b | 2012-10-25 18:06:19 +0100 | [diff] [blame] | 739 | if (IS_HASWELL(dev) || IS_VALLEYVIEW(dev)) |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 740 | intel_plane->can_scale = false; |
| 741 | else |
| 742 | intel_plane->can_scale = true; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 743 | intel_plane->max_downscale = 2; |
| 744 | intel_plane->update_plane = ivb_update_plane; |
| 745 | intel_plane->disable_plane = ivb_disable_plane; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 746 | intel_plane->update_colorkey = ivb_update_colorkey; |
| 747 | intel_plane->get_colorkey = ivb_get_colorkey; |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 748 | |
| 749 | plane_formats = snb_plane_formats; |
| 750 | num_plane_formats = ARRAY_SIZE(snb_plane_formats); |
| 751 | break; |
| 752 | |
| 753 | default: |
Jesper Juhl | a8b0bba | 2012-06-27 00:55:37 +0200 | [diff] [blame] | 754 | kfree(intel_plane); |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 755 | return -ENODEV; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 756 | } |
| 757 | |
| 758 | intel_plane->pipe = pipe; |
| 759 | possible_crtcs = (1 << pipe); |
| 760 | ret = drm_plane_init(dev, &intel_plane->base, possible_crtcs, |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 761 | &intel_plane_funcs, |
| 762 | plane_formats, num_plane_formats, |
| 763 | false); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 764 | if (ret) |
| 765 | kfree(intel_plane); |
| 766 | |
| 767 | return ret; |
| 768 | } |