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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050037#include <linux/pci.h>
38#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090039#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050040
41#include "libata.h"
42
Tejun Heoc4291372010-05-10 21:41:38 +020043static struct workqueue_struct *ata_sff_wq;
44
Tejun Heo624d5c52008-03-25 22:16:41 +090045const struct ata_port_operations ata_sff_port_ops = {
46 .inherits = &ata_base_port_ops,
47
Tejun Heof47451c2010-05-10 21:41:40 +020048 .qc_prep = ata_noop_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +090049 .qc_issue = ata_sff_qc_issue,
Tejun Heo4c9bf4e2008-04-07 22:47:20 +090050 .qc_fill_rtf = ata_sff_qc_fill_rtf,
Tejun Heo624d5c52008-03-25 22:16:41 +090051
Tejun Heo9363c382008-04-07 22:47:16 +090052 .freeze = ata_sff_freeze,
53 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090054 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090055 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090056 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090057 .postreset = ata_sff_postreset,
Tejun Heo9363c382008-04-07 22:47:16 +090058 .error_handler = ata_sff_error_handler,
Tejun Heo624d5c52008-03-25 22:16:41 +090059
Tejun Heo5682ed32008-04-07 22:47:16 +090060 .sff_dev_select = ata_sff_dev_select,
61 .sff_check_status = ata_sff_check_status,
62 .sff_tf_load = ata_sff_tf_load,
63 .sff_tf_read = ata_sff_tf_read,
64 .sff_exec_command = ata_sff_exec_command,
65 .sff_data_xfer = ata_sff_data_xfer,
Tejun Heo288623a2008-04-07 22:47:17 +090066 .sff_irq_clear = ata_sff_irq_clear,
Tejun Heo8244cd02010-05-10 21:41:36 +020067 .sff_drain_fifo = ata_sff_drain_fifo,
Tejun Heo624d5c52008-03-25 22:16:41 +090068
Alan Coxc96f1732009-03-24 10:23:46 +000069 .lost_interrupt = ata_sff_lost_interrupt,
Tejun Heo624d5c52008-03-25 22:16:41 +090070};
Alan Cox0fe40ff2009-01-05 14:16:13 +000071EXPORT_SYMBOL_GPL(ata_sff_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090072
Tejun Heo624d5c52008-03-25 22:16:41 +090073/**
Tejun Heo9363c382008-04-07 22:47:16 +090074 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +090075 * @ap: port where the device is
76 *
77 * Reads ATA taskfile status register for currently-selected device
78 * and return its value. This also clears pending interrupts
79 * from this device
80 *
81 * LOCKING:
82 * Inherited from caller.
83 */
Tejun Heo9363c382008-04-07 22:47:16 +090084u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +090085{
86 return ioread8(ap->ioaddr.status_addr);
87}
Alan Cox0fe40ff2009-01-05 14:16:13 +000088EXPORT_SYMBOL_GPL(ata_sff_check_status);
Tejun Heo272f7882008-03-25 22:16:40 +090089
90/**
Tejun Heo9363c382008-04-07 22:47:16 +090091 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +090092 * @ap: port where the device is
93 *
94 * Reads ATA taskfile alternate status register for
95 * currently-selected device and return its value.
96 *
97 * Note: may NOT be used as the check_altstatus() entry in
98 * ata_port_operations.
99 *
100 * LOCKING:
101 * Inherited from caller.
102 */
Alan Coxa57c1ba2008-05-29 22:10:58 +0100103static u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900104{
Tejun Heo5682ed32008-04-07 22:47:16 +0900105 if (ap->ops->sff_check_altstatus)
106 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900107
108 return ioread8(ap->ioaddr.altstatus_addr);
109}
110
111/**
Alan Coxa57c1ba2008-05-29 22:10:58 +0100112 * ata_sff_irq_status - Check if the device is busy
113 * @ap: port where the device is
114 *
115 * Determine if the port is currently busy. Uses altstatus
116 * if available in order to avoid clearing shared IRQ status
117 * when finding an IRQ source. Non ctl capable devices don't
118 * share interrupt lines fortunately for us.
119 *
120 * LOCKING:
121 * Inherited from caller.
122 */
123static u8 ata_sff_irq_status(struct ata_port *ap)
124{
125 u8 status;
126
127 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
128 status = ata_sff_altstatus(ap);
129 /* Not us: We are busy */
130 if (status & ATA_BUSY)
Alan Cox0fe40ff2009-01-05 14:16:13 +0000131 return status;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100132 }
133 /* Clear INTRQ latch */
Hugh Dickins6311c902008-06-05 14:44:39 +0100134 status = ap->ops->sff_check_status(ap);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100135 return status;
136}
137
138/**
139 * ata_sff_sync - Flush writes
140 * @ap: Port to wait for.
141 *
142 * CAUTION:
143 * If we have an mmio device with no ctl and no altstatus
144 * method this will fail. No such devices are known to exist.
145 *
146 * LOCKING:
147 * Inherited from caller.
148 */
149
150static void ata_sff_sync(struct ata_port *ap)
151{
152 if (ap->ops->sff_check_altstatus)
153 ap->ops->sff_check_altstatus(ap);
154 else if (ap->ioaddr.altstatus_addr)
155 ioread8(ap->ioaddr.altstatus_addr);
156}
157
158/**
159 * ata_sff_pause - Flush writes and wait 400nS
160 * @ap: Port to pause for.
161 *
162 * CAUTION:
163 * If we have an mmio device with no ctl and no altstatus
164 * method this will fail. No such devices are known to exist.
165 *
166 * LOCKING:
167 * Inherited from caller.
168 */
169
170void ata_sff_pause(struct ata_port *ap)
171{
172 ata_sff_sync(ap);
173 ndelay(400);
174}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000175EXPORT_SYMBOL_GPL(ata_sff_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100176
177/**
178 * ata_sff_dma_pause - Pause before commencing DMA
179 * @ap: Port to pause for.
180 *
181 * Perform I/O fencing and ensure sufficient cycle delays occur
182 * for the HDMA1:0 transition
183 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000184
Alan Coxa57c1ba2008-05-29 22:10:58 +0100185void ata_sff_dma_pause(struct ata_port *ap)
186{
187 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
188 /* An altstatus read will cause the needed delay without
189 messing up the IRQ status */
190 ata_sff_altstatus(ap);
191 return;
192 }
193 /* There are no DMA controllers without ctl. BUG here to ensure
194 we never violate the HDMA1:0 transition timing and risk
195 corruption. */
196 BUG();
197}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000198EXPORT_SYMBOL_GPL(ata_sff_dma_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100199
200/**
Tejun Heo9363c382008-04-07 22:47:16 +0900201 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900202 * @ap: port containing status register to be polled
Tejun Heo341c2c92008-05-20 02:17:51 +0900203 * @tmout_pat: impatience timeout in msecs
204 * @tmout: overall timeout in msecs
Tejun Heo624d5c52008-03-25 22:16:41 +0900205 *
206 * Sleep until ATA Status register bit BSY clears,
207 * or a timeout occurs.
208 *
209 * LOCKING:
210 * Kernel thread context (may sleep).
211 *
212 * RETURNS:
213 * 0 on success, -errno otherwise.
214 */
Tejun Heo9363c382008-04-07 22:47:16 +0900215int ata_sff_busy_sleep(struct ata_port *ap,
216 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900217{
218 unsigned long timer_start, timeout;
219 u8 status;
220
Tejun Heo9363c382008-04-07 22:47:16 +0900221 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900222 timer_start = jiffies;
Tejun Heo341c2c92008-05-20 02:17:51 +0900223 timeout = ata_deadline(timer_start, tmout_pat);
Tejun Heo624d5c52008-03-25 22:16:41 +0900224 while (status != 0xff && (status & ATA_BUSY) &&
225 time_before(jiffies, timeout)) {
226 msleep(50);
Tejun Heo9363c382008-04-07 22:47:16 +0900227 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900228 }
229
230 if (status != 0xff && (status & ATA_BUSY))
231 ata_port_printk(ap, KERN_WARNING,
232 "port is slow to respond, please be patient "
233 "(Status 0x%x)\n", status);
234
Tejun Heo341c2c92008-05-20 02:17:51 +0900235 timeout = ata_deadline(timer_start, tmout);
Tejun Heo624d5c52008-03-25 22:16:41 +0900236 while (status != 0xff && (status & ATA_BUSY) &&
237 time_before(jiffies, timeout)) {
238 msleep(50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900239 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900240 }
241
242 if (status == 0xff)
243 return -ENODEV;
244
245 if (status & ATA_BUSY) {
246 ata_port_printk(ap, KERN_ERR, "port failed to respond "
247 "(%lu secs, Status 0x%x)\n",
Tejun Heo341c2c92008-05-20 02:17:51 +0900248 DIV_ROUND_UP(tmout, 1000), status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900249 return -EBUSY;
250 }
251
252 return 0;
253}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000254EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900255
Tejun Heoaa2731a2008-04-07 22:47:19 +0900256static int ata_sff_check_ready(struct ata_link *link)
257{
258 u8 status = link->ap->ops->sff_check_status(link->ap);
259
Tejun Heo78ab88f2008-05-01 23:41:41 +0900260 return ata_check_ready(status);
Tejun Heoaa2731a2008-04-07 22:47:19 +0900261}
262
Tejun Heo624d5c52008-03-25 22:16:41 +0900263/**
Tejun Heo9363c382008-04-07 22:47:16 +0900264 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900265 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900266 * @deadline: deadline jiffies for the operation
267 *
268 * Sleep until ATA Status register bit BSY clears, or timeout
269 * occurs.
270 *
271 * LOCKING:
272 * Kernel thread context (may sleep).
273 *
274 * RETURNS:
275 * 0 on success, -errno otherwise.
276 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900277int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900278{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900279 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900280}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000281EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900282
283/**
Sergei Shtylyov41dec292010-05-07 22:47:50 +0400284 * ata_sff_set_devctl - Write device control reg
285 * @ap: port where the device is
286 * @ctl: value to write
287 *
288 * Writes ATA taskfile device control register.
289 *
290 * Note: may NOT be used as the sff_set_devctl() entry in
291 * ata_port_operations.
292 *
293 * LOCKING:
294 * Inherited from caller.
295 */
296static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
297{
298 if (ap->ops->sff_set_devctl)
299 ap->ops->sff_set_devctl(ap, ctl);
300 else
301 iowrite8(ctl, ap->ioaddr.ctl_addr);
302}
303
304/**
Tejun Heo9363c382008-04-07 22:47:16 +0900305 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900306 * @ap: ATA channel to manipulate
307 * @device: ATA device (numbered from zero) to select
308 *
309 * Use the method defined in the ATA specification to
310 * make either device 0, or device 1, active on the
311 * ATA channel. Works with both PIO and MMIO.
312 *
313 * May be used as the dev_select() entry in ata_port_operations.
314 *
315 * LOCKING:
316 * caller.
317 */
Tejun Heo9363c382008-04-07 22:47:16 +0900318void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900319{
320 u8 tmp;
321
322 if (device == 0)
323 tmp = ATA_DEVICE_OBS;
324 else
325 tmp = ATA_DEVICE_OBS | ATA_DEV1;
326
327 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900328 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900329}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000330EXPORT_SYMBOL_GPL(ata_sff_dev_select);
Tejun Heo624d5c52008-03-25 22:16:41 +0900331
332/**
333 * ata_dev_select - Select device 0/1 on ATA bus
334 * @ap: ATA channel to manipulate
335 * @device: ATA device (numbered from zero) to select
336 * @wait: non-zero to wait for Status register BSY bit to clear
337 * @can_sleep: non-zero if context allows sleeping
338 *
339 * Use the method defined in the ATA specification to
340 * make either device 0, or device 1, active on the
341 * ATA channel.
342 *
Tejun Heo9363c382008-04-07 22:47:16 +0900343 * This is a high-level version of ata_sff_dev_select(), which
344 * additionally provides the services of inserting the proper
345 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900346 *
347 * LOCKING:
348 * caller.
349 */
Tejun Heoc7a82092010-05-10 21:41:29 +0200350static void ata_dev_select(struct ata_port *ap, unsigned int device,
Tejun Heo624d5c52008-03-25 22:16:41 +0900351 unsigned int wait, unsigned int can_sleep)
352{
353 if (ata_msg_probe(ap))
354 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
355 "device %u, wait %u\n", device, wait);
356
357 if (wait)
358 ata_wait_idle(ap);
359
Tejun Heo5682ed32008-04-07 22:47:16 +0900360 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900361
362 if (wait) {
363 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
364 msleep(150);
365 ata_wait_idle(ap);
366 }
367}
368
369/**
Tejun Heo9363c382008-04-07 22:47:16 +0900370 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900371 * @ap: Port on which interrupts are enabled.
372 *
373 * Enable interrupts on a legacy IDE device using MMIO or PIO,
374 * wait for idle, clear any pending interrupts.
375 *
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400376 * Note: may NOT be used as the sff_irq_on() entry in
377 * ata_port_operations.
378 *
Tejun Heo90088bb2006-10-09 11:10:26 +0900379 * LOCKING:
380 * Inherited from caller.
381 */
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400382void ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900383{
384 struct ata_ioports *ioaddr = &ap->ioaddr;
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400385
386 if (ap->ops->sff_irq_on) {
387 ap->ops->sff_irq_on(ap);
388 return;
389 }
Tejun Heo90088bb2006-10-09 11:10:26 +0900390
391 ap->ctl &= ~ATA_NIEN;
392 ap->last_ctl = ap->ctl;
393
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400394 if (ap->ops->sff_set_devctl || ioaddr->ctl_addr)
395 ata_sff_set_devctl(ap, ap->ctl);
396 ata_wait_idle(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900397
Tejun Heo5682ed32008-04-07 22:47:16 +0900398 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900399}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000400EXPORT_SYMBOL_GPL(ata_sff_irq_on);
Tejun Heo90088bb2006-10-09 11:10:26 +0900401
402/**
Tejun Heo9363c382008-04-07 22:47:16 +0900403 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
Tejun Heo272f7882008-03-25 22:16:40 +0900404 * @ap: Port associated with this ATA transaction.
405 *
406 * Clear interrupt and error flags in DMA status register.
407 *
408 * May be used as the irq_clear() entry in ata_port_operations.
409 *
410 * LOCKING:
411 * spin_lock_irqsave(host lock)
412 */
Tejun Heo9363c382008-04-07 22:47:16 +0900413void ata_sff_irq_clear(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900414{
415 void __iomem *mmio = ap->ioaddr.bmdma_addr;
416
417 if (!mmio)
418 return;
419
420 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
421}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000422EXPORT_SYMBOL_GPL(ata_sff_irq_clear);
Tejun Heo272f7882008-03-25 22:16:40 +0900423
424/**
Tejun Heo9363c382008-04-07 22:47:16 +0900425 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500426 * @ap: Port to which output is sent
427 * @tf: ATA taskfile register set
428 *
429 * Outputs ATA taskfile to standard ATA host controller.
430 *
431 * LOCKING:
432 * Inherited from caller.
433 */
Tejun Heo9363c382008-04-07 22:47:16 +0900434void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500435{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900436 struct ata_ioports *ioaddr = &ap->ioaddr;
437 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
438
439 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900440 if (ioaddr->ctl_addr)
441 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900442 ap->last_ctl = tf->ctl;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900443 }
444
445 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900446 WARN_ON_ONCE(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900447 iowrite8(tf->hob_feature, ioaddr->feature_addr);
448 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
449 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
450 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
451 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
452 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
453 tf->hob_feature,
454 tf->hob_nsect,
455 tf->hob_lbal,
456 tf->hob_lbam,
457 tf->hob_lbah);
458 }
459
460 if (is_addr) {
461 iowrite8(tf->feature, ioaddr->feature_addr);
462 iowrite8(tf->nsect, ioaddr->nsect_addr);
463 iowrite8(tf->lbal, ioaddr->lbal_addr);
464 iowrite8(tf->lbam, ioaddr->lbam_addr);
465 iowrite8(tf->lbah, ioaddr->lbah_addr);
466 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
467 tf->feature,
468 tf->nsect,
469 tf->lbal,
470 tf->lbam,
471 tf->lbah);
472 }
473
474 if (tf->flags & ATA_TFLAG_DEVICE) {
475 iowrite8(tf->device, ioaddr->device_addr);
476 VPRINTK("device 0x%X\n", tf->device);
477 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500478}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000479EXPORT_SYMBOL_GPL(ata_sff_tf_load);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500480
481/**
Tejun Heo9363c382008-04-07 22:47:16 +0900482 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500483 * @ap: Port from which input is read
484 * @tf: ATA taskfile register set for storing input
485 *
486 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000487 * into @tf. Assumes the device has a fully SFF compliant task file
488 * layout and behaviour. If you device does not (eg has a different
489 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500490 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500491 * LOCKING:
492 * Inherited from caller.
493 */
Tejun Heo9363c382008-04-07 22:47:16 +0900494void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500495{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900496 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500497
Tejun Heo9363c382008-04-07 22:47:16 +0900498 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900499 tf->feature = ioread8(ioaddr->error_addr);
500 tf->nsect = ioread8(ioaddr->nsect_addr);
501 tf->lbal = ioread8(ioaddr->lbal_addr);
502 tf->lbam = ioread8(ioaddr->lbam_addr);
503 tf->lbah = ioread8(ioaddr->lbah_addr);
504 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500505
Tejun Heo0d5ff562007-02-01 15:06:36 +0900506 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900507 if (likely(ioaddr->ctl_addr)) {
508 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
509 tf->hob_feature = ioread8(ioaddr->error_addr);
510 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
511 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
512 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
513 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
514 iowrite8(tf->ctl, ioaddr->ctl_addr);
515 ap->last_ctl = tf->ctl;
516 } else
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900517 WARN_ON_ONCE(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900518 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500519}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000520EXPORT_SYMBOL_GPL(ata_sff_tf_read);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500521
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500522/**
Tejun Heo9363c382008-04-07 22:47:16 +0900523 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900524 * @ap: port to which command is being issued
525 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500526 *
Tejun Heo272f7882008-03-25 22:16:40 +0900527 * Issues ATA command, with proper synchronization with interrupt
528 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500529 *
530 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400531 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500532 */
Tejun Heo9363c382008-04-07 22:47:16 +0900533void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500534{
Tejun Heo272f7882008-03-25 22:16:40 +0900535 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500536
Tejun Heo272f7882008-03-25 22:16:40 +0900537 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900538 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500539}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000540EXPORT_SYMBOL_GPL(ata_sff_exec_command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500541
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900542/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900543 * ata_tf_to_host - issue ATA taskfile to host controller
544 * @ap: port to which command is being issued
545 * @tf: ATA taskfile register set
546 *
547 * Issues ATA taskfile register set to ATA host controller,
548 * with proper synchronization with interrupt handler and
549 * other threads.
550 *
551 * LOCKING:
552 * spin_lock_irqsave(host lock)
553 */
554static inline void ata_tf_to_host(struct ata_port *ap,
555 const struct ata_taskfile *tf)
556{
Tejun Heo5682ed32008-04-07 22:47:16 +0900557 ap->ops->sff_tf_load(ap, tf);
558 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900559}
560
561/**
Tejun Heo9363c382008-04-07 22:47:16 +0900562 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900563 * @dev: device to target
564 * @buf: data buffer
565 * @buflen: buffer length
566 * @rw: read/write
567 *
568 * Transfer data from/to the device data register by PIO.
569 *
570 * LOCKING:
571 * Inherited from caller.
572 *
573 * RETURNS:
574 * Bytes consumed.
575 */
Tejun Heo9363c382008-04-07 22:47:16 +0900576unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
577 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900578{
579 struct ata_port *ap = dev->link->ap;
580 void __iomem *data_addr = ap->ioaddr.data_addr;
581 unsigned int words = buflen >> 1;
582
583 /* Transfer multiple of 2 bytes */
584 if (rw == READ)
585 ioread16_rep(data_addr, buf, words);
586 else
587 iowrite16_rep(data_addr, buf, words);
588
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400589 /* Transfer trailing byte, if any. */
Tejun Heo624d5c52008-03-25 22:16:41 +0900590 if (unlikely(buflen & 0x01)) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400591 unsigned char pad[2];
Tejun Heo624d5c52008-03-25 22:16:41 +0900592
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400593 /* Point buf to the tail of buffer */
594 buf += buflen - 1;
595
596 /*
597 * Use io*16_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100598 * swapping bytes to and from on the big endian machines...
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400599 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900600 if (rw == READ) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400601 ioread16_rep(data_addr, pad, 1);
602 *buf = pad[0];
Tejun Heo624d5c52008-03-25 22:16:41 +0900603 } else {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400604 pad[0] = *buf;
605 iowrite16_rep(data_addr, pad, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +0900606 }
607 words++;
608 }
609
610 return words << 1;
611}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000612EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
Tejun Heo624d5c52008-03-25 22:16:41 +0900613
614/**
Alan Cox871af122009-01-05 14:16:39 +0000615 * ata_sff_data_xfer32 - Transfer data by PIO
616 * @dev: device to target
617 * @buf: data buffer
618 * @buflen: buffer length
619 * @rw: read/write
620 *
621 * Transfer data from/to the device data register by PIO using 32bit
622 * I/O operations.
623 *
624 * LOCKING:
625 * Inherited from caller.
626 *
627 * RETURNS:
628 * Bytes consumed.
629 */
630
631unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
632 unsigned int buflen, int rw)
633{
634 struct ata_port *ap = dev->link->ap;
635 void __iomem *data_addr = ap->ioaddr.data_addr;
636 unsigned int words = buflen >> 2;
637 int slop = buflen & 3;
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100638
Alan Coxe3cf95d2009-04-09 17:31:17 +0100639 if (!(ap->pflags & ATA_PFLAG_PIO32))
640 return ata_sff_data_xfer(dev, buf, buflen, rw);
Alan Cox871af122009-01-05 14:16:39 +0000641
642 /* Transfer multiple of 4 bytes */
643 if (rw == READ)
644 ioread32_rep(data_addr, buf, words);
645 else
646 iowrite32_rep(data_addr, buf, words);
647
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400648 /* Transfer trailing bytes, if any */
Alan Cox871af122009-01-05 14:16:39 +0000649 if (unlikely(slop)) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400650 unsigned char pad[4];
651
652 /* Point buf to the tail of buffer */
653 buf += buflen - slop;
654
655 /*
656 * Use io*_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100657 * swapping bytes to and from on the big endian machines...
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400658 */
Alan Cox871af122009-01-05 14:16:39 +0000659 if (rw == READ) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400660 if (slop < 3)
661 ioread16_rep(data_addr, pad, 1);
662 else
663 ioread32_rep(data_addr, pad, 1);
664 memcpy(buf, pad, slop);
Alan Cox871af122009-01-05 14:16:39 +0000665 } else {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400666 memcpy(pad, buf, slop);
667 if (slop < 3)
668 iowrite16_rep(data_addr, pad, 1);
669 else
670 iowrite32_rep(data_addr, pad, 1);
Alan Cox871af122009-01-05 14:16:39 +0000671 }
Alan Cox871af122009-01-05 14:16:39 +0000672 }
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400673 return (buflen + 1) & ~1;
Alan Cox871af122009-01-05 14:16:39 +0000674}
675EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
676
677/**
Tejun Heo9363c382008-04-07 22:47:16 +0900678 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900679 * @dev: device to target
680 * @buf: data buffer
681 * @buflen: buffer length
682 * @rw: read/write
683 *
684 * Transfer data from/to the device data register by PIO. Do the
685 * transfer with interrupts disabled.
686 *
687 * LOCKING:
688 * Inherited from caller.
689 *
690 * RETURNS:
691 * Bytes consumed.
692 */
Tejun Heo9363c382008-04-07 22:47:16 +0900693unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
694 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900695{
696 unsigned long flags;
697 unsigned int consumed;
698
699 local_irq_save(flags);
Tejun Heo9363c382008-04-07 22:47:16 +0900700 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900701 local_irq_restore(flags);
702
703 return consumed;
704}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000705EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
Tejun Heo624d5c52008-03-25 22:16:41 +0900706
707/**
708 * ata_pio_sector - Transfer a sector of data.
709 * @qc: Command on going
710 *
711 * Transfer qc->sect_size bytes of data from/to the ATA device.
712 *
713 * LOCKING:
714 * Inherited from caller.
715 */
716static void ata_pio_sector(struct ata_queued_cmd *qc)
717{
718 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
719 struct ata_port *ap = qc->ap;
720 struct page *page;
721 unsigned int offset;
722 unsigned char *buf;
723
724 if (qc->curbytes == qc->nbytes - qc->sect_size)
725 ap->hsm_task_state = HSM_ST_LAST;
726
727 page = sg_page(qc->cursg);
728 offset = qc->cursg->offset + qc->cursg_ofs;
729
730 /* get the current page and offset */
731 page = nth_page(page, (offset >> PAGE_SHIFT));
732 offset %= PAGE_SIZE;
733
734 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
735
736 if (PageHighMem(page)) {
737 unsigned long flags;
738
739 /* FIXME: use a bounce buffer */
740 local_irq_save(flags);
741 buf = kmap_atomic(page, KM_IRQ0);
742
743 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900744 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
745 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900746
747 kunmap_atomic(buf, KM_IRQ0);
748 local_irq_restore(flags);
749 } else {
750 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900751 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
752 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900753 }
754
Sebastian Andrzej Siewior3842e832010-03-21 22:52:23 +0100755 if (!do_write && !PageSlab(page))
Catalin Marinas2d68b7f2010-02-04 01:04:50 -0500756 flush_dcache_page(page);
757
Tejun Heo624d5c52008-03-25 22:16:41 +0900758 qc->curbytes += qc->sect_size;
759 qc->cursg_ofs += qc->sect_size;
760
761 if (qc->cursg_ofs == qc->cursg->length) {
762 qc->cursg = sg_next(qc->cursg);
763 qc->cursg_ofs = 0;
764 }
765}
766
767/**
768 * ata_pio_sectors - Transfer one or many sectors.
769 * @qc: Command on going
770 *
771 * Transfer one or many sectors of data from/to the
772 * ATA device for the DRQ request.
773 *
774 * LOCKING:
775 * Inherited from caller.
776 */
777static void ata_pio_sectors(struct ata_queued_cmd *qc)
778{
779 if (is_multi_taskfile(&qc->tf)) {
780 /* READ/WRITE MULTIPLE */
781 unsigned int nsect;
782
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900783 WARN_ON_ONCE(qc->dev->multi_count == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +0900784
785 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
786 qc->dev->multi_count);
787 while (nsect--)
788 ata_pio_sector(qc);
789 } else
790 ata_pio_sector(qc);
791
Alan Coxa57c1ba2008-05-29 22:10:58 +0100792 ata_sff_sync(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900793}
794
795/**
796 * atapi_send_cdb - Write CDB bytes to hardware
797 * @ap: Port to which ATAPI device is attached.
798 * @qc: Taskfile currently active
799 *
800 * When device has indicated its readiness to accept
801 * a CDB, this function is called. Send the CDB.
802 *
803 * LOCKING:
804 * caller.
805 */
806static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
807{
808 /* send SCSI cdb */
809 DPRINTK("send cdb\n");
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900810 WARN_ON_ONCE(qc->dev->cdb_len < 12);
Tejun Heo624d5c52008-03-25 22:16:41 +0900811
Tejun Heo5682ed32008-04-07 22:47:16 +0900812 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100813 ata_sff_sync(ap);
814 /* FIXME: If the CDB is for DMA do we need to do the transition delay
815 or is bmdma_start guaranteed to do it ? */
Tejun Heo624d5c52008-03-25 22:16:41 +0900816 switch (qc->tf.protocol) {
817 case ATAPI_PROT_PIO:
818 ap->hsm_task_state = HSM_ST;
819 break;
820 case ATAPI_PROT_NODATA:
821 ap->hsm_task_state = HSM_ST_LAST;
822 break;
823 case ATAPI_PROT_DMA:
824 ap->hsm_task_state = HSM_ST_LAST;
825 /* initiate bmdma */
826 ap->ops->bmdma_start(qc);
827 break;
828 }
829}
830
831/**
832 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
833 * @qc: Command on going
834 * @bytes: number of bytes
835 *
836 * Transfer Transfer data from/to the ATAPI device.
837 *
838 * LOCKING:
839 * Inherited from caller.
840 *
841 */
842static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
843{
844 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
845 struct ata_port *ap = qc->ap;
846 struct ata_device *dev = qc->dev;
847 struct ata_eh_info *ehi = &dev->link->eh_info;
848 struct scatterlist *sg;
849 struct page *page;
850 unsigned char *buf;
851 unsigned int offset, count, consumed;
852
853next_sg:
854 sg = qc->cursg;
855 if (unlikely(!sg)) {
856 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
857 "buf=%u cur=%u bytes=%u",
858 qc->nbytes, qc->curbytes, bytes);
859 return -1;
860 }
861
862 page = sg_page(sg);
863 offset = sg->offset + qc->cursg_ofs;
864
865 /* get the current page and offset */
866 page = nth_page(page, (offset >> PAGE_SHIFT));
867 offset %= PAGE_SIZE;
868
869 /* don't overrun current sg */
870 count = min(sg->length - qc->cursg_ofs, bytes);
871
872 /* don't cross page boundaries */
873 count = min(count, (unsigned int)PAGE_SIZE - offset);
874
875 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
876
877 if (PageHighMem(page)) {
878 unsigned long flags;
879
880 /* FIXME: use bounce buffer */
881 local_irq_save(flags);
882 buf = kmap_atomic(page, KM_IRQ0);
883
884 /* do the actual data transfer */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000885 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
886 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900887
888 kunmap_atomic(buf, KM_IRQ0);
889 local_irq_restore(flags);
890 } else {
891 buf = page_address(page);
Alan Cox0fe40ff2009-01-05 14:16:13 +0000892 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
893 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900894 }
895
896 bytes -= min(bytes, consumed);
897 qc->curbytes += count;
898 qc->cursg_ofs += count;
899
900 if (qc->cursg_ofs == sg->length) {
901 qc->cursg = sg_next(qc->cursg);
902 qc->cursg_ofs = 0;
903 }
904
Christian Borntraegera0f79f72009-01-13 10:38:36 +0100905 /*
906 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
907 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
908 * check correctly as it doesn't know if it is the last request being
909 * made. Somebody should implement a proper sanity check.
910 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900911 if (bytes)
912 goto next_sg;
913 return 0;
914}
915
916/**
917 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
918 * @qc: Command on going
919 *
920 * Transfer Transfer data from/to the ATAPI device.
921 *
922 * LOCKING:
923 * Inherited from caller.
924 */
925static void atapi_pio_bytes(struct ata_queued_cmd *qc)
926{
927 struct ata_port *ap = qc->ap;
928 struct ata_device *dev = qc->dev;
929 struct ata_eh_info *ehi = &dev->link->eh_info;
930 unsigned int ireason, bc_lo, bc_hi, bytes;
931 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
932
933 /* Abuse qc->result_tf for temp storage of intermediate TF
934 * here to save some kernel stack usage.
935 * For normal completion, qc->result_tf is not relevant. For
936 * error, qc->result_tf is later overwritten by ata_qc_complete().
937 * So, the correctness of qc->result_tf is not affected.
938 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900939 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900940 ireason = qc->result_tf.nsect;
941 bc_lo = qc->result_tf.lbam;
942 bc_hi = qc->result_tf.lbah;
943 bytes = (bc_hi << 8) | bc_lo;
944
945 /* shall be cleared to zero, indicating xfer of data */
946 if (unlikely(ireason & (1 << 0)))
947 goto atapi_check;
948
949 /* make sure transfer direction matches expected */
950 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
951 if (unlikely(do_write != i_write))
952 goto atapi_check;
953
954 if (unlikely(!bytes))
955 goto atapi_check;
956
957 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
958
959 if (unlikely(__atapi_pio_bytes(qc, bytes)))
960 goto err_out;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100961 ata_sff_sync(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900962
963 return;
964
965 atapi_check:
966 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
967 ireason, bytes);
968 err_out:
969 qc->err_mask |= AC_ERR_HSM;
970 ap->hsm_task_state = HSM_ST_ERR;
971}
972
973/**
974 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
975 * @ap: the target ata_port
976 * @qc: qc on going
977 *
978 * RETURNS:
979 * 1 if ok in workqueue, 0 otherwise.
980 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000981static inline int ata_hsm_ok_in_wq(struct ata_port *ap,
982 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900983{
984 if (qc->tf.flags & ATA_TFLAG_POLLING)
985 return 1;
986
987 if (ap->hsm_task_state == HSM_ST_FIRST) {
988 if (qc->tf.protocol == ATA_PROT_PIO &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000989 (qc->tf.flags & ATA_TFLAG_WRITE))
Tejun Heo624d5c52008-03-25 22:16:41 +0900990 return 1;
991
992 if (ata_is_atapi(qc->tf.protocol) &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000993 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heo624d5c52008-03-25 22:16:41 +0900994 return 1;
995 }
996
997 return 0;
998}
999
1000/**
1001 * ata_hsm_qc_complete - finish a qc running on standard HSM
1002 * @qc: Command to complete
1003 * @in_wq: 1 if called from workqueue, 0 otherwise
1004 *
1005 * Finish @qc which is running on standard HSM.
1006 *
1007 * LOCKING:
1008 * If @in_wq is zero, spin_lock_irqsave(host lock).
1009 * Otherwise, none on entry and grabs host lock.
1010 */
1011static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
1012{
1013 struct ata_port *ap = qc->ap;
1014 unsigned long flags;
1015
1016 if (ap->ops->error_handler) {
1017 if (in_wq) {
1018 spin_lock_irqsave(ap->lock, flags);
1019
1020 /* EH might have kicked in while host lock is
1021 * released.
1022 */
1023 qc = ata_qc_from_tag(ap, qc->tag);
1024 if (qc) {
1025 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001026 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001027 ata_qc_complete(qc);
1028 } else
1029 ata_port_freeze(ap);
1030 }
1031
1032 spin_unlock_irqrestore(ap->lock, flags);
1033 } else {
1034 if (likely(!(qc->err_mask & AC_ERR_HSM)))
1035 ata_qc_complete(qc);
1036 else
1037 ata_port_freeze(ap);
1038 }
1039 } else {
1040 if (in_wq) {
1041 spin_lock_irqsave(ap->lock, flags);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001042 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001043 ata_qc_complete(qc);
1044 spin_unlock_irqrestore(ap->lock, flags);
1045 } else
1046 ata_qc_complete(qc);
1047 }
1048}
1049
1050/**
Tejun Heo9363c382008-04-07 22:47:16 +09001051 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001052 * @ap: the target ata_port
1053 * @qc: qc on going
1054 * @status: current device status
1055 * @in_wq: 1 if called from workqueue, 0 otherwise
1056 *
1057 * RETURNS:
1058 * 1 when poll next status needed, 0 otherwise.
1059 */
Tejun Heo9363c382008-04-07 22:47:16 +09001060int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1061 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001062{
Tejun Heoa836d3e2008-06-28 01:39:43 +09001063 struct ata_eh_info *ehi = &ap->link.eh_info;
Tejun Heo624d5c52008-03-25 22:16:41 +09001064 unsigned long flags = 0;
1065 int poll_next;
1066
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001067 WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001068
Tejun Heo9363c382008-04-07 22:47:16 +09001069 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001070 * like DMA polling into the workqueue. Notice that
1071 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1072 */
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001073 WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
Tejun Heo624d5c52008-03-25 22:16:41 +09001074
1075fsm_start:
1076 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1077 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1078
1079 switch (ap->hsm_task_state) {
1080 case HSM_ST_FIRST:
1081 /* Send first data block or PACKET CDB */
1082
1083 /* If polling, we will stay in the work queue after
1084 * sending the data. Otherwise, interrupt handler
1085 * takes over after sending the data.
1086 */
1087 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1088
1089 /* check device status */
1090 if (unlikely((status & ATA_DRQ) == 0)) {
1091 /* handle BSY=0, DRQ=0 as error */
1092 if (likely(status & (ATA_ERR | ATA_DF)))
1093 /* device stops HSM for abort/error */
1094 qc->err_mask |= AC_ERR_DEV;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001095 else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001096 /* HSM violation. Let EH handle this */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001097 ata_ehi_push_desc(ehi,
1098 "ST_FIRST: !(DRQ|ERR|DF)");
Tejun Heo624d5c52008-03-25 22:16:41 +09001099 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001100 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001101
1102 ap->hsm_task_state = HSM_ST_ERR;
1103 goto fsm_start;
1104 }
1105
1106 /* Device should not ask for data transfer (DRQ=1)
1107 * when it finds something wrong.
1108 * We ignore DRQ here and stop the HSM by
1109 * changing hsm_task_state to HSM_ST_ERR and
1110 * let the EH abort the command or reset the device.
1111 */
1112 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1113 /* Some ATAPI tape drives forget to clear the ERR bit
1114 * when doing the next command (mostly request sense).
1115 * We ignore ERR here to workaround and proceed sending
1116 * the CDB.
1117 */
1118 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001119 ata_ehi_push_desc(ehi, "ST_FIRST: "
1120 "DRQ=1 with device error, "
1121 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001122 qc->err_mask |= AC_ERR_HSM;
1123 ap->hsm_task_state = HSM_ST_ERR;
1124 goto fsm_start;
1125 }
1126 }
1127
1128 /* Send the CDB (atapi) or the first data block (ata pio out).
1129 * During the state transition, interrupt handler shouldn't
1130 * be invoked before the data transfer is complete and
1131 * hsm_task_state is changed. Hence, the following locking.
1132 */
1133 if (in_wq)
1134 spin_lock_irqsave(ap->lock, flags);
1135
1136 if (qc->tf.protocol == ATA_PROT_PIO) {
1137 /* PIO data out protocol.
1138 * send first data block.
1139 */
1140
1141 /* ata_pio_sectors() might change the state
1142 * to HSM_ST_LAST. so, the state is changed here
1143 * before ata_pio_sectors().
1144 */
1145 ap->hsm_task_state = HSM_ST;
1146 ata_pio_sectors(qc);
1147 } else
1148 /* send CDB */
1149 atapi_send_cdb(ap, qc);
1150
1151 if (in_wq)
1152 spin_unlock_irqrestore(ap->lock, flags);
1153
Tejun Heoc4291372010-05-10 21:41:38 +02001154 /* if polling, ata_sff_pio_task() handles the rest.
Tejun Heo624d5c52008-03-25 22:16:41 +09001155 * otherwise, interrupt handler takes over from here.
1156 */
1157 break;
1158
1159 case HSM_ST:
1160 /* complete command or read/write the data register */
1161 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1162 /* ATAPI PIO protocol */
1163 if ((status & ATA_DRQ) == 0) {
1164 /* No more data to transfer or device error.
1165 * Device error will be tagged in HSM_ST_LAST.
1166 */
1167 ap->hsm_task_state = HSM_ST_LAST;
1168 goto fsm_start;
1169 }
1170
1171 /* Device should not ask for data transfer (DRQ=1)
1172 * when it finds something wrong.
1173 * We ignore DRQ here and stop the HSM by
1174 * changing hsm_task_state to HSM_ST_ERR and
1175 * let the EH abort the command or reset the device.
1176 */
1177 if (unlikely(status & (ATA_ERR | ATA_DF))) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001178 ata_ehi_push_desc(ehi, "ST-ATAPI: "
1179 "DRQ=1 with device error, "
1180 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001181 qc->err_mask |= AC_ERR_HSM;
1182 ap->hsm_task_state = HSM_ST_ERR;
1183 goto fsm_start;
1184 }
1185
1186 atapi_pio_bytes(qc);
1187
1188 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1189 /* bad ireason reported by device */
1190 goto fsm_start;
1191
1192 } else {
1193 /* ATA PIO protocol */
1194 if (unlikely((status & ATA_DRQ) == 0)) {
1195 /* handle BSY=0, DRQ=0 as error */
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001196 if (likely(status & (ATA_ERR | ATA_DF))) {
Tejun Heo624d5c52008-03-25 22:16:41 +09001197 /* device stops HSM for abort/error */
1198 qc->err_mask |= AC_ERR_DEV;
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001199
1200 /* If diagnostic failed and this is
1201 * IDENTIFY, it's likely a phantom
1202 * device. Mark hint.
1203 */
1204 if (qc->dev->horkage &
1205 ATA_HORKAGE_DIAGNOSTIC)
1206 qc->err_mask |=
1207 AC_ERR_NODEV_HINT;
1208 } else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001209 /* HSM violation. Let EH handle this.
1210 * Phantom devices also trigger this
1211 * condition. Mark hint.
1212 */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001213 ata_ehi_push_desc(ehi, "ST-ATA: "
Tejun Heo80ee6f52009-01-23 14:12:59 +09001214 "DRQ=0 without device error, "
Tejun Heoa836d3e2008-06-28 01:39:43 +09001215 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001216 qc->err_mask |= AC_ERR_HSM |
1217 AC_ERR_NODEV_HINT;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001218 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001219
1220 ap->hsm_task_state = HSM_ST_ERR;
1221 goto fsm_start;
1222 }
1223
1224 /* For PIO reads, some devices may ask for
1225 * data transfer (DRQ=1) alone with ERR=1.
1226 * We respect DRQ here and transfer one
1227 * block of junk data before changing the
1228 * hsm_task_state to HSM_ST_ERR.
1229 *
1230 * For PIO writes, ERR=1 DRQ=1 doesn't make
1231 * sense since the data block has been
1232 * transferred to the device.
1233 */
1234 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1235 /* data might be corrputed */
1236 qc->err_mask |= AC_ERR_DEV;
1237
1238 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1239 ata_pio_sectors(qc);
1240 status = ata_wait_idle(ap);
1241 }
1242
Tejun Heoa836d3e2008-06-28 01:39:43 +09001243 if (status & (ATA_BUSY | ATA_DRQ)) {
1244 ata_ehi_push_desc(ehi, "ST-ATA: "
1245 "BUSY|DRQ persists on ERR|DF, "
1246 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001247 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001248 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001249
Tejun Heob9199302009-01-25 10:26:00 +09001250 /* There are oddball controllers with
1251 * status register stuck at 0x7f and
1252 * lbal/m/h at zero which makes it
1253 * pass all other presence detection
1254 * mechanisms we have. Set NODEV_HINT
1255 * for it. Kernel bz#7241.
1256 */
1257 if (status == 0x7f)
1258 qc->err_mask |= AC_ERR_NODEV_HINT;
1259
Tejun Heo624d5c52008-03-25 22:16:41 +09001260 /* ata_pio_sectors() might change the
1261 * state to HSM_ST_LAST. so, the state
1262 * is changed after ata_pio_sectors().
1263 */
1264 ap->hsm_task_state = HSM_ST_ERR;
1265 goto fsm_start;
1266 }
1267
1268 ata_pio_sectors(qc);
1269
1270 if (ap->hsm_task_state == HSM_ST_LAST &&
1271 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1272 /* all data read */
1273 status = ata_wait_idle(ap);
1274 goto fsm_start;
1275 }
1276 }
1277
1278 poll_next = 1;
1279 break;
1280
1281 case HSM_ST_LAST:
1282 if (unlikely(!ata_ok(status))) {
1283 qc->err_mask |= __ac_err_mask(status);
1284 ap->hsm_task_state = HSM_ST_ERR;
1285 goto fsm_start;
1286 }
1287
1288 /* no more data to transfer */
1289 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1290 ap->print_id, qc->dev->devno, status);
1291
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001292 WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
Tejun Heo624d5c52008-03-25 22:16:41 +09001293
1294 ap->hsm_task_state = HSM_ST_IDLE;
1295
1296 /* complete taskfile transaction */
1297 ata_hsm_qc_complete(qc, in_wq);
1298
1299 poll_next = 0;
1300 break;
1301
1302 case HSM_ST_ERR:
Tejun Heo624d5c52008-03-25 22:16:41 +09001303 ap->hsm_task_state = HSM_ST_IDLE;
1304
1305 /* complete taskfile transaction */
1306 ata_hsm_qc_complete(qc, in_wq);
1307
1308 poll_next = 0;
1309 break;
1310 default:
1311 poll_next = 0;
1312 BUG();
1313 }
1314
1315 return poll_next;
1316}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001317EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
Tejun Heo624d5c52008-03-25 22:16:41 +09001318
Tejun Heoc4291372010-05-10 21:41:38 +02001319void ata_sff_queue_pio_task(struct ata_port *ap, unsigned long delay)
1320{
1321 /* may fail if ata_sff_flush_pio_task() in progress */
1322 queue_delayed_work(ata_sff_wq, &ap->sff_pio_task,
1323 msecs_to_jiffies(delay));
1324}
1325EXPORT_SYMBOL_GPL(ata_sff_queue_pio_task);
1326
1327void ata_sff_flush_pio_task(struct ata_port *ap)
1328{
1329 DPRINTK("ENTER\n");
1330
1331 cancel_rearming_delayed_work(&ap->sff_pio_task);
1332 ap->hsm_task_state = HSM_ST_IDLE;
1333
1334 if (ata_msg_ctl(ap))
1335 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __func__);
1336}
1337
1338static void ata_sff_pio_task(struct work_struct *work)
Tejun Heo624d5c52008-03-25 22:16:41 +09001339{
1340 struct ata_port *ap =
Tejun Heoc4291372010-05-10 21:41:38 +02001341 container_of(work, struct ata_port, sff_pio_task.work);
1342 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001343 u8 status;
1344 int poll_next;
1345
Tejun Heoc4291372010-05-10 21:41:38 +02001346 /* qc can be NULL if timeout occurred */
1347 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1348 if (!qc)
1349 return;
1350
Tejun Heo624d5c52008-03-25 22:16:41 +09001351fsm_start:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001352 WARN_ON_ONCE(ap->hsm_task_state == HSM_ST_IDLE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001353
1354 /*
1355 * This is purely heuristic. This is a fast path.
1356 * Sometimes when we enter, BSY will be cleared in
1357 * a chk-status or two. If not, the drive is probably seeking
1358 * or something. Snooze for a couple msecs, then
1359 * chk-status again. If still busy, queue delayed work.
1360 */
Tejun Heo9363c382008-04-07 22:47:16 +09001361 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001362 if (status & ATA_BUSY) {
1363 msleep(2);
Tejun Heo9363c382008-04-07 22:47:16 +09001364 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001365 if (status & ATA_BUSY) {
Tejun Heoc4291372010-05-10 21:41:38 +02001366 ata_sff_queue_pio_task(ap, ATA_SHORT_PAUSE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001367 return;
1368 }
1369 }
1370
1371 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001372 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001373
1374 /* another command or interrupt handler
1375 * may be running at this point.
1376 */
1377 if (poll_next)
1378 goto fsm_start;
1379}
1380
1381/**
Tejun Heo360ff782010-05-10 21:41:42 +02001382 * ata_sff_qc_issue - issue taskfile to a SFF controller
Tejun Heo624d5c52008-03-25 22:16:41 +09001383 * @qc: command to issue to device
1384 *
Tejun Heo360ff782010-05-10 21:41:42 +02001385 * This function issues a PIO or NODATA command to a SFF
1386 * controller.
Tejun Heo624d5c52008-03-25 22:16:41 +09001387 *
1388 * LOCKING:
1389 * spin_lock_irqsave(host lock)
1390 *
1391 * RETURNS:
1392 * Zero on success, AC_ERR_* mask on failure
1393 */
Tejun Heo9363c382008-04-07 22:47:16 +09001394unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001395{
1396 struct ata_port *ap = qc->ap;
1397
1398 /* Use polling pio if the LLD doesn't handle
1399 * interrupt driven pio and atapi CDB interrupt.
1400 */
Tejun Heo360ff782010-05-10 21:41:42 +02001401 if (ap->flags & ATA_FLAG_PIO_POLLING)
1402 qc->tf.flags |= ATA_TFLAG_POLLING;
Tejun Heo624d5c52008-03-25 22:16:41 +09001403
1404 /* select the device */
1405 ata_dev_select(ap, qc->dev->devno, 1, 0);
1406
1407 /* start the command */
1408 switch (qc->tf.protocol) {
1409 case ATA_PROT_NODATA:
1410 if (qc->tf.flags & ATA_TFLAG_POLLING)
1411 ata_qc_set_polling(qc);
1412
1413 ata_tf_to_host(ap, &qc->tf);
1414 ap->hsm_task_state = HSM_ST_LAST;
1415
1416 if (qc->tf.flags & ATA_TFLAG_POLLING)
Tejun Heoc4291372010-05-10 21:41:38 +02001417 ata_sff_queue_pio_task(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001418
1419 break;
1420
Tejun Heo624d5c52008-03-25 22:16:41 +09001421 case ATA_PROT_PIO:
1422 if (qc->tf.flags & ATA_TFLAG_POLLING)
1423 ata_qc_set_polling(qc);
1424
1425 ata_tf_to_host(ap, &qc->tf);
1426
1427 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1428 /* PIO data out protocol */
1429 ap->hsm_task_state = HSM_ST_FIRST;
Tejun Heoc4291372010-05-10 21:41:38 +02001430 ata_sff_queue_pio_task(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001431
Tejun Heoc4291372010-05-10 21:41:38 +02001432 /* always send first data block using the
1433 * ata_sff_pio_task() codepath.
Tejun Heo624d5c52008-03-25 22:16:41 +09001434 */
1435 } else {
1436 /* PIO data in protocol */
1437 ap->hsm_task_state = HSM_ST;
1438
1439 if (qc->tf.flags & ATA_TFLAG_POLLING)
Tejun Heoc4291372010-05-10 21:41:38 +02001440 ata_sff_queue_pio_task(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001441
Tejun Heoc4291372010-05-10 21:41:38 +02001442 /* if polling, ata_sff_pio_task() handles the
1443 * rest. otherwise, interrupt handler takes
1444 * over from here.
Tejun Heo624d5c52008-03-25 22:16:41 +09001445 */
1446 }
1447
1448 break;
1449
1450 case ATAPI_PROT_PIO:
1451 case ATAPI_PROT_NODATA:
1452 if (qc->tf.flags & ATA_TFLAG_POLLING)
1453 ata_qc_set_polling(qc);
1454
1455 ata_tf_to_host(ap, &qc->tf);
1456
1457 ap->hsm_task_state = HSM_ST_FIRST;
1458
1459 /* send cdb by polling if no cdb interrupt */
1460 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1461 (qc->tf.flags & ATA_TFLAG_POLLING))
Tejun Heoc4291372010-05-10 21:41:38 +02001462 ata_sff_queue_pio_task(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001463 break;
1464
Tejun Heo624d5c52008-03-25 22:16:41 +09001465 default:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001466 WARN_ON_ONCE(1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001467 return AC_ERR_SYSTEM;
1468 }
1469
1470 return 0;
1471}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001472EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
Tejun Heo624d5c52008-03-25 22:16:41 +09001473
1474/**
Tejun Heo22183bf2008-04-07 22:47:20 +09001475 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1476 * @qc: qc to fill result TF for
1477 *
1478 * @qc is finished and result TF needs to be filled. Fill it
1479 * using ->sff_tf_read.
1480 *
1481 * LOCKING:
1482 * spin_lock_irqsave(host lock)
1483 *
1484 * RETURNS:
1485 * true indicating that result TF is successfully filled.
1486 */
1487bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1488{
1489 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1490 return true;
1491}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001492EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
Tejun Heo22183bf2008-04-07 22:47:20 +09001493
1494/**
Tejun Heo9363c382008-04-07 22:47:16 +09001495 * ata_sff_host_intr - Handle host interrupt for given (port, task)
Tejun Heo624d5c52008-03-25 22:16:41 +09001496 * @ap: Port on which interrupt arrived (possibly...)
1497 * @qc: Taskfile currently active in engine
1498 *
1499 * Handle host interrupt for given queued command. Currently,
1500 * only DMA interrupts are handled. All other commands are
1501 * handled via polling with interrupts disabled (nIEN bit).
1502 *
1503 * LOCKING:
1504 * spin_lock_irqsave(host lock)
1505 *
1506 * RETURNS:
1507 * One if interrupt was handled, zero if not (shared irq).
1508 */
Alan Coxc96f1732009-03-24 10:23:46 +00001509unsigned int ata_sff_host_intr(struct ata_port *ap,
Tejun Heo9363c382008-04-07 22:47:16 +09001510 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001511{
1512 struct ata_eh_info *ehi = &ap->link.eh_info;
1513 u8 status, host_stat = 0;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001514 bool bmdma_stopped = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001515
1516 VPRINTK("ata%u: protocol %d task_state %d\n",
1517 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1518
1519 /* Check whether we are expecting interrupt in this state */
1520 switch (ap->hsm_task_state) {
1521 case HSM_ST_FIRST:
1522 /* Some pre-ATAPI-4 devices assert INTRQ
1523 * at this state when ready to receive CDB.
1524 */
1525
1526 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1527 * The flag was turned on only for atapi devices. No
1528 * need to check ata_is_atapi(qc->tf.protocol) again.
1529 */
1530 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1531 goto idle_irq;
1532 break;
1533 case HSM_ST_LAST:
1534 if (qc->tf.protocol == ATA_PROT_DMA ||
1535 qc->tf.protocol == ATAPI_PROT_DMA) {
1536 /* check status of DMA engine */
1537 host_stat = ap->ops->bmdma_status(ap);
1538 VPRINTK("ata%u: host_stat 0x%X\n",
1539 ap->print_id, host_stat);
1540
1541 /* if it's not our irq... */
1542 if (!(host_stat & ATA_DMA_INTR))
1543 goto idle_irq;
1544
1545 /* before we do anything else, clear DMA-Start bit */
1546 ap->ops->bmdma_stop(qc);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001547 bmdma_stopped = true;
Tejun Heo624d5c52008-03-25 22:16:41 +09001548
1549 if (unlikely(host_stat & ATA_DMA_ERR)) {
1550 /* error when transfering data to/from memory */
1551 qc->err_mask |= AC_ERR_HOST_BUS;
1552 ap->hsm_task_state = HSM_ST_ERR;
1553 }
1554 }
1555 break;
1556 case HSM_ST:
1557 break;
1558 default:
1559 goto idle_irq;
1560 }
1561
Tejun Heo624d5c52008-03-25 22:16:41 +09001562
Alan Coxa57c1ba2008-05-29 22:10:58 +01001563 /* check main status, clearing INTRQ if needed */
1564 status = ata_sff_irq_status(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001565 if (status & ATA_BUSY) {
1566 if (bmdma_stopped) {
1567 /* BMDMA engine is already stopped, we're screwed */
1568 qc->err_mask |= AC_ERR_HSM;
1569 ap->hsm_task_state = HSM_ST_ERR;
1570 } else
1571 goto idle_irq;
1572 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001573
Tejun Heo9f2f7212010-05-10 21:41:32 +02001574 /* clear irq events */
Tejun Heo5682ed32008-04-07 22:47:16 +09001575 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001576
Tejun Heo9363c382008-04-07 22:47:16 +09001577 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001578
1579 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
1580 qc->tf.protocol == ATAPI_PROT_DMA))
1581 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
1582
1583 return 1; /* irq handled */
1584
1585idle_irq:
1586 ap->stats.idle_irq++;
1587
1588#ifdef ATA_IRQ_TRAP
1589 if ((ap->stats.idle_irq % 1000) == 0) {
Tejun Heo5682ed32008-04-07 22:47:16 +09001590 ap->ops->sff_check_status(ap);
1591 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001592 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
1593 return 1;
1594 }
1595#endif
1596 return 0; /* irq not handled */
1597}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001598EXPORT_SYMBOL_GPL(ata_sff_host_intr);
Tejun Heo624d5c52008-03-25 22:16:41 +09001599
1600/**
Tejun Heo9363c382008-04-07 22:47:16 +09001601 * ata_sff_interrupt - Default ATA host interrupt handler
Tejun Heo624d5c52008-03-25 22:16:41 +09001602 * @irq: irq line (unused)
1603 * @dev_instance: pointer to our ata_host information structure
1604 *
1605 * Default interrupt handler for PCI IDE devices. Calls
Tejun Heo9363c382008-04-07 22:47:16 +09001606 * ata_sff_host_intr() for each port that is not disabled.
Tejun Heo624d5c52008-03-25 22:16:41 +09001607 *
1608 * LOCKING:
1609 * Obtains host lock during operation.
1610 *
1611 * RETURNS:
1612 * IRQ_NONE or IRQ_HANDLED.
1613 */
Tejun Heo9363c382008-04-07 22:47:16 +09001614irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
Tejun Heo624d5c52008-03-25 22:16:41 +09001615{
1616 struct ata_host *host = dev_instance;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001617 bool retried = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001618 unsigned int i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001619 unsigned int handled, idle, polling;
Tejun Heo624d5c52008-03-25 22:16:41 +09001620 unsigned long flags;
1621
1622 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1623 spin_lock_irqsave(&host->lock, flags);
1624
Tejun Heo332ac7f2010-03-23 12:24:08 +09001625retry:
1626 handled = idle = polling = 0;
Tejun Heo624d5c52008-03-25 22:16:41 +09001627 for (i = 0; i < host->n_ports; i++) {
Tejun Heod88ec2e2010-01-19 10:46:32 +09001628 struct ata_port *ap = host->ports[i];
1629 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001630
Tejun Heod88ec2e2010-01-19 10:46:32 +09001631 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo27943622010-01-19 10:49:19 +09001632 if (qc) {
1633 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
1634 handled |= ata_sff_host_intr(ap, qc);
1635 else
1636 polling |= 1 << i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001637 } else
1638 idle |= 1 << i;
Tejun Heo27943622010-01-19 10:49:19 +09001639 }
1640
1641 /*
1642 * If no port was expecting IRQ but the controller is actually
1643 * asserting IRQ line, nobody cared will ensue. Check IRQ
1644 * pending status if available and clear spurious IRQ.
1645 */
Tejun Heo332ac7f2010-03-23 12:24:08 +09001646 if (!handled && !retried) {
1647 bool retry = false;
1648
Tejun Heo27943622010-01-19 10:49:19 +09001649 for (i = 0; i < host->n_ports; i++) {
1650 struct ata_port *ap = host->ports[i];
1651
1652 if (polling & (1 << i))
1653 continue;
1654
1655 if (!ap->ops->sff_irq_check ||
1656 !ap->ops->sff_irq_check(ap))
1657 continue;
1658
Tejun Heo332ac7f2010-03-23 12:24:08 +09001659 if (idle & (1 << i)) {
1660 ap->ops->sff_check_status(ap);
1661 ap->ops->sff_irq_clear(ap);
1662 } else {
1663 /* clear INTRQ and check if BUSY cleared */
1664 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1665 retry |= true;
1666 /*
1667 * With command in flight, we can't do
1668 * sff_irq_clear() w/o racing with completion.
1669 */
1670 }
1671 }
1672
1673 if (retry) {
1674 retried = true;
1675 goto retry;
Tejun Heo27943622010-01-19 10:49:19 +09001676 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001677 }
1678
1679 spin_unlock_irqrestore(&host->lock, flags);
1680
1681 return IRQ_RETVAL(handled);
1682}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001683EXPORT_SYMBOL_GPL(ata_sff_interrupt);
Tejun Heo624d5c52008-03-25 22:16:41 +09001684
1685/**
Alan Coxc96f1732009-03-24 10:23:46 +00001686 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1687 * @ap: port that appears to have timed out
1688 *
1689 * Called from the libata error handlers when the core code suspects
1690 * an interrupt has been lost. If it has complete anything we can and
1691 * then return. Interface must support altstatus for this faster
1692 * recovery to occur.
1693 *
1694 * Locking:
1695 * Caller holds host lock
1696 */
1697
1698void ata_sff_lost_interrupt(struct ata_port *ap)
1699{
1700 u8 status;
1701 struct ata_queued_cmd *qc;
1702
1703 /* Only one outstanding command per SFF channel */
1704 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo3e4ec342010-05-10 21:41:30 +02001705 /* We cannot lose an interrupt on a non-existent or polled command */
1706 if (!qc || qc->tf.flags & ATA_TFLAG_POLLING)
Alan Coxc96f1732009-03-24 10:23:46 +00001707 return;
1708 /* See if the controller thinks it is still busy - if so the command
1709 isn't a lost IRQ but is still in progress */
1710 status = ata_sff_altstatus(ap);
1711 if (status & ATA_BUSY)
1712 return;
1713
1714 /* There was a command running, we are no longer busy and we have
1715 no interrupt. */
1716 ata_port_printk(ap, KERN_WARNING, "lost interrupt (Status 0x%x)\n",
1717 status);
1718 /* Run the host interrupt logic as if the interrupt had not been
1719 lost */
1720 ata_sff_host_intr(ap, qc);
1721}
1722EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1723
1724/**
Tejun Heo9363c382008-04-07 22:47:16 +09001725 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001726 * @ap: port to freeze
1727 *
Tejun Heo9f2f7212010-05-10 21:41:32 +02001728 * Freeze SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001729 *
1730 * LOCKING:
1731 * Inherited from caller.
1732 */
Tejun Heo9363c382008-04-07 22:47:16 +09001733void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001734{
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001735 ap->ctl |= ATA_NIEN;
1736 ap->last_ctl = ap->ctl;
1737
Sergei Shtylyov41dec292010-05-07 22:47:50 +04001738 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr)
1739 ata_sff_set_devctl(ap, ap->ctl);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001740
1741 /* Under certain circumstances, some controllers raise IRQ on
1742 * ATA_NIEN manipulation. Also, many controllers fail to mask
1743 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1744 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001745 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001746
Tejun Heo5682ed32008-04-07 22:47:16 +09001747 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001748}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001749EXPORT_SYMBOL_GPL(ata_sff_freeze);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001750
1751/**
Tejun Heo9363c382008-04-07 22:47:16 +09001752 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001753 * @ap: port to thaw
1754 *
Tejun Heo9363c382008-04-07 22:47:16 +09001755 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001756 *
1757 * LOCKING:
1758 * Inherited from caller.
1759 */
Tejun Heo9363c382008-04-07 22:47:16 +09001760void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001761{
1762 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001763 ap->ops->sff_check_status(ap);
1764 ap->ops->sff_irq_clear(ap);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001765 ata_sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001766}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001767EXPORT_SYMBOL_GPL(ata_sff_thaw);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001768
1769/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001770 * ata_sff_prereset - prepare SFF link for reset
1771 * @link: SFF link to be reset
1772 * @deadline: deadline jiffies for the operation
1773 *
1774 * SFF link @link is about to be reset. Initialize it. It first
1775 * calls ata_std_prereset() and wait for !BSY if the port is
1776 * being softreset.
1777 *
1778 * LOCKING:
1779 * Kernel thread context (may sleep)
1780 *
1781 * RETURNS:
1782 * 0 on success, -errno otherwise.
1783 */
1784int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1785{
Tejun Heo0aa11132008-04-07 22:47:18 +09001786 struct ata_eh_context *ehc = &link->eh_context;
1787 int rc;
1788
1789 rc = ata_std_prereset(link, deadline);
1790 if (rc)
1791 return rc;
1792
1793 /* if we're about to do hardreset, nothing more to do */
1794 if (ehc->i.action & ATA_EH_HARDRESET)
1795 return 0;
1796
1797 /* wait for !BSY if we don't know that no device is attached */
1798 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001799 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001800 if (rc && rc != -ENODEV) {
1801 ata_link_printk(link, KERN_WARNING, "device not ready "
1802 "(errno=%d), forcing hardreset\n", rc);
1803 ehc->i.action |= ATA_EH_HARDRESET;
1804 }
1805 }
1806
1807 return 0;
1808}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001809EXPORT_SYMBOL_GPL(ata_sff_prereset);
Tejun Heo0aa11132008-04-07 22:47:18 +09001810
1811/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001812 * ata_devchk - PATA device presence detection
1813 * @ap: ATA channel to examine
1814 * @device: Device to examine (starting at zero)
1815 *
1816 * This technique was originally described in
1817 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1818 * later found its way into the ATA/ATAPI spec.
1819 *
1820 * Write a pattern to the ATA shadow registers,
1821 * and if a device is present, it will respond by
1822 * correctly storing and echoing back the
1823 * ATA shadow register contents.
1824 *
1825 * LOCKING:
1826 * caller.
1827 */
1828static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1829{
1830 struct ata_ioports *ioaddr = &ap->ioaddr;
1831 u8 nsect, lbal;
1832
Tejun Heo5682ed32008-04-07 22:47:16 +09001833 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09001834
1835 iowrite8(0x55, ioaddr->nsect_addr);
1836 iowrite8(0xaa, ioaddr->lbal_addr);
1837
1838 iowrite8(0xaa, ioaddr->nsect_addr);
1839 iowrite8(0x55, ioaddr->lbal_addr);
1840
1841 iowrite8(0x55, ioaddr->nsect_addr);
1842 iowrite8(0xaa, ioaddr->lbal_addr);
1843
1844 nsect = ioread8(ioaddr->nsect_addr);
1845 lbal = ioread8(ioaddr->lbal_addr);
1846
1847 if ((nsect == 0x55) && (lbal == 0xaa))
1848 return 1; /* we found a device */
1849
1850 return 0; /* nothing found */
1851}
1852
1853/**
Tejun Heo9363c382008-04-07 22:47:16 +09001854 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09001855 * @dev: ATA device to classify (starting at zero)
1856 * @present: device seems present
1857 * @r_err: Value of error register on completion
1858 *
1859 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1860 * an ATA/ATAPI-defined set of values is placed in the ATA
1861 * shadow registers, indicating the results of device detection
1862 * and diagnostics.
1863 *
1864 * Select the ATA device, and read the values from the ATA shadow
1865 * registers. Then parse according to the Error register value,
1866 * and the spec-defined values examined by ata_dev_classify().
1867 *
1868 * LOCKING:
1869 * caller.
1870 *
1871 * RETURNS:
1872 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1873 */
Tejun Heo9363c382008-04-07 22:47:16 +09001874unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09001875 u8 *r_err)
1876{
1877 struct ata_port *ap = dev->link->ap;
1878 struct ata_taskfile tf;
1879 unsigned int class;
1880 u8 err;
1881
Tejun Heo5682ed32008-04-07 22:47:16 +09001882 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09001883
1884 memset(&tf, 0, sizeof(tf));
1885
Tejun Heo5682ed32008-04-07 22:47:16 +09001886 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001887 err = tf.feature;
1888 if (r_err)
1889 *r_err = err;
1890
1891 /* see if device passed diags: continue and warn later */
1892 if (err == 0)
1893 /* diagnostic fail : do nothing _YET_ */
1894 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1895 else if (err == 1)
1896 /* do nothing */ ;
1897 else if ((dev->devno == 0) && (err == 0x81))
1898 /* do nothing */ ;
1899 else
1900 return ATA_DEV_NONE;
1901
1902 /* determine if device is ATA or ATAPI */
1903 class = ata_dev_classify(&tf);
1904
1905 if (class == ATA_DEV_UNKNOWN) {
1906 /* If the device failed diagnostic, it's likely to
1907 * have reported incorrect device signature too.
1908 * Assume ATA device if the device seems present but
1909 * device signature is invalid with diagnostic
1910 * failure.
1911 */
1912 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1913 class = ATA_DEV_ATA;
1914 else
1915 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09001916 } else if ((class == ATA_DEV_ATA) &&
1917 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09001918 class = ATA_DEV_NONE;
1919
1920 return class;
1921}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001922EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
Tejun Heo624d5c52008-03-25 22:16:41 +09001923
Tejun Heo705e76b2008-04-07 22:47:19 +09001924/**
1925 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1926 * @link: SFF link which is just reset
1927 * @devmask: mask of present devices
1928 * @deadline: deadline jiffies for the operation
1929 *
1930 * Wait devices attached to SFF @link to become ready after
1931 * reset. It contains preceding 150ms wait to avoid accessing TF
1932 * status register too early.
1933 *
1934 * LOCKING:
1935 * Kernel thread context (may sleep).
1936 *
1937 * RETURNS:
1938 * 0 on success, -ENODEV if some or all of devices in @devmask
1939 * don't seem to exist. -errno on other errors.
1940 */
1941int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1942 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09001943{
Tejun Heo705e76b2008-04-07 22:47:19 +09001944 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001945 struct ata_ioports *ioaddr = &ap->ioaddr;
1946 unsigned int dev0 = devmask & (1 << 0);
1947 unsigned int dev1 = devmask & (1 << 1);
1948 int rc, ret = 0;
1949
Tejun Heo341c2c92008-05-20 02:17:51 +09001950 msleep(ATA_WAIT_AFTER_RESET);
Tejun Heo705e76b2008-04-07 22:47:19 +09001951
1952 /* always check readiness of the master device */
1953 rc = ata_sff_wait_ready(link, deadline);
1954 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1955 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09001956 */
Tejun Heo705e76b2008-04-07 22:47:19 +09001957 if (rc)
1958 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001959
1960 /* if device 1 was found in ata_devchk, wait for register
1961 * access briefly, then wait for BSY to clear.
1962 */
1963 if (dev1) {
1964 int i;
1965
Tejun Heo5682ed32008-04-07 22:47:16 +09001966 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001967
1968 /* Wait for register access. Some ATAPI devices fail
1969 * to set nsect/lbal after reset, so don't waste too
1970 * much time on it. We're gonna wait for !BSY anyway.
1971 */
1972 for (i = 0; i < 2; i++) {
1973 u8 nsect, lbal;
1974
1975 nsect = ioread8(ioaddr->nsect_addr);
1976 lbal = ioread8(ioaddr->lbal_addr);
1977 if ((nsect == 1) && (lbal == 1))
1978 break;
1979 msleep(50); /* give drive a breather */
1980 }
1981
Tejun Heo705e76b2008-04-07 22:47:19 +09001982 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001983 if (rc) {
1984 if (rc != -ENODEV)
1985 return rc;
1986 ret = rc;
1987 }
1988 }
1989
1990 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09001991 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001992 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09001993 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001994 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09001995 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001996
1997 return ret;
1998}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001999EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002000
Tejun Heo624d5c52008-03-25 22:16:41 +09002001static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
2002 unsigned long deadline)
2003{
2004 struct ata_ioports *ioaddr = &ap->ioaddr;
2005
2006 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2007
2008 /* software reset. causes dev0 to be selected */
2009 iowrite8(ap->ctl, ioaddr->ctl_addr);
2010 udelay(20); /* FIXME: flush */
2011 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2012 udelay(20); /* FIXME: flush */
2013 iowrite8(ap->ctl, ioaddr->ctl_addr);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002014 ap->last_ctl = ap->ctl;
Tejun Heo624d5c52008-03-25 22:16:41 +09002015
Tejun Heo705e76b2008-04-07 22:47:19 +09002016 /* wait the port to become ready */
2017 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002018}
2019
2020/**
Tejun Heo9363c382008-04-07 22:47:16 +09002021 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09002022 * @link: ATA link to reset
2023 * @classes: resulting classes of attached devices
2024 * @deadline: deadline jiffies for the operation
2025 *
2026 * Reset host port using ATA SRST.
2027 *
2028 * LOCKING:
2029 * Kernel thread context (may sleep)
2030 *
2031 * RETURNS:
2032 * 0 on success, -errno otherwise.
2033 */
Tejun Heo9363c382008-04-07 22:47:16 +09002034int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09002035 unsigned long deadline)
2036{
2037 struct ata_port *ap = link->ap;
2038 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2039 unsigned int devmask = 0;
2040 int rc;
2041 u8 err;
2042
2043 DPRINTK("ENTER\n");
2044
Tejun Heo624d5c52008-03-25 22:16:41 +09002045 /* determine if device 0/1 are present */
2046 if (ata_devchk(ap, 0))
2047 devmask |= (1 << 0);
2048 if (slave_possible && ata_devchk(ap, 1))
2049 devmask |= (1 << 1);
2050
2051 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002052 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002053
2054 /* issue bus reset */
2055 DPRINTK("about to softreset, devmask=%x\n", devmask);
2056 rc = ata_bus_softreset(ap, devmask, deadline);
2057 /* if link is occupied, -ENODEV too is an error */
2058 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
2059 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
2060 return rc;
2061 }
2062
2063 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09002064 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09002065 devmask & (1 << 0), &err);
2066 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09002067 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09002068 devmask & (1 << 1), &err);
2069
Tejun Heo624d5c52008-03-25 22:16:41 +09002070 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2071 return 0;
2072}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002073EXPORT_SYMBOL_GPL(ata_sff_softreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002074
2075/**
Tejun Heo9363c382008-04-07 22:47:16 +09002076 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09002077 * @link: link to reset
2078 * @class: resulting class of attached device
2079 * @deadline: deadline jiffies for the operation
2080 *
2081 * SATA phy-reset host port using DET bits of SControl register,
2082 * wait for !BSY and classify the attached device.
2083 *
2084 * LOCKING:
2085 * Kernel thread context (may sleep)
2086 *
2087 * RETURNS:
2088 * 0 on success, -errno otherwise.
2089 */
Tejun Heo9363c382008-04-07 22:47:16 +09002090int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09002091 unsigned long deadline)
2092{
Tejun Heo9dadd452008-04-07 22:47:19 +09002093 struct ata_eh_context *ehc = &link->eh_context;
2094 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2095 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09002096 int rc;
2097
Tejun Heo9dadd452008-04-07 22:47:19 +09002098 rc = sata_link_hardreset(link, timing, deadline, &online,
2099 ata_sff_check_ready);
Tejun Heo9dadd452008-04-07 22:47:19 +09002100 if (online)
2101 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09002102
2103 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09002104 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002105}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002106EXPORT_SYMBOL_GPL(sata_sff_hardreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002107
2108/**
Tejun Heo203c75b2008-04-07 22:47:18 +09002109 * ata_sff_postreset - SFF postreset callback
2110 * @link: the target SFF ata_link
2111 * @classes: classes of attached devices
2112 *
2113 * This function is invoked after a successful reset. It first
2114 * calls ata_std_postreset() and performs SFF specific postreset
2115 * processing.
2116 *
2117 * LOCKING:
2118 * Kernel thread context (may sleep)
2119 */
2120void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2121{
2122 struct ata_port *ap = link->ap;
2123
2124 ata_std_postreset(link, classes);
2125
2126 /* is double-select really necessary? */
2127 if (classes[0] != ATA_DEV_NONE)
2128 ap->ops->sff_dev_select(ap, 1);
2129 if (classes[1] != ATA_DEV_NONE)
2130 ap->ops->sff_dev_select(ap, 0);
2131
2132 /* bail out if no device is present */
2133 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2134 DPRINTK("EXIT, no device\n");
2135 return;
2136 }
2137
2138 /* set up device control */
Sergei Shtylyov41dec292010-05-07 22:47:50 +04002139 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
2140 ata_sff_set_devctl(ap, ap->ctl);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002141 ap->last_ctl = ap->ctl;
2142 }
Tejun Heo203c75b2008-04-07 22:47:18 +09002143}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002144EXPORT_SYMBOL_GPL(ata_sff_postreset);
Tejun Heo203c75b2008-04-07 22:47:18 +09002145
2146/**
Alan Cox3d47aa82009-03-24 10:23:19 +00002147 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2148 * @qc: command
2149 *
2150 * Drain the FIFO and device of any stuck data following a command
Daniel Mack3ad2f3f2010-02-03 08:01:28 +08002151 * failing to complete. In some cases this is necessary before a
Alan Cox3d47aa82009-03-24 10:23:19 +00002152 * reset will recover the device.
2153 *
2154 */
2155
2156void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2157{
2158 int count;
2159 struct ata_port *ap;
2160
2161 /* We only need to flush incoming data when a command was running */
2162 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2163 return;
2164
2165 ap = qc->ap;
2166 /* Drain up to 64K of data before we give up this recovery method */
2167 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
Robert Hancock9a8fd682009-12-08 20:48:10 -06002168 && count < 65536; count += 2)
Alan Cox3d47aa82009-03-24 10:23:19 +00002169 ioread16(ap->ioaddr.data_addr);
2170
2171 /* Can become DEBUG later */
2172 if (count)
2173 ata_port_printk(ap, KERN_DEBUG,
2174 "drained %d bytes to clear DRQ.\n", count);
2175
2176}
2177EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2178
2179/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002180 * ata_sff_error_handler - Stock error handler for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002181 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002182 *
Tejun Heo9363c382008-04-07 22:47:16 +09002183 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002184 * PATA and SATA controllers. Many controllers should be able to
2185 * use this EH as-is or with some added handling before and
2186 * after.
2187 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002188 * LOCKING:
2189 * Kernel thread context (may sleep)
2190 */
Tejun Heo9363c382008-04-07 22:47:16 +09002191void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002192{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002193 ata_reset_fn_t softreset = ap->ops->softreset;
2194 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002195 struct ata_queued_cmd *qc;
2196 unsigned long flags;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002197
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002198 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002199 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2200 qc = NULL;
2201
Jeff Garzikba6a1302006-06-22 23:46:10 -04002202 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002203
Tejun Heofe06e5f2010-05-10 21:41:39 +02002204 /*
2205 * We *MUST* do FIFO draining before we issue a reset as
2206 * several devices helpfully clear their internal state and
2207 * will lock solid if we touch the data port post reset. Pass
2208 * qc in case anyone wants to do different PIO/DMA recovery or
2209 * has per command fixups
Alan Cox3d47aa82009-03-24 10:23:19 +00002210 */
Tejun Heo8244cd02010-05-10 21:41:36 +02002211 if (ap->ops->sff_drain_fifo)
2212 ap->ops->sff_drain_fifo(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002213
Jeff Garzikba6a1302006-06-22 23:46:10 -04002214 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002215
Tejun Heofe06e5f2010-05-10 21:41:39 +02002216 /* ignore ata_sff_softreset if ctl isn't accessible */
Tejun Heo9363c382008-04-07 22:47:16 +09002217 if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr)
Tejun Heoa1efdab2008-03-25 12:22:50 +09002218 softreset = NULL;
Tejun Heofe06e5f2010-05-10 21:41:39 +02002219
2220 /* ignore built-in hardresets if SCR access is not available */
2221 if ((hardreset == sata_std_hardreset ||
2222 hardreset == sata_sff_hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002223 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002224
Tejun Heoa1efdab2008-03-25 12:22:50 +09002225 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2226 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002227}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002228EXPORT_SYMBOL_GPL(ata_sff_error_handler);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002229
2230/**
Tejun Heo9363c382008-04-07 22:47:16 +09002231 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002232 * @ioaddr: IO address structure to be initialized
2233 *
2234 * Utility function which initializes data_addr, error_addr,
2235 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2236 * device_addr, status_addr, and command_addr to standard offsets
2237 * relative to cmd_addr.
2238 *
2239 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2240 */
Tejun Heo9363c382008-04-07 22:47:16 +09002241void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002242{
2243 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2244 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2245 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2246 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2247 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2248 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2249 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2250 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2251 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2252 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2253}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002254EXPORT_SYMBOL_GPL(ata_sff_std_ports);
Tejun Heo624d5c52008-03-25 22:16:41 +09002255
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002256#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002257
Tejun Heo272f7882008-03-25 22:16:40 +09002258static int ata_resources_present(struct pci_dev *pdev, int port)
2259{
2260 int i;
2261
2262 /* Check the PCI resources for this channel are enabled */
2263 port = port * 2;
Alan Cox0fe40ff2009-01-05 14:16:13 +00002264 for (i = 0; i < 2; i++) {
Tejun Heo272f7882008-03-25 22:16:40 +09002265 if (pci_resource_start(pdev, port + i) == 0 ||
2266 pci_resource_len(pdev, port + i) == 0)
2267 return 0;
2268 }
2269 return 1;
2270}
2271
Tejun Heod491b272007-04-17 23:44:07 +09002272/**
Tejun Heo9363c382008-04-07 22:47:16 +09002273 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002274 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002275 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002276 * Acquire native PCI ATA resources for @host and initialize the
2277 * first two ports of @host accordingly. Ports marked dummy are
2278 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002279 *
Tejun Heod583bc12007-07-04 18:02:07 +09002280 * Note that native PCI resources are valid even for legacy hosts
2281 * as we fix up pdev resources array early in boot, so this
2282 * function can be used for both native and legacy SFF hosts.
2283 *
Tejun Heod491b272007-04-17 23:44:07 +09002284 * LOCKING:
2285 * Inherited from calling layer (may sleep).
2286 *
2287 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002288 * 0 if at least one port is initialized, -ENODEV if no port is
2289 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002290 */
Tejun Heo9363c382008-04-07 22:47:16 +09002291int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002292{
2293 struct device *gdev = host->dev;
2294 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002295 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002296 int i, rc;
2297
Tejun Heod491b272007-04-17 23:44:07 +09002298 /* request, iomap BARs and init port addresses accordingly */
2299 for (i = 0; i < 2; i++) {
2300 struct ata_port *ap = host->ports[i];
2301 int base = i * 2;
2302 void __iomem * const *iomap;
2303
Tejun Heo1626aeb2007-05-04 12:43:58 +02002304 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002305 continue;
2306
Tejun Heo1626aeb2007-05-04 12:43:58 +02002307 /* Discard disabled ports. Some controllers show
2308 * their unused channels this way. Disabled ports are
2309 * made dummy.
2310 */
2311 if (!ata_resources_present(pdev, i)) {
2312 ap->ops = &ata_dummy_port_ops;
2313 continue;
2314 }
2315
Tejun Heo35a10a82008-01-04 18:42:21 +09002316 rc = pcim_iomap_regions(pdev, 0x3 << base,
2317 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002318 if (rc) {
Tejun Heo1626aeb2007-05-04 12:43:58 +02002319 dev_printk(KERN_WARNING, gdev,
2320 "failed to request/iomap BARs for port %d "
2321 "(errno=%d)\n", i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002322 if (rc == -EBUSY)
2323 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002324 ap->ops = &ata_dummy_port_ops;
2325 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002326 }
2327 host->iomap = iomap = pcim_iomap_table(pdev);
2328
2329 ap->ioaddr.cmd_addr = iomap[base];
2330 ap->ioaddr.altstatus_addr =
2331 ap->ioaddr.ctl_addr = (void __iomem *)
2332 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002333 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002334
Tejun Heocbcdd872007-08-18 13:14:55 +09002335 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2336 (unsigned long long)pci_resource_start(pdev, base),
2337 (unsigned long long)pci_resource_start(pdev, base + 1));
2338
Tejun Heo1626aeb2007-05-04 12:43:58 +02002339 mask |= 1 << i;
2340 }
2341
2342 if (!mask) {
2343 dev_printk(KERN_ERR, gdev, "no available native port\n");
2344 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002345 }
2346
2347 return 0;
2348}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002349EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
Tejun Heod491b272007-04-17 23:44:07 +09002350
Tejun Heo21b0ad42007-04-17 23:44:07 +09002351/**
Tejun Heo9363c382008-04-07 22:47:16 +09002352 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002353 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002354 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002355 * @r_host: out argument for the initialized ATA host
2356 *
2357 * Helper to allocate ATA host for @pdev, acquire all native PCI
2358 * resources and initialize it accordingly in one go.
2359 *
2360 * LOCKING:
2361 * Inherited from calling layer (may sleep).
2362 *
2363 * RETURNS:
2364 * 0 on success, -errno otherwise.
2365 */
Tejun Heo9363c382008-04-07 22:47:16 +09002366int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Alan Cox0fe40ff2009-01-05 14:16:13 +00002367 const struct ata_port_info * const *ppi,
Tejun Heod583bc12007-07-04 18:02:07 +09002368 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002369{
2370 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002371 int rc;
2372
2373 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2374 return -ENOMEM;
2375
2376 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2377 if (!host) {
2378 dev_printk(KERN_ERR, &pdev->dev,
2379 "failed to allocate ATA host\n");
2380 rc = -ENOMEM;
2381 goto err_out;
2382 }
2383
Tejun Heo9363c382008-04-07 22:47:16 +09002384 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002385 if (rc)
2386 goto err_out;
2387
2388 /* init DMA related stuff */
Tejun Heoc7087652010-05-10 21:41:34 +02002389 ata_pci_bmdma_init(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002390
2391 devres_remove_group(&pdev->dev, NULL);
2392 *r_host = host;
2393 return 0;
2394
Alan Cox0fe40ff2009-01-05 14:16:13 +00002395err_out:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002396 devres_release_group(&pdev->dev, NULL);
2397 return rc;
2398}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002399EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002400
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002401/**
Tejun Heo9363c382008-04-07 22:47:16 +09002402 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002403 * @host: target SFF ATA host
2404 * @irq_handler: irq_handler used when requesting IRQ(s)
2405 * @sht: scsi_host_template to use when registering the host
2406 *
2407 * This is the counterpart of ata_host_activate() for SFF ATA
2408 * hosts. This separate helper is necessary because SFF hosts
2409 * use two separate interrupts in legacy mode.
2410 *
2411 * LOCKING:
2412 * Inherited from calling layer (may sleep).
2413 *
2414 * RETURNS:
2415 * 0 on success, -errno otherwise.
2416 */
Tejun Heo9363c382008-04-07 22:47:16 +09002417int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002418 irq_handler_t irq_handler,
2419 struct scsi_host_template *sht)
2420{
2421 struct device *dev = host->dev;
2422 struct pci_dev *pdev = to_pci_dev(dev);
2423 const char *drv_name = dev_driver_string(host->dev);
2424 int legacy_mode = 0, rc;
2425
2426 rc = ata_host_start(host);
2427 if (rc)
2428 return rc;
2429
2430 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2431 u8 tmp8, mask;
2432
2433 /* TODO: What if one channel is in native mode ... */
2434 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2435 mask = (1 << 2) | (1 << 0);
2436 if ((tmp8 & mask) != mask)
2437 legacy_mode = 1;
2438#if defined(CONFIG_NO_ATA_LEGACY)
2439 /* Some platforms with PCI limits cannot address compat
2440 port space. In that case we punt if their firmware has
2441 left a device in compatibility mode */
2442 if (legacy_mode) {
2443 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2444 return -EOPNOTSUPP;
2445 }
2446#endif
2447 }
2448
2449 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2450 return -ENOMEM;
2451
2452 if (!legacy_mode && pdev->irq) {
2453 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2454 IRQF_SHARED, drv_name, host);
2455 if (rc)
2456 goto out;
2457
2458 ata_port_desc(host->ports[0], "irq %d", pdev->irq);
2459 ata_port_desc(host->ports[1], "irq %d", pdev->irq);
2460 } else if (legacy_mode) {
2461 if (!ata_port_is_dummy(host->ports[0])) {
2462 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2463 irq_handler, IRQF_SHARED,
2464 drv_name, host);
2465 if (rc)
2466 goto out;
2467
2468 ata_port_desc(host->ports[0], "irq %d",
2469 ATA_PRIMARY_IRQ(pdev));
2470 }
2471
2472 if (!ata_port_is_dummy(host->ports[1])) {
2473 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2474 irq_handler, IRQF_SHARED,
2475 drv_name, host);
2476 if (rc)
2477 goto out;
2478
2479 ata_port_desc(host->ports[1], "irq %d",
2480 ATA_SECONDARY_IRQ(pdev));
2481 }
2482 }
2483
2484 rc = ata_host_register(host, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002485out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002486 if (rc == 0)
2487 devres_remove_group(dev, NULL);
2488 else
2489 devres_release_group(dev, NULL);
2490
2491 return rc;
2492}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002493EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002494
2495/**
Tejun Heo9363c382008-04-07 22:47:16 +09002496 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002497 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002498 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002499 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002500 * @host_priv: host private_data
Alan Cox16ea0fc2010-02-23 02:26:06 -05002501 * @hflag: host flags
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002502 *
2503 * This is a helper function which can be called from a driver's
2504 * xxx_init_one() probe function if the hardware uses traditional
2505 * IDE taskfile registers.
2506 *
2507 * This function calls pci_enable_device(), reserves its register
2508 * regions, sets the dma mask, enables bus master mode, and calls
2509 * ata_device_add()
2510 *
Alan Cox2ec7df02006-08-10 16:59:10 +09002511 * ASSUMPTION:
2512 * Nobody makes a single channel controller that appears solely as
2513 * the secondary legacy port on PCI.
2514 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002515 * LOCKING:
2516 * Inherited from PCI layer (may sleep).
2517 *
2518 * RETURNS:
2519 * Zero on success, negative on errno-based value on error.
2520 */
Tejun Heo9363c382008-04-07 22:47:16 +09002521int ata_pci_sff_init_one(struct pci_dev *pdev,
Alan Cox16ea0fc2010-02-23 02:26:06 -05002522 const struct ata_port_info * const *ppi,
2523 struct scsi_host_template *sht, void *host_priv, int hflag)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002524{
Tejun Heof0d36ef2007-01-20 16:00:28 +09002525 struct device *dev = &pdev->dev;
Tejun Heo1626aeb2007-05-04 12:43:58 +02002526 const struct ata_port_info *pi = NULL;
Tejun Heo0f834de2007-04-17 23:44:07 +09002527 struct ata_host *host = NULL;
Tejun Heo1626aeb2007-05-04 12:43:58 +02002528 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002529
2530 DPRINTK("ENTER\n");
2531
Tejun Heo1626aeb2007-05-04 12:43:58 +02002532 /* look up the first valid port_info */
2533 for (i = 0; i < 2 && ppi[i]; i++) {
2534 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
2535 pi = ppi[i];
2536 break;
2537 }
2538 }
2539
2540 if (!pi) {
2541 dev_printk(KERN_ERR, &pdev->dev,
2542 "no valid port_info specified\n");
2543 return -EINVAL;
2544 }
2545
Tejun Heof0d36ef2007-01-20 16:00:28 +09002546 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2547 return -ENOMEM;
2548
Tejun Heof0d36ef2007-01-20 16:00:28 +09002549 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002550 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002551 goto out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002552
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002553 /* prepare and activate SFF host */
Tejun Heo9363c382008-04-07 22:47:16 +09002554 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
Tejun Heod583bc12007-07-04 18:02:07 +09002555 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002556 goto out;
Tejun Heo887125e2008-03-25 12:22:49 +09002557 host->private_data = host_priv;
Alan Cox16ea0fc2010-02-23 02:26:06 -05002558 host->flags |= hflag;
Tejun Heod491b272007-04-17 23:44:07 +09002559
Tejun Heod491b272007-04-17 23:44:07 +09002560 pci_set_master(pdev);
Tejun Heo9363c382008-04-07 22:47:16 +09002561 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002562out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002563 if (rc == 0)
2564 devres_remove_group(&pdev->dev, NULL);
2565 else
2566 devres_release_group(&pdev->dev, NULL);
Tejun Heod491b272007-04-17 23:44:07 +09002567
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002568 return rc;
2569}
Tejun Heo9363c382008-04-07 22:47:16 +09002570EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002571
Tejun Heo624d5c52008-03-25 22:16:41 +09002572#endif /* CONFIG_PCI */
Tejun Heo9f2f7212010-05-10 21:41:32 +02002573
2574const struct ata_port_operations ata_bmdma_port_ops = {
2575 .inherits = &ata_sff_port_ops,
2576
Tejun Heofe06e5f2010-05-10 21:41:39 +02002577 .error_handler = ata_bmdma_error_handler,
2578 .post_internal_cmd = ata_bmdma_post_internal_cmd,
2579
Tejun Heof47451c2010-05-10 21:41:40 +02002580 .qc_prep = ata_bmdma_qc_prep,
Tejun Heo360ff782010-05-10 21:41:42 +02002581 .qc_issue = ata_bmdma_qc_issue,
Tejun Heof47451c2010-05-10 21:41:40 +02002582
Tejun Heo9f2f7212010-05-10 21:41:32 +02002583 .bmdma_setup = ata_bmdma_setup,
2584 .bmdma_start = ata_bmdma_start,
2585 .bmdma_stop = ata_bmdma_stop,
2586 .bmdma_status = ata_bmdma_status,
Tejun Heoc7087652010-05-10 21:41:34 +02002587
2588 .port_start = ata_bmdma_port_start,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002589};
2590EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
2591
2592const struct ata_port_operations ata_bmdma32_port_ops = {
2593 .inherits = &ata_bmdma_port_ops,
2594
2595 .sff_data_xfer = ata_sff_data_xfer32,
Tejun Heoc7087652010-05-10 21:41:34 +02002596 .port_start = ata_bmdma_port_start32,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002597};
2598EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
2599
Tejun Heo9f2f7212010-05-10 21:41:32 +02002600/**
Tejun Heof47451c2010-05-10 21:41:40 +02002601 * ata_bmdma_fill_sg - Fill PCI IDE PRD table
2602 * @qc: Metadata associated with taskfile to be transferred
2603 *
2604 * Fill PCI IDE PRD (scatter-gather) table with segments
2605 * associated with the current disk command.
2606 *
2607 * LOCKING:
2608 * spin_lock_irqsave(host lock)
2609 *
2610 */
2611static void ata_bmdma_fill_sg(struct ata_queued_cmd *qc)
2612{
2613 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002614 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002615 struct scatterlist *sg;
2616 unsigned int si, pi;
2617
2618 pi = 0;
2619 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2620 u32 addr, offset;
2621 u32 sg_len, len;
2622
2623 /* determine if physical DMA addr spans 64K boundary.
2624 * Note h/w doesn't support 64-bit, so we unconditionally
2625 * truncate dma_addr_t to u32.
2626 */
2627 addr = (u32) sg_dma_address(sg);
2628 sg_len = sg_dma_len(sg);
2629
2630 while (sg_len) {
2631 offset = addr & 0xffff;
2632 len = sg_len;
2633 if ((offset + sg_len) > 0x10000)
2634 len = 0x10000 - offset;
2635
Tejun Heof60d7012010-05-10 21:41:41 +02002636 prd[pi].addr = cpu_to_le32(addr);
2637 prd[pi].flags_len = cpu_to_le32(len & 0xffff);
Tejun Heof47451c2010-05-10 21:41:40 +02002638 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2639
2640 pi++;
2641 sg_len -= len;
2642 addr += len;
2643 }
2644 }
2645
Tejun Heof60d7012010-05-10 21:41:41 +02002646 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002647}
2648
2649/**
2650 * ata_bmdma_fill_sg_dumb - Fill PCI IDE PRD table
2651 * @qc: Metadata associated with taskfile to be transferred
2652 *
2653 * Fill PCI IDE PRD (scatter-gather) table with segments
2654 * associated with the current disk command. Perform the fill
2655 * so that we avoid writing any length 64K records for
2656 * controllers that don't follow the spec.
2657 *
2658 * LOCKING:
2659 * spin_lock_irqsave(host lock)
2660 *
2661 */
2662static void ata_bmdma_fill_sg_dumb(struct ata_queued_cmd *qc)
2663{
2664 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002665 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002666 struct scatterlist *sg;
2667 unsigned int si, pi;
2668
2669 pi = 0;
2670 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2671 u32 addr, offset;
2672 u32 sg_len, len, blen;
2673
2674 /* determine if physical DMA addr spans 64K boundary.
2675 * Note h/w doesn't support 64-bit, so we unconditionally
2676 * truncate dma_addr_t to u32.
2677 */
2678 addr = (u32) sg_dma_address(sg);
2679 sg_len = sg_dma_len(sg);
2680
2681 while (sg_len) {
2682 offset = addr & 0xffff;
2683 len = sg_len;
2684 if ((offset + sg_len) > 0x10000)
2685 len = 0x10000 - offset;
2686
2687 blen = len & 0xffff;
Tejun Heof60d7012010-05-10 21:41:41 +02002688 prd[pi].addr = cpu_to_le32(addr);
Tejun Heof47451c2010-05-10 21:41:40 +02002689 if (blen == 0) {
2690 /* Some PATA chipsets like the CS5530 can't
2691 cope with 0x0000 meaning 64K as the spec
2692 says */
Tejun Heof60d7012010-05-10 21:41:41 +02002693 prd[pi].flags_len = cpu_to_le32(0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002694 blen = 0x8000;
Tejun Heof60d7012010-05-10 21:41:41 +02002695 prd[++pi].addr = cpu_to_le32(addr + 0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002696 }
Tejun Heof60d7012010-05-10 21:41:41 +02002697 prd[pi].flags_len = cpu_to_le32(blen);
Tejun Heof47451c2010-05-10 21:41:40 +02002698 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2699
2700 pi++;
2701 sg_len -= len;
2702 addr += len;
2703 }
2704 }
2705
Tejun Heof60d7012010-05-10 21:41:41 +02002706 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002707}
2708
2709/**
2710 * ata_bmdma_qc_prep - Prepare taskfile for submission
2711 * @qc: Metadata associated with taskfile to be prepared
2712 *
2713 * Prepare ATA taskfile for submission.
2714 *
2715 * LOCKING:
2716 * spin_lock_irqsave(host lock)
2717 */
2718void ata_bmdma_qc_prep(struct ata_queued_cmd *qc)
2719{
2720 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2721 return;
2722
2723 ata_bmdma_fill_sg(qc);
2724}
2725EXPORT_SYMBOL_GPL(ata_bmdma_qc_prep);
2726
2727/**
2728 * ata_bmdma_dumb_qc_prep - Prepare taskfile for submission
2729 * @qc: Metadata associated with taskfile to be prepared
2730 *
2731 * Prepare ATA taskfile for submission.
2732 *
2733 * LOCKING:
2734 * spin_lock_irqsave(host lock)
2735 */
2736void ata_bmdma_dumb_qc_prep(struct ata_queued_cmd *qc)
2737{
2738 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2739 return;
2740
2741 ata_bmdma_fill_sg_dumb(qc);
2742}
2743EXPORT_SYMBOL_GPL(ata_bmdma_dumb_qc_prep);
2744
2745/**
Tejun Heo360ff782010-05-10 21:41:42 +02002746 * ata_bmdma_qc_issue - issue taskfile to a BMDMA controller
2747 * @qc: command to issue to device
2748 *
2749 * This function issues a PIO, NODATA or DMA command to a
2750 * SFF/BMDMA controller. PIO and NODATA are handled by
2751 * ata_sff_qc_issue().
2752 *
2753 * LOCKING:
2754 * spin_lock_irqsave(host lock)
2755 *
2756 * RETURNS:
2757 * Zero on success, AC_ERR_* mask on failure
2758 */
2759unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc)
2760{
2761 struct ata_port *ap = qc->ap;
2762
2763 /* see ata_dma_blacklisted() */
2764 BUG_ON((ap->flags & ATA_FLAG_PIO_POLLING) &&
2765 qc->tf.protocol == ATAPI_PROT_DMA);
2766
2767 /* defer PIO handling to sff_qc_issue */
2768 if (!ata_is_dma(qc->tf.protocol))
2769 return ata_sff_qc_issue(qc);
2770
2771 /* select the device */
2772 ata_dev_select(ap, qc->dev->devno, 1, 0);
2773
2774 /* start the command */
2775 switch (qc->tf.protocol) {
2776 case ATA_PROT_DMA:
2777 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2778
2779 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2780 ap->ops->bmdma_setup(qc); /* set up bmdma */
2781 ap->ops->bmdma_start(qc); /* initiate bmdma */
2782 ap->hsm_task_state = HSM_ST_LAST;
2783 break;
2784
2785 case ATAPI_PROT_DMA:
2786 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2787
2788 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2789 ap->ops->bmdma_setup(qc); /* set up bmdma */
2790 ap->hsm_task_state = HSM_ST_FIRST;
2791
2792 /* send cdb by polling if no cdb interrupt */
2793 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
2794 ata_sff_queue_pio_task(ap, 0);
2795 break;
2796
2797 default:
2798 WARN_ON(1);
2799 return AC_ERR_SYSTEM;
2800 }
2801
2802 return 0;
2803}
2804EXPORT_SYMBOL_GPL(ata_bmdma_qc_issue);
2805
2806/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002807 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
2808 * @ap: port to handle error for
2809 *
2810 * Stock error handler for BMDMA controller. It can handle both
2811 * PATA and SATA controllers. Most BMDMA controllers should be
2812 * able to use this EH as-is or with some added handling before
2813 * and after.
2814 *
2815 * LOCKING:
2816 * Kernel thread context (may sleep)
2817 */
2818void ata_bmdma_error_handler(struct ata_port *ap)
2819{
2820 struct ata_queued_cmd *qc;
2821 unsigned long flags;
2822 bool thaw = false;
2823
2824 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
2825 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2826 qc = NULL;
2827
2828 /* reset PIO HSM and stop DMA engine */
2829 spin_lock_irqsave(ap->lock, flags);
2830
2831 if (qc && ata_is_dma(qc->tf.protocol)) {
2832 u8 host_stat;
2833
2834 host_stat = ap->ops->bmdma_status(ap);
2835
2836 /* BMDMA controllers indicate host bus error by
2837 * setting DMA_ERR bit and timing out. As it wasn't
2838 * really a timeout event, adjust error mask and
2839 * cancel frozen state.
2840 */
2841 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
2842 qc->err_mask = AC_ERR_HOST_BUS;
2843 thaw = true;
2844 }
2845
2846 ap->ops->bmdma_stop(qc);
2847
2848 /* if we're gonna thaw, make sure IRQ is clear */
2849 if (thaw) {
2850 ap->ops->sff_check_status(ap);
2851 ap->ops->sff_irq_clear(ap);
2852 }
2853 }
2854
2855 spin_unlock_irqrestore(ap->lock, flags);
2856
2857 if (thaw)
2858 ata_eh_thaw_port(ap);
2859
2860 ata_sff_error_handler(ap);
2861}
2862EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
2863
2864/**
2865 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for BMDMA
2866 * @qc: internal command to clean up
2867 *
2868 * LOCKING:
2869 * Kernel thread context (may sleep)
2870 */
2871void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
2872{
2873 struct ata_port *ap = qc->ap;
2874 unsigned long flags;
2875
2876 if (ata_is_dma(qc->tf.protocol)) {
2877 spin_lock_irqsave(ap->lock, flags);
2878 ap->ops->bmdma_stop(qc);
2879 spin_unlock_irqrestore(ap->lock, flags);
2880 }
2881}
2882EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
2883
2884/**
Tejun Heo9f2f7212010-05-10 21:41:32 +02002885 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2886 * @qc: Info associated with this ATA transaction.
2887 *
2888 * LOCKING:
2889 * spin_lock_irqsave(host lock)
2890 */
2891void ata_bmdma_setup(struct ata_queued_cmd *qc)
2892{
2893 struct ata_port *ap = qc->ap;
2894 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2895 u8 dmactl;
2896
2897 /* load PRD table addr. */
2898 mb(); /* make sure PRD table writes are visible to controller */
Tejun Heof60d7012010-05-10 21:41:41 +02002899 iowrite32(ap->bmdma_prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
Tejun Heo9f2f7212010-05-10 21:41:32 +02002900
2901 /* specify data direction, triple-check start bit is clear */
2902 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2903 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
2904 if (!rw)
2905 dmactl |= ATA_DMA_WR;
2906 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2907
2908 /* issue r/w command */
2909 ap->ops->sff_exec_command(ap, &qc->tf);
2910}
2911EXPORT_SYMBOL_GPL(ata_bmdma_setup);
2912
2913/**
2914 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2915 * @qc: Info associated with this ATA transaction.
2916 *
2917 * LOCKING:
2918 * spin_lock_irqsave(host lock)
2919 */
2920void ata_bmdma_start(struct ata_queued_cmd *qc)
2921{
2922 struct ata_port *ap = qc->ap;
2923 u8 dmactl;
2924
2925 /* start host DMA transaction */
2926 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2927 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2928
2929 /* Strictly, one may wish to issue an ioread8() here, to
2930 * flush the mmio write. However, control also passes
2931 * to the hardware at this point, and it will interrupt
2932 * us when we are to resume control. So, in effect,
2933 * we don't care when the mmio write flushes.
2934 * Further, a read of the DMA status register _immediately_
2935 * following the write may not be what certain flaky hardware
2936 * is expected, so I think it is best to not add a readb()
2937 * without first all the MMIO ATA cards/mobos.
2938 * Or maybe I'm just being paranoid.
2939 *
2940 * FIXME: The posting of this write means I/O starts are
2941 * unneccessarily delayed for MMIO
2942 */
2943}
2944EXPORT_SYMBOL_GPL(ata_bmdma_start);
2945
2946/**
2947 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2948 * @qc: Command we are ending DMA for
2949 *
2950 * Clears the ATA_DMA_START flag in the dma control register
2951 *
2952 * May be used as the bmdma_stop() entry in ata_port_operations.
2953 *
2954 * LOCKING:
2955 * spin_lock_irqsave(host lock)
2956 */
2957void ata_bmdma_stop(struct ata_queued_cmd *qc)
2958{
2959 struct ata_port *ap = qc->ap;
2960 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2961
2962 /* clear start/stop bit */
2963 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
2964 mmio + ATA_DMA_CMD);
2965
2966 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
2967 ata_sff_dma_pause(ap);
2968}
2969EXPORT_SYMBOL_GPL(ata_bmdma_stop);
2970
2971/**
2972 * ata_bmdma_status - Read PCI IDE BMDMA status
2973 * @ap: Port associated with this ATA transaction.
2974 *
2975 * Read and return BMDMA status register.
2976 *
2977 * May be used as the bmdma_status() entry in ata_port_operations.
2978 *
2979 * LOCKING:
2980 * spin_lock_irqsave(host lock)
2981 */
2982u8 ata_bmdma_status(struct ata_port *ap)
2983{
2984 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
2985}
2986EXPORT_SYMBOL_GPL(ata_bmdma_status);
2987
Tejun Heoc7087652010-05-10 21:41:34 +02002988
2989/**
2990 * ata_bmdma_port_start - Set port up for bmdma.
2991 * @ap: Port to initialize
2992 *
2993 * Called just after data structures for each port are
2994 * initialized. Allocates space for PRD table.
2995 *
2996 * May be used as the port_start() entry in ata_port_operations.
2997 *
2998 * LOCKING:
2999 * Inherited from caller.
3000 */
3001int ata_bmdma_port_start(struct ata_port *ap)
3002{
3003 if (ap->mwdma_mask || ap->udma_mask) {
Tejun Heof60d7012010-05-10 21:41:41 +02003004 ap->bmdma_prd =
3005 dmam_alloc_coherent(ap->host->dev, ATA_PRD_TBL_SZ,
3006 &ap->bmdma_prd_dma, GFP_KERNEL);
3007 if (!ap->bmdma_prd)
Tejun Heoc7087652010-05-10 21:41:34 +02003008 return -ENOMEM;
3009 }
3010
3011 return 0;
3012}
3013EXPORT_SYMBOL_GPL(ata_bmdma_port_start);
3014
3015/**
3016 * ata_bmdma_port_start32 - Set port up for dma.
3017 * @ap: Port to initialize
3018 *
3019 * Called just after data structures for each port are
3020 * initialized. Enables 32bit PIO and allocates space for PRD
3021 * table.
3022 *
3023 * May be used as the port_start() entry in ata_port_operations for
3024 * devices that are capable of 32bit PIO.
3025 *
3026 * LOCKING:
3027 * Inherited from caller.
3028 */
3029int ata_bmdma_port_start32(struct ata_port *ap)
3030{
3031 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
3032 return ata_bmdma_port_start(ap);
3033}
3034EXPORT_SYMBOL_GPL(ata_bmdma_port_start32);
3035
Tejun Heo9f2f7212010-05-10 21:41:32 +02003036#ifdef CONFIG_PCI
3037
3038/**
3039 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
3040 * @pdev: PCI device
3041 *
3042 * Some PCI ATA devices report simplex mode but in fact can be told to
3043 * enter non simplex mode. This implements the necessary logic to
3044 * perform the task on such devices. Calling it on other devices will
3045 * have -undefined- behaviour.
3046 */
3047int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
3048{
3049 unsigned long bmdma = pci_resource_start(pdev, 4);
3050 u8 simplex;
3051
3052 if (bmdma == 0)
3053 return -ENOENT;
3054
3055 simplex = inb(bmdma + 0x02);
3056 outb(simplex & 0x60, bmdma + 0x02);
3057 simplex = inb(bmdma + 0x02);
3058 if (simplex & 0x80)
3059 return -EOPNOTSUPP;
3060 return 0;
3061}
3062EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
3063
Tejun Heoc7087652010-05-10 21:41:34 +02003064static void ata_bmdma_nodma(struct ata_host *host, const char *reason)
3065{
3066 int i;
3067
3068 dev_printk(KERN_ERR, host->dev, "BMDMA: %s, falling back to PIO\n",
3069 reason);
3070
3071 for (i = 0; i < 2; i++) {
3072 host->ports[i]->mwdma_mask = 0;
3073 host->ports[i]->udma_mask = 0;
3074 }
3075}
3076
Tejun Heo9f2f7212010-05-10 21:41:32 +02003077/**
3078 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
3079 * @host: target ATA host
3080 *
3081 * Acquire PCI BMDMA resources and initialize @host accordingly.
3082 *
3083 * LOCKING:
3084 * Inherited from calling layer (may sleep).
Tejun Heo9f2f7212010-05-10 21:41:32 +02003085 */
Tejun Heoc7087652010-05-10 21:41:34 +02003086void ata_pci_bmdma_init(struct ata_host *host)
Tejun Heo9f2f7212010-05-10 21:41:32 +02003087{
3088 struct device *gdev = host->dev;
3089 struct pci_dev *pdev = to_pci_dev(gdev);
3090 int i, rc;
3091
3092 /* No BAR4 allocation: No DMA */
Tejun Heoc7087652010-05-10 21:41:34 +02003093 if (pci_resource_start(pdev, 4) == 0) {
3094 ata_bmdma_nodma(host, "BAR4 is zero");
3095 return;
3096 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003097
Tejun Heoc7087652010-05-10 21:41:34 +02003098 /*
3099 * Some controllers require BMDMA region to be initialized
3100 * even if DMA is not in use to clear IRQ status via
3101 * ->sff_irq_clear method. Try to initialize bmdma_addr
3102 * regardless of dma masks.
3103 */
Tejun Heo9f2f7212010-05-10 21:41:32 +02003104 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
3105 if (rc)
Tejun Heoc7087652010-05-10 21:41:34 +02003106 ata_bmdma_nodma(host, "failed to set dma mask");
3107 if (!rc) {
3108 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
3109 if (rc)
3110 ata_bmdma_nodma(host,
3111 "failed to set consistent dma mask");
3112 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003113
3114 /* request and iomap DMA region */
3115 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
3116 if (rc) {
Tejun Heoc7087652010-05-10 21:41:34 +02003117 ata_bmdma_nodma(host, "failed to request/iomap BAR4");
3118 return;
Tejun Heo9f2f7212010-05-10 21:41:32 +02003119 }
3120 host->iomap = pcim_iomap_table(pdev);
3121
3122 for (i = 0; i < 2; i++) {
3123 struct ata_port *ap = host->ports[i];
3124 void __iomem *bmdma = host->iomap[4] + 8 * i;
3125
3126 if (ata_port_is_dummy(ap))
3127 continue;
3128
3129 ap->ioaddr.bmdma_addr = bmdma;
3130 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
3131 (ioread8(bmdma + 2) & 0x80))
3132 host->flags |= ATA_HOST_SIMPLEX;
3133
3134 ata_port_desc(ap, "bmdma 0x%llx",
3135 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
3136 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003137}
3138EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
3139
3140#endif /* CONFIG_PCI */
Tejun Heo270390e2010-05-10 21:41:35 +02003141
3142/**
3143 * ata_sff_port_init - Initialize SFF/BMDMA ATA port
3144 * @ap: Port to initialize
3145 *
3146 * Called on port allocation to initialize SFF/BMDMA specific
3147 * fields.
3148 *
3149 * LOCKING:
3150 * None.
3151 */
3152void ata_sff_port_init(struct ata_port *ap)
3153{
Tejun Heoc4291372010-05-10 21:41:38 +02003154 INIT_DELAYED_WORK(&ap->sff_pio_task, ata_sff_pio_task);
Tejun Heo5fe74542010-05-10 21:41:37 +02003155 ap->ctl = ATA_DEVCTL_OBS;
3156 ap->last_ctl = 0xFF;
Tejun Heo270390e2010-05-10 21:41:35 +02003157}
3158
3159int __init ata_sff_init(void)
3160{
Tejun Heoc4291372010-05-10 21:41:38 +02003161 /*
3162 * FIXME: In UP case, there is only one workqueue thread and if you
3163 * have more than one PIO device, latency is bloody awful, with
3164 * occasional multi-second "hiccups" as one PIO device waits for
3165 * another. It's an ugly wart that users DO occasionally complain
3166 * about; luckily most users have at most one PIO polled device.
3167 */
3168 ata_sff_wq = create_workqueue("ata_sff");
3169 if (!ata_sff_wq)
3170 return -ENOMEM;
3171
Tejun Heo270390e2010-05-10 21:41:35 +02003172 return 0;
3173}
3174
3175void __exit ata_sff_exit(void)
3176{
Tejun Heoc4291372010-05-10 21:41:38 +02003177 destroy_workqueue(ata_sff_wq);
Tejun Heo270390e2010-05-10 21:41:35 +02003178}