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Teresa Remmet36bd1682015-07-16 10:30:49 +02001/*
2 * Copyright (C) 2015 Phytec Messtechnik GmbH
3 * Author: Teresa Remmet <t.remmet@phytec.de>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10/ {
11 model = "Phytec AM335x phyBOARD-WEGA";
12 compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
13
14};
15
16/* CAN Busses */
17&am33xx_pinmux {
18 dcan1_pins: pinmux_dcan1 {
19 pinctrl-single,pins = <
20 0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
21 0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
22 >;
23 };
24};
25
26&dcan1 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&dcan1_pins>;
29 status = "okay";
30};
31
32/* Ethernet */
33&am33xx_pinmux {
34 ethernet1_pins: pinmux_ethernet1 {
35 pinctrl-single,pins = <
36 0x40 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a0.mii2_txen */
37 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a1.mii2_rxdv */
38 0x48 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a2.mii2_txd3 */
39 0x4c (PIN_OUTPUT | MUX_MODE1) /* gpmc_a3.mii2_txd2 */
40 0x50 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a4.mii2_txd1 */
41 0x54 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a5.mii2_txd0 */
42 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a6.mii2_txclk */
43 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a7.mii2_rxclk */
44 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
45 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
46 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
47 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
48 0x74 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
49 0x78 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_ben1.mii2_col */
50 >;
51 };
52};
53
54&cpsw_emac1 {
55 phy_id = <&davinci_mdio>, <1>;
56 phy-mode = "mii";
57 dual_emac_res_vlan = <2>;
58};
59
60&mac {
61 slaves = <2>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
64 dual_emac = <1>;
65};
66
67/* MMC */
68&am33xx_pinmux {
69 mmc1_pins: pinmux_mmc1 {
70 pinctrl-single,pins = <
71 0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
72 0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
73 0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
74 0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
75 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
76 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
77 0x160 (PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
78 >;
79 };
80};
81
82&mmc1 {
83 vmmc-supply = <&vmmc_reg>;
84 bus-width = <4>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&mmc1_pins>;
87 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
88 status = "okay";
89};
90
91/* UARTs */
92&am33xx_pinmux {
93 uart0_pins: pinmux_uart0 {
94 pinctrl-single,pins = <
95 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
96 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
97 >;
98 };
99
100 uart1_pins: pinmux_uart1_pins {
101 pinctrl-single,pins = <
102 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
103 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
104 0x178 (PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
105 0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
106 >;
107 };
108};
109
110&uart0 {
111 pinctrl-names = "default";
112 pinctrl-0 = <&uart0_pins>;
113 status = "okay";
114};
115
116&uart1 {
117 pinctrl-names = "default";
118 pinctrl-0 = <&uart1_pins>;
119 status = "okay";
120};
121
122/* USB */
123&cppi41dma {
124 status = "okay";
125};
126
127&usb_ctrl_mod {
128 status = "okay";
129};
130
131&usb {
132 status = "okay";
133};
134
135&usb0 {
136 dr_mode = "peripheral";
137 status = "okay";
138};
139
140&usb0_phy {
141 status = "okay";
142};
143
144&usb1 {
145 dr_mode = "host";
146 status = "okay";
147};
148
149&usb1_phy {
150 status = "okay";
151};