Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1 | /* |
| 2 | * xHCI host controller driver |
| 3 | * |
| 4 | * Copyright (C) 2008 Intel Corp. |
| 5 | * |
| 6 | * Author: Sarah Sharp |
| 7 | * Some code borrowed from the Linux EHCI driver. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 15 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 16 | * for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software Foundation, |
| 20 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | */ |
| 22 | |
| 23 | #include <linux/usb.h> |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 24 | #include <linux/pci.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 25 | #include <linux/slab.h> |
Sarah Sharp | 527c6d7 | 2009-04-29 19:06:56 -0700 | [diff] [blame] | 26 | #include <linux/dmapool.h> |
James Hogan | 008eb95 | 2013-07-26 13:34:43 +0100 | [diff] [blame] | 27 | #include <linux/dma-mapping.h> |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 28 | |
| 29 | #include "xhci.h" |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 30 | #include "xhci-trace.h" |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 31 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 32 | /* |
| 33 | * Allocates a generic ring segment from the ring pool, sets the dma address, |
| 34 | * initializes the segment to zero, and sets the private next pointer to NULL. |
| 35 | * |
| 36 | * Section 4.11.1.1: |
| 37 | * "All components of all Command and Transfer TRBs shall be initialized to '0'" |
| 38 | */ |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 39 | static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 40 | unsigned int cycle_state, |
| 41 | unsigned int max_packet, |
| 42 | gfp_t flags) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 43 | { |
| 44 | struct xhci_segment *seg; |
| 45 | dma_addr_t dma; |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 46 | int i; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 47 | |
| 48 | seg = kzalloc(sizeof *seg, flags); |
| 49 | if (!seg) |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 50 | return NULL; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 51 | |
Saurabh Sengar | 84c1eeb | 2015-10-28 12:44:35 +0530 | [diff] [blame] | 52 | seg->trbs = dma_pool_zalloc(xhci->segment_pool, flags, &dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 53 | if (!seg->trbs) { |
| 54 | kfree(seg); |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 55 | return NULL; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 56 | } |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 57 | |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 58 | if (max_packet) { |
| 59 | seg->bounce_buf = kzalloc(max_packet, flags | GFP_DMA); |
| 60 | if (!seg->bounce_buf) { |
| 61 | dma_pool_free(xhci->segment_pool, seg->trbs, dma); |
| 62 | kfree(seg); |
| 63 | return NULL; |
| 64 | } |
| 65 | } |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 66 | /* If the cycle state is 0, set the cycle bit to 1 for all the TRBs */ |
| 67 | if (cycle_state == 0) { |
| 68 | for (i = 0; i < TRBS_PER_SEGMENT; i++) |
Xenia Ragiadakou | 5871948 | 2013-09-09 21:03:09 +0300 | [diff] [blame] | 69 | seg->trbs[i].link.control |= cpu_to_le32(TRB_CYCLE); |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 70 | } |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 71 | seg->dma = dma; |
| 72 | seg->next = NULL; |
| 73 | |
| 74 | return seg; |
| 75 | } |
| 76 | |
| 77 | static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) |
| 78 | { |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 79 | if (seg->trbs) { |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 80 | dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); |
| 81 | seg->trbs = NULL; |
| 82 | } |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 83 | kfree(seg->bounce_buf); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 84 | kfree(seg); |
| 85 | } |
| 86 | |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 87 | static void xhci_free_segments_for_ring(struct xhci_hcd *xhci, |
| 88 | struct xhci_segment *first) |
| 89 | { |
| 90 | struct xhci_segment *seg; |
| 91 | |
| 92 | seg = first->next; |
| 93 | while (seg != first) { |
| 94 | struct xhci_segment *next = seg->next; |
| 95 | xhci_segment_free(xhci, seg); |
| 96 | seg = next; |
| 97 | } |
| 98 | xhci_segment_free(xhci, first); |
| 99 | } |
| 100 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 101 | /* |
| 102 | * Make the prev segment point to the next segment. |
| 103 | * |
| 104 | * Change the last TRB in the prev segment to be a Link TRB which points to the |
| 105 | * DMA address of the next segment. The caller needs to set any Link TRB |
| 106 | * related flags, such as End TRB, Toggle Cycle, and no snoop. |
| 107 | */ |
| 108 | static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, |
Andiry Xu | 3b72fca | 2012-03-05 17:49:32 +0800 | [diff] [blame] | 109 | struct xhci_segment *next, enum xhci_ring_type type) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 110 | { |
| 111 | u32 val; |
| 112 | |
| 113 | if (!prev || !next) |
| 114 | return; |
| 115 | prev->next = next; |
Andiry Xu | 3b72fca | 2012-03-05 17:49:32 +0800 | [diff] [blame] | 116 | if (type != TYPE_EVENT) { |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 117 | prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = |
| 118 | cpu_to_le64(next->dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 119 | |
| 120 | /* Set the last TRB in the segment to have a TRB type ID of Link TRB */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 121 | val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 122 | val &= ~TRB_TYPE_BITMASK; |
| 123 | val |= TRB_TYPE(TRB_LINK); |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 124 | /* Always set the chain bit with 0.95 hardware */ |
Andiry Xu | 7e393a8 | 2011-09-23 14:19:54 -0700 | [diff] [blame] | 125 | /* Set chain bit for isoc rings on AMD 0.96 host */ |
| 126 | if (xhci_link_trb_quirk(xhci) || |
Andiry Xu | 3b72fca | 2012-03-05 17:49:32 +0800 | [diff] [blame] | 127 | (type == TYPE_ISOC && |
| 128 | (xhci->quirks & XHCI_AMD_0x96_HOST))) |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 129 | val |= TRB_CHAIN; |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 130 | prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 131 | } |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 132 | } |
| 133 | |
Andiry Xu | 8dfec61 | 2012-03-05 17:49:37 +0800 | [diff] [blame] | 134 | /* |
| 135 | * Link the ring to the new segments. |
| 136 | * Set Toggle Cycle for the new ring if needed. |
| 137 | */ |
| 138 | static void xhci_link_rings(struct xhci_hcd *xhci, struct xhci_ring *ring, |
| 139 | struct xhci_segment *first, struct xhci_segment *last, |
| 140 | unsigned int num_segs) |
| 141 | { |
| 142 | struct xhci_segment *next; |
| 143 | |
| 144 | if (!ring || !first || !last) |
| 145 | return; |
| 146 | |
| 147 | next = ring->enq_seg->next; |
| 148 | xhci_link_segments(xhci, ring->enq_seg, first, ring->type); |
| 149 | xhci_link_segments(xhci, last, next, ring->type); |
| 150 | ring->num_segs += num_segs; |
| 151 | ring->num_trbs_free += (TRBS_PER_SEGMENT - 1) * num_segs; |
| 152 | |
| 153 | if (ring->type != TYPE_EVENT && ring->enq_seg == ring->last_seg) { |
| 154 | ring->last_seg->trbs[TRBS_PER_SEGMENT-1].link.control |
| 155 | &= ~cpu_to_le32(LINK_TOGGLE); |
| 156 | last->trbs[TRBS_PER_SEGMENT-1].link.control |
| 157 | |= cpu_to_le32(LINK_TOGGLE); |
| 158 | ring->last_seg = last; |
| 159 | } |
| 160 | } |
| 161 | |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 162 | /* |
| 163 | * We need a radix tree for mapping physical addresses of TRBs to which stream |
| 164 | * ID they belong to. We need to do this because the host controller won't tell |
| 165 | * us which stream ring the TRB came from. We could store the stream ID in an |
| 166 | * event data TRB, but that doesn't help us for the cancellation case, since the |
| 167 | * endpoint may stop before it reaches that event data TRB. |
| 168 | * |
| 169 | * The radix tree maps the upper portion of the TRB DMA address to a ring |
| 170 | * segment that has the same upper portion of DMA addresses. For example, say I |
Hans de Goede | 84c1e40 | 2013-11-05 15:50:03 +0100 | [diff] [blame] | 171 | * have segments of size 1KB, that are always 1KB aligned. A segment may |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 172 | * start at 0x10c91000 and end at 0x10c913f0. If I use the upper 10 bits, the |
| 173 | * key to the stream ID is 0x43244. I can use the DMA address of the TRB to |
| 174 | * pass the radix tree a key to get the right stream ID: |
| 175 | * |
| 176 | * 0x10c90fff >> 10 = 0x43243 |
| 177 | * 0x10c912c0 >> 10 = 0x43244 |
| 178 | * 0x10c91400 >> 10 = 0x43245 |
| 179 | * |
| 180 | * Obviously, only those TRBs with DMA addresses that are within the segment |
| 181 | * will make the radix tree return the stream ID for that ring. |
| 182 | * |
| 183 | * Caveats for the radix tree: |
| 184 | * |
| 185 | * The radix tree uses an unsigned long as a key pair. On 32-bit systems, an |
| 186 | * unsigned long will be 32-bits; on a 64-bit system an unsigned long will be |
| 187 | * 64-bits. Since we only request 32-bit DMA addresses, we can use that as the |
| 188 | * key on 32-bit or 64-bit systems (it would also be fine if we asked for 64-bit |
| 189 | * PCI DMA addresses on a 64-bit system). There might be a problem on 32-bit |
| 190 | * extended systems (where the DMA address can be bigger than 32-bits), |
| 191 | * if we allow the PCI dma mask to be bigger than 32-bits. So don't do that. |
| 192 | */ |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 193 | static int xhci_insert_segment_mapping(struct radix_tree_root *trb_address_map, |
| 194 | struct xhci_ring *ring, |
| 195 | struct xhci_segment *seg, |
| 196 | gfp_t mem_flags) |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 197 | { |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 198 | unsigned long key; |
| 199 | int ret; |
| 200 | |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 201 | key = (unsigned long)(seg->dma >> TRB_SEGMENT_SHIFT); |
| 202 | /* Skip any segments that were already added. */ |
| 203 | if (radix_tree_lookup(trb_address_map, key)) |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 204 | return 0; |
| 205 | |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 206 | ret = radix_tree_maybe_preload(mem_flags); |
| 207 | if (ret) |
| 208 | return ret; |
| 209 | ret = radix_tree_insert(trb_address_map, |
| 210 | key, ring); |
| 211 | radix_tree_preload_end(); |
| 212 | return ret; |
| 213 | } |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 214 | |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 215 | static void xhci_remove_segment_mapping(struct radix_tree_root *trb_address_map, |
| 216 | struct xhci_segment *seg) |
| 217 | { |
| 218 | unsigned long key; |
| 219 | |
| 220 | key = (unsigned long)(seg->dma >> TRB_SEGMENT_SHIFT); |
| 221 | if (radix_tree_lookup(trb_address_map, key)) |
| 222 | radix_tree_delete(trb_address_map, key); |
| 223 | } |
| 224 | |
| 225 | static int xhci_update_stream_segment_mapping( |
| 226 | struct radix_tree_root *trb_address_map, |
| 227 | struct xhci_ring *ring, |
| 228 | struct xhci_segment *first_seg, |
| 229 | struct xhci_segment *last_seg, |
| 230 | gfp_t mem_flags) |
| 231 | { |
| 232 | struct xhci_segment *seg; |
| 233 | struct xhci_segment *failed_seg; |
| 234 | int ret; |
| 235 | |
| 236 | if (WARN_ON_ONCE(trb_address_map == NULL)) |
| 237 | return 0; |
| 238 | |
| 239 | seg = first_seg; |
| 240 | do { |
| 241 | ret = xhci_insert_segment_mapping(trb_address_map, |
| 242 | ring, seg, mem_flags); |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 243 | if (ret) |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 244 | goto remove_streams; |
| 245 | if (seg == last_seg) |
| 246 | return 0; |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 247 | seg = seg->next; |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 248 | } while (seg != first_seg); |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 249 | |
| 250 | return 0; |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 251 | |
| 252 | remove_streams: |
| 253 | failed_seg = seg; |
| 254 | seg = first_seg; |
| 255 | do { |
| 256 | xhci_remove_segment_mapping(trb_address_map, seg); |
| 257 | if (seg == failed_seg) |
| 258 | return ret; |
| 259 | seg = seg->next; |
| 260 | } while (seg != first_seg); |
| 261 | |
| 262 | return ret; |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 263 | } |
| 264 | |
| 265 | static void xhci_remove_stream_mapping(struct xhci_ring *ring) |
| 266 | { |
| 267 | struct xhci_segment *seg; |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 268 | |
| 269 | if (WARN_ON_ONCE(ring->trb_address_map == NULL)) |
| 270 | return; |
| 271 | |
| 272 | seg = ring->first_seg; |
| 273 | do { |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 274 | xhci_remove_segment_mapping(ring->trb_address_map, seg); |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 275 | seg = seg->next; |
| 276 | } while (seg != ring->first_seg); |
| 277 | } |
| 278 | |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 279 | static int xhci_update_stream_mapping(struct xhci_ring *ring, gfp_t mem_flags) |
| 280 | { |
| 281 | return xhci_update_stream_segment_mapping(ring->trb_address_map, ring, |
| 282 | ring->first_seg, ring->last_seg, mem_flags); |
| 283 | } |
| 284 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 285 | /* XXX: Do we need the hcd structure in all these functions? */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 286 | void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 287 | { |
Kautuk Consul | 0e6c7f7 | 2011-09-19 16:53:12 -0700 | [diff] [blame] | 288 | if (!ring) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 289 | return; |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 290 | |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 291 | if (ring->first_seg) { |
| 292 | if (ring->type == TYPE_STREAM) |
| 293 | xhci_remove_stream_mapping(ring); |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 294 | xhci_free_segments_for_ring(xhci, ring->first_seg); |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 295 | } |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 296 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 297 | kfree(ring); |
| 298 | } |
| 299 | |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 300 | static void xhci_initialize_ring_info(struct xhci_ring *ring, |
| 301 | unsigned int cycle_state) |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 302 | { |
| 303 | /* The ring is empty, so the enqueue pointer == dequeue pointer */ |
| 304 | ring->enqueue = ring->first_seg->trbs; |
| 305 | ring->enq_seg = ring->first_seg; |
| 306 | ring->dequeue = ring->enqueue; |
| 307 | ring->deq_seg = ring->first_seg; |
| 308 | /* The ring is initialized to 0. The producer must write 1 to the cycle |
| 309 | * bit to handover ownership of the TRB, so PCS = 1. The consumer must |
| 310 | * compare CCS to the cycle bit to check ownership, so CCS = 1. |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 311 | * |
| 312 | * New rings are initialized with cycle state equal to 1; if we are |
| 313 | * handling ring expansion, set the cycle state equal to the old ring. |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 314 | */ |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 315 | ring->cycle_state = cycle_state; |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 316 | /* Not necessary for new rings, but needed for re-initialized rings */ |
| 317 | ring->enq_updates = 0; |
| 318 | ring->deq_updates = 0; |
Andiry Xu | b008df6 | 2012-03-05 17:49:34 +0800 | [diff] [blame] | 319 | |
| 320 | /* |
| 321 | * Each segment has a link TRB, and leave an extra TRB for SW |
| 322 | * accounting purpose |
| 323 | */ |
| 324 | ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1; |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 325 | } |
| 326 | |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 327 | /* Allocate segments and link them for a ring */ |
| 328 | static int xhci_alloc_segments_for_ring(struct xhci_hcd *xhci, |
| 329 | struct xhci_segment **first, struct xhci_segment **last, |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 330 | unsigned int num_segs, unsigned int cycle_state, |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 331 | enum xhci_ring_type type, unsigned int max_packet, gfp_t flags) |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 332 | { |
| 333 | struct xhci_segment *prev; |
| 334 | |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 335 | prev = xhci_segment_alloc(xhci, cycle_state, max_packet, flags); |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 336 | if (!prev) |
| 337 | return -ENOMEM; |
| 338 | num_segs--; |
| 339 | |
| 340 | *first = prev; |
| 341 | while (num_segs > 0) { |
| 342 | struct xhci_segment *next; |
| 343 | |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 344 | next = xhci_segment_alloc(xhci, cycle_state, max_packet, flags); |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 345 | if (!next) { |
Julius Werner | 68e5254 | 2012-11-01 12:47:59 -0700 | [diff] [blame] | 346 | prev = *first; |
| 347 | while (prev) { |
| 348 | next = prev->next; |
| 349 | xhci_segment_free(xhci, prev); |
| 350 | prev = next; |
| 351 | } |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 352 | return -ENOMEM; |
| 353 | } |
| 354 | xhci_link_segments(xhci, prev, next, type); |
| 355 | |
| 356 | prev = next; |
| 357 | num_segs--; |
| 358 | } |
| 359 | xhci_link_segments(xhci, prev, *first, type); |
| 360 | *last = prev; |
| 361 | |
| 362 | return 0; |
| 363 | } |
| 364 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 365 | /** |
| 366 | * Create a new ring with zero or more segments. |
| 367 | * |
| 368 | * Link each segment together into a ring. |
| 369 | * Set the end flag and the cycle toggle bit on the last segment. |
| 370 | * See section 4.9.1 and figures 15 and 16. |
| 371 | */ |
| 372 | static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 373 | unsigned int num_segs, unsigned int cycle_state, |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 374 | enum xhci_ring_type type, unsigned int max_packet, gfp_t flags) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 375 | { |
| 376 | struct xhci_ring *ring; |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 377 | int ret; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 378 | |
| 379 | ring = kzalloc(sizeof *(ring), flags); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 380 | if (!ring) |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 381 | return NULL; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 382 | |
Andiry Xu | 3fe4fe0 | 2012-03-05 17:49:33 +0800 | [diff] [blame] | 383 | ring->num_segs = num_segs; |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 384 | ring->bounce_buf_len = max_packet; |
Sarah Sharp | d0e96f5a | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 385 | INIT_LIST_HEAD(&ring->td_list); |
Andiry Xu | 3b72fca | 2012-03-05 17:49:32 +0800 | [diff] [blame] | 386 | ring->type = type; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 387 | if (num_segs == 0) |
| 388 | return ring; |
| 389 | |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 390 | ret = xhci_alloc_segments_for_ring(xhci, &ring->first_seg, |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 391 | &ring->last_seg, num_segs, cycle_state, type, |
| 392 | max_packet, flags); |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 393 | if (ret) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 394 | goto fail; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 395 | |
Andiry Xu | 3b72fca | 2012-03-05 17:49:32 +0800 | [diff] [blame] | 396 | /* Only event ring does not use link TRB */ |
| 397 | if (type != TYPE_EVENT) { |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 398 | /* See section 4.9.2.1 and 6.4.4.1 */ |
Andiry Xu | 70d4360 | 2012-03-05 17:49:35 +0800 | [diff] [blame] | 399 | ring->last_seg->trbs[TRBS_PER_SEGMENT - 1].link.control |= |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 400 | cpu_to_le32(LINK_TOGGLE); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 401 | } |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 402 | xhci_initialize_ring_info(ring, cycle_state); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 403 | return ring; |
| 404 | |
| 405 | fail: |
Julius Werner | 68e5254 | 2012-11-01 12:47:59 -0700 | [diff] [blame] | 406 | kfree(ring); |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 407 | return NULL; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 408 | } |
| 409 | |
Sarah Sharp | 412566b | 2009-12-09 15:59:01 -0800 | [diff] [blame] | 410 | void xhci_free_or_cache_endpoint_ring(struct xhci_hcd *xhci, |
| 411 | struct xhci_virt_device *virt_dev, |
| 412 | unsigned int ep_index) |
| 413 | { |
| 414 | int rings_cached; |
| 415 | |
| 416 | rings_cached = virt_dev->num_rings_cached; |
| 417 | if (rings_cached < XHCI_MAX_RINGS_CACHED) { |
Sarah Sharp | 412566b | 2009-12-09 15:59:01 -0800 | [diff] [blame] | 418 | virt_dev->ring_cache[rings_cached] = |
| 419 | virt_dev->eps[ep_index].ring; |
Sarah Sharp | 30f89ca | 2011-05-16 13:09:08 -0700 | [diff] [blame] | 420 | virt_dev->num_rings_cached++; |
Sarah Sharp | 412566b | 2009-12-09 15:59:01 -0800 | [diff] [blame] | 421 | xhci_dbg(xhci, "Cached old ring, " |
| 422 | "%d ring%s cached\n", |
Sarah Sharp | 30f89ca | 2011-05-16 13:09:08 -0700 | [diff] [blame] | 423 | virt_dev->num_rings_cached, |
| 424 | (virt_dev->num_rings_cached > 1) ? "s" : ""); |
Sarah Sharp | 412566b | 2009-12-09 15:59:01 -0800 | [diff] [blame] | 425 | } else { |
| 426 | xhci_ring_free(xhci, virt_dev->eps[ep_index].ring); |
| 427 | xhci_dbg(xhci, "Ring cache full (%d rings), " |
| 428 | "freeing ring\n", |
| 429 | virt_dev->num_rings_cached); |
| 430 | } |
| 431 | virt_dev->eps[ep_index].ring = NULL; |
| 432 | } |
| 433 | |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 434 | /* Zero an endpoint ring (except for link TRBs) and move the enqueue and dequeue |
| 435 | * pointers to the beginning of the ring. |
| 436 | */ |
| 437 | static void xhci_reinit_cached_ring(struct xhci_hcd *xhci, |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 438 | struct xhci_ring *ring, unsigned int cycle_state, |
| 439 | enum xhci_ring_type type) |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 440 | { |
| 441 | struct xhci_segment *seg = ring->first_seg; |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 442 | int i; |
| 443 | |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 444 | do { |
| 445 | memset(seg->trbs, 0, |
| 446 | sizeof(union xhci_trb)*TRBS_PER_SEGMENT); |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 447 | if (cycle_state == 0) { |
| 448 | for (i = 0; i < TRBS_PER_SEGMENT; i++) |
Xenia Ragiadakou | 5871948 | 2013-09-09 21:03:09 +0300 | [diff] [blame] | 449 | seg->trbs[i].link.control |= |
| 450 | cpu_to_le32(TRB_CYCLE); |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 451 | } |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 452 | /* All endpoint rings have link TRBs */ |
Andiry Xu | 3b72fca | 2012-03-05 17:49:32 +0800 | [diff] [blame] | 453 | xhci_link_segments(xhci, seg, seg->next, type); |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 454 | seg = seg->next; |
| 455 | } while (seg != ring->first_seg); |
Andiry Xu | 3b72fca | 2012-03-05 17:49:32 +0800 | [diff] [blame] | 456 | ring->type = type; |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 457 | xhci_initialize_ring_info(ring, cycle_state); |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 458 | /* td list should be empty since all URBs have been cancelled, |
| 459 | * but just in case... |
| 460 | */ |
| 461 | INIT_LIST_HEAD(&ring->td_list); |
| 462 | } |
| 463 | |
Andiry Xu | 8dfec61 | 2012-03-05 17:49:37 +0800 | [diff] [blame] | 464 | /* |
| 465 | * Expand an existing ring. |
| 466 | * Look for a cached ring or allocate a new ring which has same segment numbers |
| 467 | * and link the two rings. |
| 468 | */ |
| 469 | int xhci_ring_expansion(struct xhci_hcd *xhci, struct xhci_ring *ring, |
| 470 | unsigned int num_trbs, gfp_t flags) |
| 471 | { |
| 472 | struct xhci_segment *first; |
| 473 | struct xhci_segment *last; |
| 474 | unsigned int num_segs; |
| 475 | unsigned int num_segs_needed; |
| 476 | int ret; |
| 477 | |
| 478 | num_segs_needed = (num_trbs + (TRBS_PER_SEGMENT - 1) - 1) / |
| 479 | (TRBS_PER_SEGMENT - 1); |
| 480 | |
| 481 | /* Allocate number of segments we needed, or double the ring size */ |
| 482 | num_segs = ring->num_segs > num_segs_needed ? |
| 483 | ring->num_segs : num_segs_needed; |
| 484 | |
| 485 | ret = xhci_alloc_segments_for_ring(xhci, &first, &last, |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 486 | num_segs, ring->cycle_state, ring->type, |
| 487 | ring->bounce_buf_len, flags); |
Andiry Xu | 8dfec61 | 2012-03-05 17:49:37 +0800 | [diff] [blame] | 488 | if (ret) |
| 489 | return -ENOMEM; |
| 490 | |
Sarah Sharp | d573422 | 2013-10-17 12:44:58 -0700 | [diff] [blame] | 491 | if (ring->type == TYPE_STREAM) |
| 492 | ret = xhci_update_stream_segment_mapping(ring->trb_address_map, |
| 493 | ring, first, last, flags); |
| 494 | if (ret) { |
| 495 | struct xhci_segment *next; |
| 496 | do { |
| 497 | next = first->next; |
| 498 | xhci_segment_free(xhci, first); |
| 499 | if (first == last) |
| 500 | break; |
| 501 | first = next; |
| 502 | } while (true); |
| 503 | return ret; |
| 504 | } |
| 505 | |
Andiry Xu | 8dfec61 | 2012-03-05 17:49:37 +0800 | [diff] [blame] | 506 | xhci_link_rings(xhci, ring, first, last, num_segs); |
Xenia Ragiadakou | 68ffb01 | 2013-08-14 06:33:56 +0300 | [diff] [blame] | 507 | xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion, |
| 508 | "ring expansion succeed, now has %d segments", |
Andiry Xu | 8dfec61 | 2012-03-05 17:49:37 +0800 | [diff] [blame] | 509 | ring->num_segs); |
| 510 | |
| 511 | return 0; |
| 512 | } |
| 513 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 514 | #define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32) |
| 515 | |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 516 | static struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 517 | int type, gfp_t flags) |
| 518 | { |
Sarah Sharp | 29f9d54 | 2013-04-23 15:49:47 -0700 | [diff] [blame] | 519 | struct xhci_container_ctx *ctx; |
| 520 | |
| 521 | if ((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT)) |
| 522 | return NULL; |
| 523 | |
| 524 | ctx = kzalloc(sizeof(*ctx), flags); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 525 | if (!ctx) |
| 526 | return NULL; |
| 527 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 528 | ctx->type = type; |
| 529 | ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024; |
| 530 | if (type == XHCI_CTX_TYPE_INPUT) |
| 531 | ctx->size += CTX_SIZE(xhci->hcc_params); |
| 532 | |
Saurabh Sengar | 84c1eeb | 2015-10-28 12:44:35 +0530 | [diff] [blame] | 533 | ctx->bytes = dma_pool_zalloc(xhci->device_pool, flags, &ctx->dma); |
Mathias Nyman | 025f880 | 2013-06-17 09:56:33 -0700 | [diff] [blame] | 534 | if (!ctx->bytes) { |
| 535 | kfree(ctx); |
| 536 | return NULL; |
| 537 | } |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 538 | return ctx; |
| 539 | } |
| 540 | |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 541 | static void xhci_free_container_ctx(struct xhci_hcd *xhci, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 542 | struct xhci_container_ctx *ctx) |
| 543 | { |
Sarah Sharp | a1d78c1 | 2009-12-09 15:59:03 -0800 | [diff] [blame] | 544 | if (!ctx) |
| 545 | return; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 546 | dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma); |
| 547 | kfree(ctx); |
| 548 | } |
| 549 | |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 550 | struct xhci_input_control_ctx *xhci_get_input_control_ctx( |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 551 | struct xhci_container_ctx *ctx) |
| 552 | { |
Sarah Sharp | 92f8e76 | 2013-04-23 17:11:14 -0700 | [diff] [blame] | 553 | if (ctx->type != XHCI_CTX_TYPE_INPUT) |
| 554 | return NULL; |
| 555 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 556 | return (struct xhci_input_control_ctx *)ctx->bytes; |
| 557 | } |
| 558 | |
| 559 | struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci, |
| 560 | struct xhci_container_ctx *ctx) |
| 561 | { |
| 562 | if (ctx->type == XHCI_CTX_TYPE_DEVICE) |
| 563 | return (struct xhci_slot_ctx *)ctx->bytes; |
| 564 | |
| 565 | return (struct xhci_slot_ctx *) |
| 566 | (ctx->bytes + CTX_SIZE(xhci->hcc_params)); |
| 567 | } |
| 568 | |
| 569 | struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci, |
| 570 | struct xhci_container_ctx *ctx, |
| 571 | unsigned int ep_index) |
| 572 | { |
| 573 | /* increment ep index by offset of start of ep ctx array */ |
| 574 | ep_index++; |
| 575 | if (ctx->type == XHCI_CTX_TYPE_INPUT) |
| 576 | ep_index++; |
| 577 | |
| 578 | return (struct xhci_ep_ctx *) |
| 579 | (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params))); |
| 580 | } |
| 581 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 582 | |
| 583 | /***************** Streams structures manipulation *************************/ |
| 584 | |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 585 | static void xhci_free_stream_ctx(struct xhci_hcd *xhci, |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 586 | unsigned int num_stream_ctxs, |
| 587 | struct xhci_stream_ctx *stream_ctx, dma_addr_t dma) |
| 588 | { |
Xenia Ragiadakou | 2a10004 | 2013-11-15 03:18:08 +0200 | [diff] [blame] | 589 | struct device *dev = xhci_to_hcd(xhci)->self.controller; |
Hans de Goede | ee4aa54 | 2013-10-04 00:29:46 +0200 | [diff] [blame] | 590 | size_t size = sizeof(struct xhci_stream_ctx) * num_stream_ctxs; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 591 | |
Hans de Goede | ee4aa54 | 2013-10-04 00:29:46 +0200 | [diff] [blame] | 592 | if (size > MEDIUM_STREAM_ARRAY_SIZE) |
| 593 | dma_free_coherent(dev, size, |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 594 | stream_ctx, dma); |
Hans de Goede | ee4aa54 | 2013-10-04 00:29:46 +0200 | [diff] [blame] | 595 | else if (size <= SMALL_STREAM_ARRAY_SIZE) |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 596 | return dma_pool_free(xhci->small_streams_pool, |
| 597 | stream_ctx, dma); |
| 598 | else |
| 599 | return dma_pool_free(xhci->medium_streams_pool, |
| 600 | stream_ctx, dma); |
| 601 | } |
| 602 | |
| 603 | /* |
| 604 | * The stream context array for each endpoint with bulk streams enabled can |
| 605 | * vary in size, based on: |
| 606 | * - how many streams the endpoint supports, |
| 607 | * - the maximum primary stream array size the host controller supports, |
| 608 | * - and how many streams the device driver asks for. |
| 609 | * |
| 610 | * The stream context array must be a power of 2, and can be as small as |
| 611 | * 64 bytes or as large as 1MB. |
| 612 | */ |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 613 | static struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci, |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 614 | unsigned int num_stream_ctxs, dma_addr_t *dma, |
| 615 | gfp_t mem_flags) |
| 616 | { |
Xenia Ragiadakou | 2a10004 | 2013-11-15 03:18:08 +0200 | [diff] [blame] | 617 | struct device *dev = xhci_to_hcd(xhci)->self.controller; |
Hans de Goede | ee4aa54 | 2013-10-04 00:29:46 +0200 | [diff] [blame] | 618 | size_t size = sizeof(struct xhci_stream_ctx) * num_stream_ctxs; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 619 | |
Hans de Goede | ee4aa54 | 2013-10-04 00:29:46 +0200 | [diff] [blame] | 620 | if (size > MEDIUM_STREAM_ARRAY_SIZE) |
| 621 | return dma_alloc_coherent(dev, size, |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 622 | dma, mem_flags); |
Hans de Goede | ee4aa54 | 2013-10-04 00:29:46 +0200 | [diff] [blame] | 623 | else if (size <= SMALL_STREAM_ARRAY_SIZE) |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 624 | return dma_pool_alloc(xhci->small_streams_pool, |
| 625 | mem_flags, dma); |
| 626 | else |
| 627 | return dma_pool_alloc(xhci->medium_streams_pool, |
| 628 | mem_flags, dma); |
| 629 | } |
| 630 | |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 631 | struct xhci_ring *xhci_dma_to_transfer_ring( |
| 632 | struct xhci_virt_ep *ep, |
| 633 | u64 address) |
| 634 | { |
| 635 | if (ep->ep_state & EP_HAS_STREAMS) |
| 636 | return radix_tree_lookup(&ep->stream_info->trb_address_map, |
David Howells | eb8ccd2 | 2013-03-28 18:48:35 +0000 | [diff] [blame] | 637 | address >> TRB_SEGMENT_SHIFT); |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 638 | return ep->ring; |
| 639 | } |
| 640 | |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 641 | struct xhci_ring *xhci_stream_id_to_ring( |
| 642 | struct xhci_virt_device *dev, |
| 643 | unsigned int ep_index, |
| 644 | unsigned int stream_id) |
| 645 | { |
| 646 | struct xhci_virt_ep *ep = &dev->eps[ep_index]; |
| 647 | |
| 648 | if (stream_id == 0) |
| 649 | return ep->ring; |
| 650 | if (!ep->stream_info) |
| 651 | return NULL; |
| 652 | |
| 653 | if (stream_id > ep->stream_info->num_streams) |
| 654 | return NULL; |
| 655 | return ep->stream_info->stream_rings[stream_id]; |
| 656 | } |
| 657 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 658 | /* |
| 659 | * Change an endpoint's internal structure so it supports stream IDs. The |
| 660 | * number of requested streams includes stream 0, which cannot be used by device |
| 661 | * drivers. |
| 662 | * |
| 663 | * The number of stream contexts in the stream context array may be bigger than |
| 664 | * the number of streams the driver wants to use. This is because the number of |
| 665 | * stream context array entries must be a power of two. |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 666 | */ |
| 667 | struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci, |
| 668 | unsigned int num_stream_ctxs, |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 669 | unsigned int num_streams, |
| 670 | unsigned int max_packet, gfp_t mem_flags) |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 671 | { |
| 672 | struct xhci_stream_info *stream_info; |
| 673 | u32 cur_stream; |
| 674 | struct xhci_ring *cur_ring; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 675 | u64 addr; |
| 676 | int ret; |
| 677 | |
| 678 | xhci_dbg(xhci, "Allocating %u streams and %u " |
| 679 | "stream context array entries.\n", |
| 680 | num_streams, num_stream_ctxs); |
| 681 | if (xhci->cmd_ring_reserved_trbs == MAX_RSVD_CMD_TRBS) { |
| 682 | xhci_dbg(xhci, "Command ring has no reserved TRBs available\n"); |
| 683 | return NULL; |
| 684 | } |
| 685 | xhci->cmd_ring_reserved_trbs++; |
| 686 | |
| 687 | stream_info = kzalloc(sizeof(struct xhci_stream_info), mem_flags); |
| 688 | if (!stream_info) |
| 689 | goto cleanup_trbs; |
| 690 | |
| 691 | stream_info->num_streams = num_streams; |
| 692 | stream_info->num_stream_ctxs = num_stream_ctxs; |
| 693 | |
| 694 | /* Initialize the array of virtual pointers to stream rings. */ |
| 695 | stream_info->stream_rings = kzalloc( |
| 696 | sizeof(struct xhci_ring *)*num_streams, |
| 697 | mem_flags); |
| 698 | if (!stream_info->stream_rings) |
| 699 | goto cleanup_info; |
| 700 | |
| 701 | /* Initialize the array of DMA addresses for stream rings for the HW. */ |
| 702 | stream_info->stream_ctx_array = xhci_alloc_stream_ctx(xhci, |
| 703 | num_stream_ctxs, &stream_info->ctx_array_dma, |
| 704 | mem_flags); |
| 705 | if (!stream_info->stream_ctx_array) |
| 706 | goto cleanup_ctx; |
| 707 | memset(stream_info->stream_ctx_array, 0, |
| 708 | sizeof(struct xhci_stream_ctx)*num_stream_ctxs); |
| 709 | |
| 710 | /* Allocate everything needed to free the stream rings later */ |
| 711 | stream_info->free_streams_command = |
| 712 | xhci_alloc_command(xhci, true, true, mem_flags); |
| 713 | if (!stream_info->free_streams_command) |
| 714 | goto cleanup_ctx; |
| 715 | |
| 716 | INIT_RADIX_TREE(&stream_info->trb_address_map, GFP_ATOMIC); |
| 717 | |
| 718 | /* Allocate rings for all the streams that the driver will use, |
| 719 | * and add their segment DMA addresses to the radix tree. |
| 720 | * Stream 0 is reserved. |
| 721 | */ |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 722 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 723 | for (cur_stream = 1; cur_stream < num_streams; cur_stream++) { |
| 724 | stream_info->stream_rings[cur_stream] = |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 725 | xhci_ring_alloc(xhci, 2, 1, TYPE_STREAM, max_packet, |
| 726 | mem_flags); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 727 | cur_ring = stream_info->stream_rings[cur_stream]; |
| 728 | if (!cur_ring) |
| 729 | goto cleanup_rings; |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 730 | cur_ring->stream_id = cur_stream; |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 731 | cur_ring->trb_address_map = &stream_info->trb_address_map; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 732 | /* Set deq ptr, cycle bit, and stream context type */ |
| 733 | addr = cur_ring->first_seg->dma | |
| 734 | SCT_FOR_CTX(SCT_PRI_TR) | |
| 735 | cur_ring->cycle_state; |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 736 | stream_info->stream_ctx_array[cur_stream].stream_ring = |
| 737 | cpu_to_le64(addr); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 738 | xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n", |
| 739 | cur_stream, (unsigned long long) addr); |
| 740 | |
Gerd Hoffmann | 1534130 | 2013-10-04 00:29:44 +0200 | [diff] [blame] | 741 | ret = xhci_update_stream_mapping(cur_ring, mem_flags); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 742 | if (ret) { |
| 743 | xhci_ring_free(xhci, cur_ring); |
| 744 | stream_info->stream_rings[cur_stream] = NULL; |
| 745 | goto cleanup_rings; |
| 746 | } |
| 747 | } |
| 748 | /* Leave the other unused stream ring pointers in the stream context |
| 749 | * array initialized to zero. This will cause the xHC to give us an |
| 750 | * error if the device asks for a stream ID we don't have setup (if it |
| 751 | * was any other way, the host controller would assume the ring is |
| 752 | * "empty" and wait forever for data to be queued to that stream ID). |
| 753 | */ |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 754 | |
| 755 | return stream_info; |
| 756 | |
| 757 | cleanup_rings: |
| 758 | for (cur_stream = 1; cur_stream < num_streams; cur_stream++) { |
| 759 | cur_ring = stream_info->stream_rings[cur_stream]; |
| 760 | if (cur_ring) { |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 761 | xhci_ring_free(xhci, cur_ring); |
| 762 | stream_info->stream_rings[cur_stream] = NULL; |
| 763 | } |
| 764 | } |
| 765 | xhci_free_command(xhci, stream_info->free_streams_command); |
| 766 | cleanup_ctx: |
| 767 | kfree(stream_info->stream_rings); |
| 768 | cleanup_info: |
| 769 | kfree(stream_info); |
| 770 | cleanup_trbs: |
| 771 | xhci->cmd_ring_reserved_trbs--; |
| 772 | return NULL; |
| 773 | } |
| 774 | /* |
| 775 | * Sets the MaxPStreams field and the Linear Stream Array field. |
| 776 | * Sets the dequeue pointer to the stream context array. |
| 777 | */ |
| 778 | void xhci_setup_streams_ep_input_ctx(struct xhci_hcd *xhci, |
| 779 | struct xhci_ep_ctx *ep_ctx, |
| 780 | struct xhci_stream_info *stream_info) |
| 781 | { |
| 782 | u32 max_primary_streams; |
| 783 | /* MaxPStreams is the number of stream context array entries, not the |
| 784 | * number we're actually using. Must be in 2^(MaxPstreams + 1) format. |
| 785 | * fls(0) = 0, fls(0x1) = 1, fls(0x10) = 2, fls(0x100) = 3, etc. |
| 786 | */ |
| 787 | max_primary_streams = fls(stream_info->num_stream_ctxs) - 2; |
Xenia Ragiadakou | 3a7fa5b | 2013-07-31 07:35:27 +0300 | [diff] [blame] | 788 | xhci_dbg_trace(xhci, trace_xhci_dbg_context_change, |
| 789 | "Setting number of stream ctx array entries to %u", |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 790 | 1 << (max_primary_streams + 1)); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 791 | ep_ctx->ep_info &= cpu_to_le32(~EP_MAXPSTREAMS_MASK); |
| 792 | ep_ctx->ep_info |= cpu_to_le32(EP_MAXPSTREAMS(max_primary_streams) |
| 793 | | EP_HAS_LSA); |
| 794 | ep_ctx->deq = cpu_to_le64(stream_info->ctx_array_dma); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 795 | } |
| 796 | |
| 797 | /* |
| 798 | * Sets the MaxPStreams field and the Linear Stream Array field to 0. |
| 799 | * Reinstalls the "normal" endpoint ring (at its previous dequeue mark, |
| 800 | * not at the beginning of the ring). |
| 801 | */ |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 802 | void xhci_setup_no_streams_ep_input_ctx(struct xhci_ep_ctx *ep_ctx, |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 803 | struct xhci_virt_ep *ep) |
| 804 | { |
| 805 | dma_addr_t addr; |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 806 | ep_ctx->ep_info &= cpu_to_le32(~(EP_MAXPSTREAMS_MASK | EP_HAS_LSA)); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 807 | addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 808 | ep_ctx->deq = cpu_to_le64(addr | ep->ring->cycle_state); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 809 | } |
| 810 | |
| 811 | /* Frees all stream contexts associated with the endpoint, |
| 812 | * |
| 813 | * Caller should fix the endpoint context streams fields. |
| 814 | */ |
| 815 | void xhci_free_stream_info(struct xhci_hcd *xhci, |
| 816 | struct xhci_stream_info *stream_info) |
| 817 | { |
| 818 | int cur_stream; |
| 819 | struct xhci_ring *cur_ring; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 820 | |
| 821 | if (!stream_info) |
| 822 | return; |
| 823 | |
| 824 | for (cur_stream = 1; cur_stream < stream_info->num_streams; |
| 825 | cur_stream++) { |
| 826 | cur_ring = stream_info->stream_rings[cur_stream]; |
| 827 | if (cur_ring) { |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 828 | xhci_ring_free(xhci, cur_ring); |
| 829 | stream_info->stream_rings[cur_stream] = NULL; |
| 830 | } |
| 831 | } |
| 832 | xhci_free_command(xhci, stream_info->free_streams_command); |
| 833 | xhci->cmd_ring_reserved_trbs--; |
| 834 | if (stream_info->stream_ctx_array) |
| 835 | xhci_free_stream_ctx(xhci, |
| 836 | stream_info->num_stream_ctxs, |
| 837 | stream_info->stream_ctx_array, |
| 838 | stream_info->ctx_array_dma); |
| 839 | |
Xenia Ragiadakou | 0d3703b | 2013-08-26 23:29:48 +0300 | [diff] [blame] | 840 | kfree(stream_info->stream_rings); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 841 | kfree(stream_info); |
| 842 | } |
| 843 | |
| 844 | |
| 845 | /***************** Device context manipulation *************************/ |
| 846 | |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 847 | static void xhci_init_endpoint_timer(struct xhci_hcd *xhci, |
| 848 | struct xhci_virt_ep *ep) |
| 849 | { |
Julia Lawall | 9e08a03 | 2015-01-09 16:06:30 +0200 | [diff] [blame] | 850 | setup_timer(&ep->stop_cmd_timer, xhci_stop_endpoint_command_watchdog, |
| 851 | (unsigned long)ep); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 852 | ep->xhci = xhci; |
| 853 | } |
| 854 | |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 855 | static void xhci_free_tt_info(struct xhci_hcd *xhci, |
| 856 | struct xhci_virt_device *virt_dev, |
| 857 | int slot_id) |
| 858 | { |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 859 | struct list_head *tt_list_head; |
Takashi Iwai | 46ed8f0 | 2012-06-01 10:06:23 +0200 | [diff] [blame] | 860 | struct xhci_tt_bw_info *tt_info, *next; |
| 861 | bool slot_found = false; |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 862 | |
| 863 | /* If the device never made it past the Set Address stage, |
| 864 | * it may not have the real_port set correctly. |
| 865 | */ |
| 866 | if (virt_dev->real_port == 0 || |
| 867 | virt_dev->real_port > HCS_MAX_PORTS(xhci->hcs_params1)) { |
| 868 | xhci_dbg(xhci, "Bad real port.\n"); |
| 869 | return; |
| 870 | } |
| 871 | |
| 872 | tt_list_head = &(xhci->rh_bw[virt_dev->real_port - 1].tts); |
Takashi Iwai | 46ed8f0 | 2012-06-01 10:06:23 +0200 | [diff] [blame] | 873 | list_for_each_entry_safe(tt_info, next, tt_list_head, tt_list) { |
| 874 | /* Multi-TT hubs will have more than one entry */ |
| 875 | if (tt_info->slot_id == slot_id) { |
| 876 | slot_found = true; |
| 877 | list_del(&tt_info->tt_list); |
| 878 | kfree(tt_info); |
| 879 | } else if (slot_found) { |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 880 | break; |
Takashi Iwai | 46ed8f0 | 2012-06-01 10:06:23 +0200 | [diff] [blame] | 881 | } |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 882 | } |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 883 | } |
| 884 | |
| 885 | int xhci_alloc_tt_info(struct xhci_hcd *xhci, |
| 886 | struct xhci_virt_device *virt_dev, |
| 887 | struct usb_device *hdev, |
| 888 | struct usb_tt *tt, gfp_t mem_flags) |
| 889 | { |
| 890 | struct xhci_tt_bw_info *tt_info; |
| 891 | unsigned int num_ports; |
| 892 | int i, j; |
| 893 | |
| 894 | if (!tt->multi) |
| 895 | num_ports = 1; |
| 896 | else |
| 897 | num_ports = hdev->maxchild; |
| 898 | |
| 899 | for (i = 0; i < num_ports; i++, tt_info++) { |
| 900 | struct xhci_interval_bw_table *bw_table; |
| 901 | |
| 902 | tt_info = kzalloc(sizeof(*tt_info), mem_flags); |
| 903 | if (!tt_info) |
| 904 | goto free_tts; |
| 905 | INIT_LIST_HEAD(&tt_info->tt_list); |
| 906 | list_add(&tt_info->tt_list, |
| 907 | &xhci->rh_bw[virt_dev->real_port - 1].tts); |
| 908 | tt_info->slot_id = virt_dev->udev->slot_id; |
| 909 | if (tt->multi) |
| 910 | tt_info->ttport = i+1; |
| 911 | bw_table = &tt_info->bw_table; |
| 912 | for (j = 0; j < XHCI_MAX_INTERVAL; j++) |
| 913 | INIT_LIST_HEAD(&bw_table->interval_bw[j].endpoints); |
| 914 | } |
| 915 | return 0; |
| 916 | |
| 917 | free_tts: |
| 918 | xhci_free_tt_info(xhci, virt_dev, virt_dev->udev->slot_id); |
| 919 | return -ENOMEM; |
| 920 | } |
| 921 | |
| 922 | |
| 923 | /* All the xhci_tds in the ring's TD list should be freed at this point. |
| 924 | * Should be called with xhci->lock held if there is any chance the TT lists |
| 925 | * will be manipulated by the configure endpoint, allocate device, or update |
| 926 | * hub functions while this function is removing the TT entries from the list. |
| 927 | */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 928 | void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id) |
| 929 | { |
| 930 | struct xhci_virt_device *dev; |
| 931 | int i; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 932 | int old_active_eps = 0; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 933 | |
| 934 | /* Slot ID 0 is reserved */ |
| 935 | if (slot_id == 0 || !xhci->devs[slot_id]) |
| 936 | return; |
| 937 | |
| 938 | dev = xhci->devs[slot_id]; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 939 | xhci->dcbaa->dev_context_ptrs[slot_id] = 0; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 940 | if (!dev) |
| 941 | return; |
| 942 | |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 943 | if (dev->tt_info) |
| 944 | old_active_eps = dev->tt_info->active_eps; |
| 945 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 946 | for (i = 0; i < 31; ++i) { |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 947 | if (dev->eps[i].ring) |
| 948 | xhci_ring_free(xhci, dev->eps[i].ring); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 949 | if (dev->eps[i].stream_info) |
| 950 | xhci_free_stream_info(xhci, |
| 951 | dev->eps[i].stream_info); |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 952 | /* Endpoints on the TT/root port lists should have been removed |
| 953 | * when usb_disable_device() was called for the device. |
| 954 | * We can't drop them anyway, because the udev might have gone |
| 955 | * away by this point, and we can't tell what speed it was. |
| 956 | */ |
| 957 | if (!list_empty(&dev->eps[i].bw_endpoint_list)) |
| 958 | xhci_warn(xhci, "Slot %u endpoint %u " |
| 959 | "not removed from BW list!\n", |
| 960 | slot_id, i); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 961 | } |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 962 | /* If this is a hub, free the TT(s) from the TT list */ |
| 963 | xhci_free_tt_info(xhci, dev, slot_id); |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 964 | /* If necessary, update the number of active TTs on this root port */ |
| 965 | xhci_update_tt_active_eps(xhci, dev, old_active_eps); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 966 | |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 967 | if (dev->ring_cache) { |
| 968 | for (i = 0; i < dev->num_rings_cached; i++) |
| 969 | xhci_ring_free(xhci, dev->ring_cache[i]); |
| 970 | kfree(dev->ring_cache); |
| 971 | } |
| 972 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 973 | if (dev->in_ctx) |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 974 | xhci_free_container_ctx(xhci, dev->in_ctx); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 975 | if (dev->out_ctx) |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 976 | xhci_free_container_ctx(xhci, dev->out_ctx); |
| 977 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 978 | kfree(xhci->devs[slot_id]); |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 979 | xhci->devs[slot_id] = NULL; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 980 | } |
| 981 | |
Mathias Nyman | 3bf5e74 | 2017-01-03 18:28:43 +0200 | [diff] [blame] | 982 | /* |
| 983 | * Free a virt_device structure. |
| 984 | * If the virt_device added a tt_info (a hub) and has children pointing to |
| 985 | * that tt_info, then free the child first. Recursive. |
| 986 | * We can't rely on udev at this point to find child-parent relationships. |
| 987 | */ |
| 988 | void xhci_free_virt_devices_depth_first(struct xhci_hcd *xhci, int slot_id) |
| 989 | { |
| 990 | struct xhci_virt_device *vdev; |
| 991 | struct list_head *tt_list_head; |
| 992 | struct xhci_tt_bw_info *tt_info, *next; |
| 993 | int i; |
| 994 | |
| 995 | vdev = xhci->devs[slot_id]; |
| 996 | if (!vdev) |
| 997 | return; |
| 998 | |
| 999 | tt_list_head = &(xhci->rh_bw[vdev->real_port - 1].tts); |
| 1000 | list_for_each_entry_safe(tt_info, next, tt_list_head, tt_list) { |
| 1001 | /* is this a hub device that added a tt_info to the tts list */ |
| 1002 | if (tt_info->slot_id == slot_id) { |
| 1003 | /* are any devices using this tt_info? */ |
| 1004 | for (i = 1; i < HCS_MAX_SLOTS(xhci->hcs_params1); i++) { |
| 1005 | vdev = xhci->devs[i]; |
| 1006 | if (vdev && (vdev->tt_info == tt_info)) |
| 1007 | xhci_free_virt_devices_depth_first( |
| 1008 | xhci, i); |
| 1009 | } |
| 1010 | } |
| 1011 | } |
| 1012 | /* we are now at a leaf device */ |
| 1013 | xhci_free_virt_device(xhci, slot_id); |
| 1014 | } |
| 1015 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1016 | int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, |
| 1017 | struct usb_device *udev, gfp_t flags) |
| 1018 | { |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1019 | struct xhci_virt_device *dev; |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1020 | int i; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1021 | |
| 1022 | /* Slot ID 0 is reserved */ |
| 1023 | if (slot_id == 0 || xhci->devs[slot_id]) { |
| 1024 | xhci_warn(xhci, "Bad Slot ID %d\n", slot_id); |
| 1025 | return 0; |
| 1026 | } |
| 1027 | |
| 1028 | xhci->devs[slot_id] = kzalloc(sizeof(*xhci->devs[slot_id]), flags); |
| 1029 | if (!xhci->devs[slot_id]) |
| 1030 | return 0; |
| 1031 | dev = xhci->devs[slot_id]; |
| 1032 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1033 | /* Allocate the (output) device context that will be used in the HC. */ |
| 1034 | dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1035 | if (!dev->out_ctx) |
| 1036 | goto fail; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1037 | |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1038 | xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1039 | (unsigned long long)dev->out_ctx->dma); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1040 | |
| 1041 | /* Allocate the (input) device context for address device command */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1042 | dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1043 | if (!dev->in_ctx) |
| 1044 | goto fail; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1045 | |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1046 | xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1047 | (unsigned long long)dev->in_ctx->dma); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1048 | |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1049 | /* Initialize the cancellation list and watchdog timers for each ep */ |
| 1050 | for (i = 0; i < 31; i++) { |
| 1051 | xhci_init_endpoint_timer(xhci, &dev->eps[i]); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1052 | INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list); |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 1053 | INIT_LIST_HEAD(&dev->eps[i].bw_endpoint_list); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1054 | } |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1055 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1056 | /* Allocate endpoint 0 ring */ |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 1057 | dev->eps[0].ring = xhci_ring_alloc(xhci, 2, 1, TYPE_CTRL, 0, flags); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1058 | if (!dev->eps[0].ring) |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1059 | goto fail; |
| 1060 | |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 1061 | /* Allocate pointers to the ring cache */ |
| 1062 | dev->ring_cache = kzalloc( |
| 1063 | sizeof(struct xhci_ring *)*XHCI_MAX_RINGS_CACHED, |
| 1064 | flags); |
| 1065 | if (!dev->ring_cache) |
| 1066 | goto fail; |
| 1067 | dev->num_rings_cached = 0; |
| 1068 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1069 | init_completion(&dev->cmd_completion); |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1070 | dev->udev = udev; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1071 | |
Sarah Sharp | 28c2d2e | 2009-07-27 12:05:08 -0700 | [diff] [blame] | 1072 | /* Point to output device context in dcbaa. */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1073 | xhci->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(dev->out_ctx->dma); |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1074 | xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1075 | slot_id, |
| 1076 | &xhci->dcbaa->dev_context_ptrs[slot_id], |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1077 | le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id])); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1078 | |
| 1079 | return 1; |
| 1080 | fail: |
| 1081 | xhci_free_virt_device(xhci, slot_id); |
| 1082 | return 0; |
| 1083 | } |
| 1084 | |
Sarah Sharp | 2d1ee59 | 2010-07-09 17:08:54 +0200 | [diff] [blame] | 1085 | void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci, |
| 1086 | struct usb_device *udev) |
| 1087 | { |
| 1088 | struct xhci_virt_device *virt_dev; |
| 1089 | struct xhci_ep_ctx *ep0_ctx; |
| 1090 | struct xhci_ring *ep_ring; |
| 1091 | |
| 1092 | virt_dev = xhci->devs[udev->slot_id]; |
| 1093 | ep0_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, 0); |
| 1094 | ep_ring = virt_dev->eps[0].ring; |
| 1095 | /* |
| 1096 | * FIXME we don't keep track of the dequeue pointer very well after a |
| 1097 | * Set TR dequeue pointer, so we're setting the dequeue pointer of the |
| 1098 | * host to our enqueue pointer. This should only be called after a |
| 1099 | * configured device has reset, so all control transfers should have |
| 1100 | * been completed or cancelled before the reset. |
| 1101 | */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1102 | ep0_ctx->deq = cpu_to_le64(xhci_trb_virt_to_dma(ep_ring->enq_seg, |
| 1103 | ep_ring->enqueue) |
| 1104 | | ep_ring->cycle_state); |
Sarah Sharp | 2d1ee59 | 2010-07-09 17:08:54 +0200 | [diff] [blame] | 1105 | } |
| 1106 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1107 | /* |
| 1108 | * The xHCI roothub may have ports of differing speeds in any order in the port |
| 1109 | * status registers. xhci->port_array provides an array of the port speed for |
| 1110 | * each offset into the port status registers. |
| 1111 | * |
| 1112 | * The xHCI hardware wants to know the roothub port number that the USB device |
| 1113 | * is attached to (or the roothub port its ancestor hub is attached to). All we |
| 1114 | * know is the index of that port under either the USB 2.0 or the USB 3.0 |
| 1115 | * roothub, but that doesn't give us the real index into the HW port status |
Lan Tianyu | 3f5eb14 | 2013-03-19 16:48:12 +0800 | [diff] [blame] | 1116 | * registers. Call xhci_find_raw_port_number() to get real index. |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1117 | */ |
| 1118 | static u32 xhci_find_real_port_number(struct xhci_hcd *xhci, |
| 1119 | struct usb_device *udev) |
| 1120 | { |
| 1121 | struct usb_device *top_dev; |
Lan Tianyu | 3f5eb14 | 2013-03-19 16:48:12 +0800 | [diff] [blame] | 1122 | struct usb_hcd *hcd; |
| 1123 | |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 1124 | if (udev->speed >= USB_SPEED_SUPER) |
Lan Tianyu | 3f5eb14 | 2013-03-19 16:48:12 +0800 | [diff] [blame] | 1125 | hcd = xhci->shared_hcd; |
| 1126 | else |
| 1127 | hcd = xhci->main_hcd; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1128 | |
| 1129 | for (top_dev = udev; top_dev->parent && top_dev->parent->parent; |
| 1130 | top_dev = top_dev->parent) |
| 1131 | /* Found device below root hub */; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1132 | |
Lan Tianyu | 3f5eb14 | 2013-03-19 16:48:12 +0800 | [diff] [blame] | 1133 | return xhci_find_raw_port_number(hcd, top_dev->portnum); |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1134 | } |
| 1135 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1136 | /* Setup an xHCI virtual device for a Set Address command */ |
| 1137 | int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev) |
| 1138 | { |
| 1139 | struct xhci_virt_device *dev; |
| 1140 | struct xhci_ep_ctx *ep0_ctx; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1141 | struct xhci_slot_ctx *slot_ctx; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1142 | u32 port_num; |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1143 | u32 max_packets; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1144 | struct usb_device *top_dev; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1145 | |
| 1146 | dev = xhci->devs[udev->slot_id]; |
| 1147 | /* Slot ID 0 is reserved */ |
| 1148 | if (udev->slot_id == 0 || !dev) { |
| 1149 | xhci_warn(xhci, "Slot ID %d is not assigned to this device\n", |
| 1150 | udev->slot_id); |
| 1151 | return -EINVAL; |
| 1152 | } |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1153 | ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1154 | slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1155 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1156 | /* 3) Only the control endpoint is valid - one endpoint context */ |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1157 | slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | udev->route); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1158 | switch (udev->speed) { |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 1159 | case USB_SPEED_SUPER_PLUS: |
Mathias Nyman | d785404 | 2016-01-25 15:30:47 +0200 | [diff] [blame] | 1160 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SSP); |
| 1161 | max_packets = MAX_PACKET(512); |
| 1162 | break; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1163 | case USB_SPEED_SUPER: |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1164 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS); |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1165 | max_packets = MAX_PACKET(512); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1166 | break; |
| 1167 | case USB_SPEED_HIGH: |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1168 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_HS); |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1169 | max_packets = MAX_PACKET(64); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1170 | break; |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1171 | /* USB core guesses at a 64-byte max packet first for FS devices */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1172 | case USB_SPEED_FULL: |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1173 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_FS); |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1174 | max_packets = MAX_PACKET(64); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1175 | break; |
| 1176 | case USB_SPEED_LOW: |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1177 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS); |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1178 | max_packets = MAX_PACKET(8); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1179 | break; |
Greg Kroah-Hartman | 551cdbb | 2010-01-14 11:08:04 -0800 | [diff] [blame] | 1180 | case USB_SPEED_WIRELESS: |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1181 | xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); |
| 1182 | return -EINVAL; |
| 1183 | break; |
| 1184 | default: |
| 1185 | /* Speed was set earlier, this shouldn't happen. */ |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1186 | return -EINVAL; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1187 | } |
| 1188 | /* Find the root hub port this device is under */ |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1189 | port_num = xhci_find_real_port_number(xhci, udev); |
| 1190 | if (!port_num) |
| 1191 | return -EINVAL; |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1192 | slot_ctx->dev_info2 |= cpu_to_le32(ROOT_HUB_PORT(port_num)); |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1193 | /* Set the port number in the virtual_device to the faked port number */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1194 | for (top_dev = udev; top_dev->parent && top_dev->parent->parent; |
| 1195 | top_dev = top_dev->parent) |
| 1196 | /* Found device below root hub */; |
Sarah Sharp | fe30182 | 2011-09-02 11:05:41 -0700 | [diff] [blame] | 1197 | dev->fake_port = top_dev->portnum; |
Sarah Sharp | 6638175 | 2011-09-02 11:05:45 -0700 | [diff] [blame] | 1198 | dev->real_port = port_num; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1199 | xhci_dbg(xhci, "Set root hub portnum to %d\n", port_num); |
Sarah Sharp | fe30182 | 2011-09-02 11:05:41 -0700 | [diff] [blame] | 1200 | xhci_dbg(xhci, "Set fake root hub portnum to %d\n", dev->fake_port); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1201 | |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 1202 | /* Find the right bandwidth table that this device will be a part of. |
| 1203 | * If this is a full speed device attached directly to a root port (or a |
| 1204 | * decendent of one), it counts as a primary bandwidth domain, not a |
| 1205 | * secondary bandwidth domain under a TT. An xhci_tt_info structure |
| 1206 | * will never be created for the HS root hub. |
| 1207 | */ |
| 1208 | if (!udev->tt || !udev->tt->hub->parent) { |
| 1209 | dev->bw_table = &xhci->rh_bw[port_num - 1].bw_table; |
| 1210 | } else { |
| 1211 | struct xhci_root_port_bw_info *rh_bw; |
| 1212 | struct xhci_tt_bw_info *tt_bw; |
| 1213 | |
| 1214 | rh_bw = &xhci->rh_bw[port_num - 1]; |
| 1215 | /* Find the right TT. */ |
| 1216 | list_for_each_entry(tt_bw, &rh_bw->tts, tt_list) { |
| 1217 | if (tt_bw->slot_id != udev->tt->hub->slot_id) |
| 1218 | continue; |
| 1219 | |
| 1220 | if (!dev->udev->tt->multi || |
| 1221 | (udev->tt->multi && |
| 1222 | tt_bw->ttport == dev->udev->ttport)) { |
| 1223 | dev->bw_table = &tt_bw->bw_table; |
| 1224 | dev->tt_info = tt_bw; |
| 1225 | break; |
| 1226 | } |
| 1227 | } |
| 1228 | if (!dev->tt_info) |
| 1229 | xhci_warn(xhci, "WARN: Didn't find a matching TT\n"); |
| 1230 | } |
| 1231 | |
Sarah Sharp | aa1b13e | 2011-03-03 05:40:51 -0800 | [diff] [blame] | 1232 | /* Is this a LS/FS device under an external HS hub? */ |
| 1233 | if (udev->tt && udev->tt->hub->parent) { |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1234 | slot_ctx->tt_info = cpu_to_le32(udev->tt->hub->slot_id | |
| 1235 | (udev->ttport << 8)); |
Sarah Sharp | 07b6de1 | 2009-09-04 10:53:19 -0700 | [diff] [blame] | 1236 | if (udev->tt->multi) |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1237 | slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1238 | } |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1239 | xhci_dbg(xhci, "udev->tt = %p\n", udev->tt); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1240 | xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); |
| 1241 | |
| 1242 | /* Step 4 - ring already allocated */ |
| 1243 | /* Step 5 */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1244 | ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP)); |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1245 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1246 | /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */ |
Mathias Nyman | bd18fd5 | 2013-04-23 17:17:40 -0700 | [diff] [blame] | 1247 | ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3) | |
| 1248 | max_packets); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1249 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1250 | ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma | |
| 1251 | dev->eps[0].ring->cycle_state); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1252 | |
| 1253 | /* Steps 7 and 8 were done in xhci_alloc_virt_device() */ |
| 1254 | |
| 1255 | return 0; |
| 1256 | } |
| 1257 | |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1258 | /* |
| 1259 | * Convert interval expressed as 2^(bInterval - 1) == interval into |
| 1260 | * straight exponent value 2^n == interval. |
| 1261 | * |
| 1262 | */ |
| 1263 | static unsigned int xhci_parse_exponent_interval(struct usb_device *udev, |
| 1264 | struct usb_host_endpoint *ep) |
| 1265 | { |
| 1266 | unsigned int interval; |
| 1267 | |
| 1268 | interval = clamp_val(ep->desc.bInterval, 1, 16) - 1; |
| 1269 | if (interval != ep->desc.bInterval - 1) |
| 1270 | dev_warn(&udev->dev, |
Dmitry Torokhov | cd3c18b | 2011-05-31 14:37:23 -0700 | [diff] [blame] | 1271 | "ep %#x - rounding interval to %d %sframes\n", |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1272 | ep->desc.bEndpointAddress, |
Dmitry Torokhov | cd3c18b | 2011-05-31 14:37:23 -0700 | [diff] [blame] | 1273 | 1 << interval, |
| 1274 | udev->speed == USB_SPEED_FULL ? "" : "micro"); |
| 1275 | |
| 1276 | if (udev->speed == USB_SPEED_FULL) { |
| 1277 | /* |
| 1278 | * Full speed isoc endpoints specify interval in frames, |
| 1279 | * not microframes. We are using microframes everywhere, |
| 1280 | * so adjust accordingly. |
| 1281 | */ |
| 1282 | interval += 3; /* 1 frame = 2^3 uframes */ |
| 1283 | } |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1284 | |
| 1285 | return interval; |
| 1286 | } |
| 1287 | |
| 1288 | /* |
Sarah Sharp | 340a350 | 2012-02-13 14:42:11 -0800 | [diff] [blame] | 1289 | * Convert bInterval expressed in microframes (in 1-255 range) to exponent of |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1290 | * microframes, rounded down to nearest power of 2. |
| 1291 | */ |
Sarah Sharp | 340a350 | 2012-02-13 14:42:11 -0800 | [diff] [blame] | 1292 | static unsigned int xhci_microframes_to_exponent(struct usb_device *udev, |
| 1293 | struct usb_host_endpoint *ep, unsigned int desc_interval, |
| 1294 | unsigned int min_exponent, unsigned int max_exponent) |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1295 | { |
| 1296 | unsigned int interval; |
| 1297 | |
Sarah Sharp | 340a350 | 2012-02-13 14:42:11 -0800 | [diff] [blame] | 1298 | interval = fls(desc_interval) - 1; |
| 1299 | interval = clamp_val(interval, min_exponent, max_exponent); |
| 1300 | if ((1 << interval) != desc_interval) |
Mathias Nyman | a5da956 | 2015-11-24 13:09:57 +0200 | [diff] [blame] | 1301 | dev_dbg(&udev->dev, |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1302 | "ep %#x - rounding interval to %d microframes, ep desc says %d microframes\n", |
| 1303 | ep->desc.bEndpointAddress, |
| 1304 | 1 << interval, |
Sarah Sharp | 340a350 | 2012-02-13 14:42:11 -0800 | [diff] [blame] | 1305 | desc_interval); |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1306 | |
| 1307 | return interval; |
| 1308 | } |
| 1309 | |
Sarah Sharp | 340a350 | 2012-02-13 14:42:11 -0800 | [diff] [blame] | 1310 | static unsigned int xhci_parse_microframe_interval(struct usb_device *udev, |
| 1311 | struct usb_host_endpoint *ep) |
| 1312 | { |
Sarah Sharp | 55c1945 | 2012-12-17 14:12:35 -0800 | [diff] [blame] | 1313 | if (ep->desc.bInterval == 0) |
| 1314 | return 0; |
Sarah Sharp | 340a350 | 2012-02-13 14:42:11 -0800 | [diff] [blame] | 1315 | return xhci_microframes_to_exponent(udev, ep, |
| 1316 | ep->desc.bInterval, 0, 15); |
| 1317 | } |
| 1318 | |
| 1319 | |
| 1320 | static unsigned int xhci_parse_frame_interval(struct usb_device *udev, |
| 1321 | struct usb_host_endpoint *ep) |
| 1322 | { |
| 1323 | return xhci_microframes_to_exponent(udev, ep, |
| 1324 | ep->desc.bInterval * 8, 3, 10); |
| 1325 | } |
| 1326 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1327 | /* Return the polling or NAK interval. |
| 1328 | * |
| 1329 | * The polling interval is expressed in "microframes". If xHCI's Interval field |
| 1330 | * is set to N, it will service the endpoint every 2^(Interval)*125us. |
| 1331 | * |
| 1332 | * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval |
| 1333 | * is set to 0. |
| 1334 | */ |
Dmitry Torokhov | 575688e | 2011-03-20 02:15:16 -0700 | [diff] [blame] | 1335 | static unsigned int xhci_get_endpoint_interval(struct usb_device *udev, |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1336 | struct usb_host_endpoint *ep) |
| 1337 | { |
| 1338 | unsigned int interval = 0; |
| 1339 | |
| 1340 | switch (udev->speed) { |
| 1341 | case USB_SPEED_HIGH: |
| 1342 | /* Max NAK rate */ |
| 1343 | if (usb_endpoint_xfer_control(&ep->desc) || |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1344 | usb_endpoint_xfer_bulk(&ep->desc)) { |
Sarah Sharp | 340a350 | 2012-02-13 14:42:11 -0800 | [diff] [blame] | 1345 | interval = xhci_parse_microframe_interval(udev, ep); |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1346 | break; |
| 1347 | } |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1348 | /* Fall through - SS and HS isoc/int have same decoding */ |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1349 | |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 1350 | case USB_SPEED_SUPER_PLUS: |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1351 | case USB_SPEED_SUPER: |
| 1352 | if (usb_endpoint_xfer_int(&ep->desc) || |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1353 | usb_endpoint_xfer_isoc(&ep->desc)) { |
| 1354 | interval = xhci_parse_exponent_interval(udev, ep); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1355 | } |
| 1356 | break; |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1357 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1358 | case USB_SPEED_FULL: |
Sarah Sharp | b513d44 | 2011-05-13 13:10:01 -0700 | [diff] [blame] | 1359 | if (usb_endpoint_xfer_isoc(&ep->desc)) { |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1360 | interval = xhci_parse_exponent_interval(udev, ep); |
| 1361 | break; |
| 1362 | } |
| 1363 | /* |
Sarah Sharp | b513d44 | 2011-05-13 13:10:01 -0700 | [diff] [blame] | 1364 | * Fall through for interrupt endpoint interval decoding |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1365 | * since it uses the same rules as low speed interrupt |
| 1366 | * endpoints. |
| 1367 | */ |
| 1368 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1369 | case USB_SPEED_LOW: |
| 1370 | if (usb_endpoint_xfer_int(&ep->desc) || |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1371 | usb_endpoint_xfer_isoc(&ep->desc)) { |
| 1372 | |
| 1373 | interval = xhci_parse_frame_interval(udev, ep); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1374 | } |
| 1375 | break; |
Dmitry Torokhov | dfa49c4 | 2011-03-23 22:41:23 -0700 | [diff] [blame] | 1376 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1377 | default: |
| 1378 | BUG(); |
| 1379 | } |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1380 | return interval; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1381 | } |
| 1382 | |
Sarah Sharp | c30c791 | 2010-07-10 15:48:01 +0200 | [diff] [blame] | 1383 | /* The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps. |
Sarah Sharp | 1cf6224 | 2010-04-16 08:07:04 -0700 | [diff] [blame] | 1384 | * High speed endpoint descriptors can define "the number of additional |
| 1385 | * transaction opportunities per microframe", but that goes in the Max Burst |
| 1386 | * endpoint context field. |
| 1387 | */ |
Dmitry Torokhov | 575688e | 2011-03-20 02:15:16 -0700 | [diff] [blame] | 1388 | static u32 xhci_get_endpoint_mult(struct usb_device *udev, |
Sarah Sharp | 1cf6224 | 2010-04-16 08:07:04 -0700 | [diff] [blame] | 1389 | struct usb_host_endpoint *ep) |
| 1390 | { |
Mathias Nyman | 0caf6b3 | 2016-01-25 15:30:44 +0200 | [diff] [blame] | 1391 | if (udev->speed < USB_SPEED_SUPER || |
Sarah Sharp | c30c791 | 2010-07-10 15:48:01 +0200 | [diff] [blame] | 1392 | !usb_endpoint_xfer_isoc(&ep->desc)) |
Sarah Sharp | 1cf6224 | 2010-04-16 08:07:04 -0700 | [diff] [blame] | 1393 | return 0; |
Alan Stern | 842f169 | 2010-04-30 12:44:46 -0400 | [diff] [blame] | 1394 | return ep->ss_ep_comp.bmAttributes; |
Sarah Sharp | 1cf6224 | 2010-04-16 08:07:04 -0700 | [diff] [blame] | 1395 | } |
| 1396 | |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1397 | static u32 xhci_get_endpoint_max_burst(struct usb_device *udev, |
| 1398 | struct usb_host_endpoint *ep) |
| 1399 | { |
| 1400 | /* Super speed and Plus have max burst in ep companion desc */ |
| 1401 | if (udev->speed >= USB_SPEED_SUPER) |
| 1402 | return ep->ss_ep_comp.bMaxBurst; |
| 1403 | |
| 1404 | if (udev->speed == USB_SPEED_HIGH && |
| 1405 | (usb_endpoint_xfer_isoc(&ep->desc) || |
| 1406 | usb_endpoint_xfer_int(&ep->desc))) |
| 1407 | return (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11; |
| 1408 | |
| 1409 | return 0; |
| 1410 | } |
| 1411 | |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1412 | static u32 xhci_get_endpoint_type(struct usb_host_endpoint *ep) |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1413 | { |
| 1414 | int in; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1415 | |
| 1416 | in = usb_endpoint_dir_in(&ep->desc); |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1417 | |
| 1418 | if (usb_endpoint_xfer_control(&ep->desc)) |
| 1419 | return CTRL_EP; |
| 1420 | if (usb_endpoint_xfer_bulk(&ep->desc)) |
| 1421 | return in ? BULK_IN_EP : BULK_OUT_EP; |
| 1422 | if (usb_endpoint_xfer_isoc(&ep->desc)) |
| 1423 | return in ? ISOC_IN_EP : ISOC_OUT_EP; |
| 1424 | if (usb_endpoint_xfer_int(&ep->desc)) |
| 1425 | return in ? INT_IN_EP : INT_OUT_EP; |
| 1426 | return 0; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1427 | } |
| 1428 | |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1429 | /* Return the maximum endpoint service interval time (ESIT) payload. |
| 1430 | * Basically, this is the maxpacket size, multiplied by the burst size |
| 1431 | * and mult size. |
| 1432 | */ |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1433 | static u32 xhci_get_max_esit_payload(struct usb_device *udev, |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1434 | struct usb_host_endpoint *ep) |
| 1435 | { |
| 1436 | int max_burst; |
| 1437 | int max_packet; |
| 1438 | |
| 1439 | /* Only applies for interrupt or isochronous endpoints */ |
| 1440 | if (usb_endpoint_xfer_control(&ep->desc) || |
| 1441 | usb_endpoint_xfer_bulk(&ep->desc)) |
| 1442 | return 0; |
| 1443 | |
Mathias Nyman | 8ef8a9f | 2016-02-12 16:40:16 +0200 | [diff] [blame] | 1444 | /* SuperSpeedPlus Isoc ep sending over 48k per esit */ |
| 1445 | if ((udev->speed >= USB_SPEED_SUPER_PLUS) && |
| 1446 | USB_SS_SSP_ISOC_COMP(ep->ss_ep_comp.bmAttributes)) |
| 1447 | return le32_to_cpu(ep->ssp_isoc_ep_comp.dwBytesPerInterval); |
| 1448 | /* SuperSpeed or SuperSpeedPlus Isoc ep with less than 48k per esit */ |
| 1449 | else if (udev->speed >= USB_SPEED_SUPER) |
Sebastian Andrzej Siewior | 64b3c30 | 2011-04-11 20:19:12 +0200 | [diff] [blame] | 1450 | return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval); |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1451 | |
Kuninori Morimoto | 29cc889 | 2011-08-23 03:12:03 -0700 | [diff] [blame] | 1452 | max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)); |
| 1453 | max_burst = (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11; |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1454 | /* A 0 in max burst means 1 transfer per ESIT */ |
| 1455 | return max_packet * (max_burst + 1); |
| 1456 | } |
| 1457 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1458 | /* Set up an endpoint with one ring segment. Do not allocate stream rings. |
| 1459 | * Drivers will have to call usb_alloc_streams() to do that. |
| 1460 | */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1461 | int xhci_endpoint_init(struct xhci_hcd *xhci, |
| 1462 | struct xhci_virt_device *virt_dev, |
| 1463 | struct usb_device *udev, |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 1464 | struct usb_host_endpoint *ep, |
| 1465 | gfp_t mem_flags) |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1466 | { |
| 1467 | unsigned int ep_index; |
| 1468 | struct xhci_ep_ctx *ep_ctx; |
| 1469 | struct xhci_ring *ep_ring; |
| 1470 | unsigned int max_packet; |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1471 | enum xhci_ring_type ring_type; |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1472 | u32 max_esit_payload; |
Mathias Nyman | 17d65554 | 2013-04-24 17:24:58 +0300 | [diff] [blame] | 1473 | u32 endpoint_type; |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1474 | unsigned int max_burst; |
| 1475 | unsigned int interval; |
| 1476 | unsigned int mult; |
| 1477 | unsigned int avg_trb_len; |
| 1478 | unsigned int err_count = 0; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1479 | |
| 1480 | ep_index = xhci_get_endpoint_index(&ep->desc); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1481 | ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1482 | |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1483 | endpoint_type = xhci_get_endpoint_type(ep); |
Mathias Nyman | 17d65554 | 2013-04-24 17:24:58 +0300 | [diff] [blame] | 1484 | if (!endpoint_type) |
| 1485 | return -EINVAL; |
Mathias Nyman | 17d65554 | 2013-04-24 17:24:58 +0300 | [diff] [blame] | 1486 | |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1487 | ring_type = usb_endpoint_type(&ep->desc); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1488 | |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1489 | /* |
| 1490 | * Get values to fill the endpoint context, mostly from ep descriptor. |
| 1491 | * The average TRB buffer lengt for bulk endpoints is unclear as we |
| 1492 | * have no clue on scatter gather list entry size. For Isoc and Int, |
| 1493 | * set it to max available. See xHCI 1.1 spec 4.14.1.1 for details. |
| 1494 | */ |
| 1495 | max_esit_payload = xhci_get_max_esit_payload(udev, ep); |
| 1496 | interval = xhci_get_endpoint_interval(udev, ep); |
Roger Quadros | 853469d | 2017-04-07 17:57:12 +0300 | [diff] [blame] | 1497 | |
| 1498 | /* Periodic endpoint bInterval limit quirk */ |
| 1499 | if (usb_endpoint_xfer_int(&ep->desc) || |
| 1500 | usb_endpoint_xfer_isoc(&ep->desc)) { |
| 1501 | if ((xhci->quirks & XHCI_LIMIT_ENDPOINT_INTERVAL_7) && |
| 1502 | udev->speed >= USB_SPEED_HIGH && |
| 1503 | interval >= 7) { |
| 1504 | interval = 6; |
| 1505 | } |
| 1506 | } |
| 1507 | |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1508 | mult = xhci_get_endpoint_mult(udev, ep); |
| 1509 | max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)); |
| 1510 | max_burst = xhci_get_endpoint_max_burst(udev, ep); |
| 1511 | avg_trb_len = max_esit_payload; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1512 | |
| 1513 | /* FIXME dig Mult and streams info out of ep companion desc */ |
| 1514 | |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1515 | /* Allow 3 retries for everything but isoc, set CErr = 3 */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1516 | if (!usb_endpoint_xfer_isoc(&ep->desc)) |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1517 | err_count = 3; |
| 1518 | /* Some devices get this wrong */ |
| 1519 | if (usb_endpoint_xfer_bulk(&ep->desc) && udev->speed == USB_SPEED_HIGH) |
| 1520 | max_packet = 512; |
| 1521 | /* xHCI 1.0 and 1.1 indicates that ctrl ep avg TRB Length should be 8 */ |
Mathias Nyman | dca7794 | 2015-09-21 17:46:16 +0300 | [diff] [blame] | 1522 | if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version >= 0x100) |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1523 | avg_trb_len = 8; |
Mathias Nyman | 8ef8a9f | 2016-02-12 16:40:16 +0200 | [diff] [blame] | 1524 | /* xhci 1.1 with LEC support doesn't use mult field, use RsvdZ */ |
| 1525 | if ((xhci->hci_version > 0x100) && HCC2_LEC(xhci->hcc_params2)) |
| 1526 | mult = 0; |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1527 | |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 1528 | /* Set up the endpoint ring */ |
| 1529 | virt_dev->eps[ep_index].new_ring = |
| 1530 | xhci_ring_alloc(xhci, 2, 1, ring_type, max_packet, mem_flags); |
| 1531 | if (!virt_dev->eps[ep_index].new_ring) { |
| 1532 | /* Attempt to use the ring cache */ |
| 1533 | if (virt_dev->num_rings_cached == 0) |
| 1534 | return -ENOMEM; |
| 1535 | virt_dev->num_rings_cached--; |
| 1536 | virt_dev->eps[ep_index].new_ring = |
| 1537 | virt_dev->ring_cache[virt_dev->num_rings_cached]; |
| 1538 | virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL; |
| 1539 | xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring, |
| 1540 | 1, ring_type); |
| 1541 | } |
| 1542 | virt_dev->eps[ep_index].skip = false; |
| 1543 | ep_ring = virt_dev->eps[ep_index].new_ring; |
| 1544 | |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1545 | /* Fill the endpoint context */ |
Mathias Nyman | 8ef8a9f | 2016-02-12 16:40:16 +0200 | [diff] [blame] | 1546 | ep_ctx->ep_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) | |
| 1547 | EP_INTERVAL(interval) | |
Mathias Nyman | def4e6f | 2016-02-12 16:40:15 +0200 | [diff] [blame] | 1548 | EP_MULT(mult)); |
| 1549 | ep_ctx->ep_info2 = cpu_to_le32(EP_TYPE(endpoint_type) | |
| 1550 | MAX_PACKET(max_packet) | |
| 1551 | MAX_BURST(max_burst) | |
| 1552 | ERROR_COUNT(err_count)); |
| 1553 | ep_ctx->deq = cpu_to_le64(ep_ring->first_seg->dma | |
| 1554 | ep_ring->cycle_state); |
| 1555 | |
| 1556 | ep_ctx->tx_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) | |
| 1557 | EP_AVG_TRB_LENGTH(avg_trb_len)); |
Sarah Sharp | 9238f25 | 2010-04-16 08:07:27 -0700 | [diff] [blame] | 1558 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1559 | /* FIXME Debug endpoint context */ |
| 1560 | return 0; |
| 1561 | } |
| 1562 | |
| 1563 | void xhci_endpoint_zero(struct xhci_hcd *xhci, |
| 1564 | struct xhci_virt_device *virt_dev, |
| 1565 | struct usb_host_endpoint *ep) |
| 1566 | { |
| 1567 | unsigned int ep_index; |
| 1568 | struct xhci_ep_ctx *ep_ctx; |
| 1569 | |
| 1570 | ep_index = xhci_get_endpoint_index(&ep->desc); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1571 | ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1572 | |
| 1573 | ep_ctx->ep_info = 0; |
| 1574 | ep_ctx->ep_info2 = 0; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1575 | ep_ctx->deq = 0; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1576 | ep_ctx->tx_info = 0; |
| 1577 | /* Don't free the endpoint ring until the set interface or configuration |
| 1578 | * request succeeds. |
| 1579 | */ |
| 1580 | } |
| 1581 | |
Sarah Sharp | 9af5d71 | 2011-09-02 11:05:48 -0700 | [diff] [blame] | 1582 | void xhci_clear_endpoint_bw_info(struct xhci_bw_info *bw_info) |
| 1583 | { |
| 1584 | bw_info->ep_interval = 0; |
| 1585 | bw_info->mult = 0; |
| 1586 | bw_info->num_packets = 0; |
| 1587 | bw_info->max_packet_size = 0; |
| 1588 | bw_info->type = 0; |
| 1589 | bw_info->max_esit_payload = 0; |
| 1590 | } |
| 1591 | |
| 1592 | void xhci_update_bw_info(struct xhci_hcd *xhci, |
| 1593 | struct xhci_container_ctx *in_ctx, |
| 1594 | struct xhci_input_control_ctx *ctrl_ctx, |
| 1595 | struct xhci_virt_device *virt_dev) |
| 1596 | { |
| 1597 | struct xhci_bw_info *bw_info; |
| 1598 | struct xhci_ep_ctx *ep_ctx; |
| 1599 | unsigned int ep_type; |
| 1600 | int i; |
| 1601 | |
| 1602 | for (i = 1; i < 31; ++i) { |
| 1603 | bw_info = &virt_dev->eps[i].bw_info; |
| 1604 | |
| 1605 | /* We can't tell what endpoint type is being dropped, but |
| 1606 | * unconditionally clearing the bandwidth info for non-periodic |
| 1607 | * endpoints should be harmless because the info will never be |
| 1608 | * set in the first place. |
| 1609 | */ |
| 1610 | if (!EP_IS_ADDED(ctrl_ctx, i) && EP_IS_DROPPED(ctrl_ctx, i)) { |
| 1611 | /* Dropped endpoint */ |
| 1612 | xhci_clear_endpoint_bw_info(bw_info); |
| 1613 | continue; |
| 1614 | } |
| 1615 | |
| 1616 | if (EP_IS_ADDED(ctrl_ctx, i)) { |
| 1617 | ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, i); |
| 1618 | ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2)); |
| 1619 | |
| 1620 | /* Ignore non-periodic endpoints */ |
| 1621 | if (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP && |
| 1622 | ep_type != ISOC_IN_EP && |
| 1623 | ep_type != INT_IN_EP) |
| 1624 | continue; |
| 1625 | |
| 1626 | /* Added or changed endpoint */ |
| 1627 | bw_info->ep_interval = CTX_TO_EP_INTERVAL( |
| 1628 | le32_to_cpu(ep_ctx->ep_info)); |
Sarah Sharp | 170c026 | 2011-09-13 16:41:12 -0700 | [diff] [blame] | 1629 | /* Number of packets and mult are zero-based in the |
| 1630 | * input context, but we want one-based for the |
| 1631 | * interval table. |
Sarah Sharp | 9af5d71 | 2011-09-02 11:05:48 -0700 | [diff] [blame] | 1632 | */ |
Sarah Sharp | 170c026 | 2011-09-13 16:41:12 -0700 | [diff] [blame] | 1633 | bw_info->mult = CTX_TO_EP_MULT( |
| 1634 | le32_to_cpu(ep_ctx->ep_info)) + 1; |
Sarah Sharp | 9af5d71 | 2011-09-02 11:05:48 -0700 | [diff] [blame] | 1635 | bw_info->num_packets = CTX_TO_MAX_BURST( |
| 1636 | le32_to_cpu(ep_ctx->ep_info2)) + 1; |
| 1637 | bw_info->max_packet_size = MAX_PACKET_DECODED( |
| 1638 | le32_to_cpu(ep_ctx->ep_info2)); |
| 1639 | bw_info->type = ep_type; |
| 1640 | bw_info->max_esit_payload = CTX_TO_MAX_ESIT_PAYLOAD( |
| 1641 | le32_to_cpu(ep_ctx->tx_info)); |
| 1642 | } |
| 1643 | } |
| 1644 | } |
| 1645 | |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1646 | /* Copy output xhci_ep_ctx to the input xhci_ep_ctx copy. |
| 1647 | * Useful when you want to change one particular aspect of the endpoint and then |
| 1648 | * issue a configure endpoint command. |
| 1649 | */ |
| 1650 | void xhci_endpoint_copy(struct xhci_hcd *xhci, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1651 | struct xhci_container_ctx *in_ctx, |
| 1652 | struct xhci_container_ctx *out_ctx, |
| 1653 | unsigned int ep_index) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1654 | { |
| 1655 | struct xhci_ep_ctx *out_ep_ctx; |
| 1656 | struct xhci_ep_ctx *in_ep_ctx; |
| 1657 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1658 | out_ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
| 1659 | in_ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1660 | |
| 1661 | in_ep_ctx->ep_info = out_ep_ctx->ep_info; |
| 1662 | in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2; |
| 1663 | in_ep_ctx->deq = out_ep_ctx->deq; |
| 1664 | in_ep_ctx->tx_info = out_ep_ctx->tx_info; |
| 1665 | } |
| 1666 | |
| 1667 | /* Copy output xhci_slot_ctx to the input xhci_slot_ctx. |
| 1668 | * Useful when you want to change one particular aspect of the endpoint and then |
| 1669 | * issue a configure endpoint command. Only the context entries field matters, |
| 1670 | * but we'll copy the whole thing anyway. |
| 1671 | */ |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1672 | void xhci_slot_copy(struct xhci_hcd *xhci, |
| 1673 | struct xhci_container_ctx *in_ctx, |
| 1674 | struct xhci_container_ctx *out_ctx) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1675 | { |
| 1676 | struct xhci_slot_ctx *in_slot_ctx; |
| 1677 | struct xhci_slot_ctx *out_slot_ctx; |
| 1678 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1679 | in_slot_ctx = xhci_get_slot_ctx(xhci, in_ctx); |
| 1680 | out_slot_ctx = xhci_get_slot_ctx(xhci, out_ctx); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1681 | |
| 1682 | in_slot_ctx->dev_info = out_slot_ctx->dev_info; |
| 1683 | in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2; |
| 1684 | in_slot_ctx->tt_info = out_slot_ctx->tt_info; |
| 1685 | in_slot_ctx->dev_state = out_slot_ctx->dev_state; |
| 1686 | } |
| 1687 | |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1688 | /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */ |
| 1689 | static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags) |
| 1690 | { |
| 1691 | int i; |
| 1692 | struct device *dev = xhci_to_hcd(xhci)->self.controller; |
| 1693 | int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2); |
| 1694 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 1695 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 1696 | "Allocating %d scratchpad buffers", num_sp); |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1697 | |
| 1698 | if (!num_sp) |
| 1699 | return 0; |
| 1700 | |
| 1701 | xhci->scratchpad = kzalloc(sizeof(*xhci->scratchpad), flags); |
| 1702 | if (!xhci->scratchpad) |
| 1703 | goto fail_sp; |
| 1704 | |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 1705 | xhci->scratchpad->sp_array = dma_alloc_coherent(dev, |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1706 | num_sp * sizeof(u64), |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 1707 | &xhci->scratchpad->sp_dma, flags); |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1708 | if (!xhci->scratchpad->sp_array) |
| 1709 | goto fail_sp2; |
| 1710 | |
| 1711 | xhci->scratchpad->sp_buffers = kzalloc(sizeof(void *) * num_sp, flags); |
| 1712 | if (!xhci->scratchpad->sp_buffers) |
| 1713 | goto fail_sp3; |
| 1714 | |
| 1715 | xhci->scratchpad->sp_dma_buffers = |
| 1716 | kzalloc(sizeof(dma_addr_t) * num_sp, flags); |
| 1717 | |
| 1718 | if (!xhci->scratchpad->sp_dma_buffers) |
| 1719 | goto fail_sp4; |
| 1720 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1721 | xhci->dcbaa->dev_context_ptrs[0] = cpu_to_le64(xhci->scratchpad->sp_dma); |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1722 | for (i = 0; i < num_sp; i++) { |
| 1723 | dma_addr_t dma; |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 1724 | void *buf = dma_alloc_coherent(dev, xhci->page_size, &dma, |
| 1725 | flags); |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1726 | if (!buf) |
| 1727 | goto fail_sp5; |
| 1728 | |
| 1729 | xhci->scratchpad->sp_array[i] = dma; |
| 1730 | xhci->scratchpad->sp_buffers[i] = buf; |
| 1731 | xhci->scratchpad->sp_dma_buffers[i] = dma; |
| 1732 | } |
| 1733 | |
| 1734 | return 0; |
| 1735 | |
| 1736 | fail_sp5: |
| 1737 | for (i = i - 1; i >= 0; i--) { |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 1738 | dma_free_coherent(dev, xhci->page_size, |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1739 | xhci->scratchpad->sp_buffers[i], |
| 1740 | xhci->scratchpad->sp_dma_buffers[i]); |
| 1741 | } |
| 1742 | kfree(xhci->scratchpad->sp_dma_buffers); |
| 1743 | |
| 1744 | fail_sp4: |
| 1745 | kfree(xhci->scratchpad->sp_buffers); |
| 1746 | |
| 1747 | fail_sp3: |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 1748 | dma_free_coherent(dev, num_sp * sizeof(u64), |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1749 | xhci->scratchpad->sp_array, |
| 1750 | xhci->scratchpad->sp_dma); |
| 1751 | |
| 1752 | fail_sp2: |
| 1753 | kfree(xhci->scratchpad); |
| 1754 | xhci->scratchpad = NULL; |
| 1755 | |
| 1756 | fail_sp: |
| 1757 | return -ENOMEM; |
| 1758 | } |
| 1759 | |
| 1760 | static void scratchpad_free(struct xhci_hcd *xhci) |
| 1761 | { |
| 1762 | int num_sp; |
| 1763 | int i; |
Xenia Ragiadakou | 2a10004 | 2013-11-15 03:18:08 +0200 | [diff] [blame] | 1764 | struct device *dev = xhci_to_hcd(xhci)->self.controller; |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1765 | |
| 1766 | if (!xhci->scratchpad) |
| 1767 | return; |
| 1768 | |
| 1769 | num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2); |
| 1770 | |
| 1771 | for (i = 0; i < num_sp; i++) { |
Xenia Ragiadakou | 2a10004 | 2013-11-15 03:18:08 +0200 | [diff] [blame] | 1772 | dma_free_coherent(dev, xhci->page_size, |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1773 | xhci->scratchpad->sp_buffers[i], |
| 1774 | xhci->scratchpad->sp_dma_buffers[i]); |
| 1775 | } |
| 1776 | kfree(xhci->scratchpad->sp_dma_buffers); |
| 1777 | kfree(xhci->scratchpad->sp_buffers); |
Xenia Ragiadakou | 2a10004 | 2013-11-15 03:18:08 +0200 | [diff] [blame] | 1778 | dma_free_coherent(dev, num_sp * sizeof(u64), |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 1779 | xhci->scratchpad->sp_array, |
| 1780 | xhci->scratchpad->sp_dma); |
| 1781 | kfree(xhci->scratchpad); |
| 1782 | xhci->scratchpad = NULL; |
| 1783 | } |
| 1784 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1785 | struct xhci_command *xhci_alloc_command(struct xhci_hcd *xhci, |
Sarah Sharp | a1d78c1 | 2009-12-09 15:59:03 -0800 | [diff] [blame] | 1786 | bool allocate_in_ctx, bool allocate_completion, |
| 1787 | gfp_t mem_flags) |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1788 | { |
| 1789 | struct xhci_command *command; |
| 1790 | |
| 1791 | command = kzalloc(sizeof(*command), mem_flags); |
| 1792 | if (!command) |
| 1793 | return NULL; |
| 1794 | |
Sarah Sharp | a1d78c1 | 2009-12-09 15:59:03 -0800 | [diff] [blame] | 1795 | if (allocate_in_ctx) { |
| 1796 | command->in_ctx = |
| 1797 | xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, |
| 1798 | mem_flags); |
| 1799 | if (!command->in_ctx) { |
| 1800 | kfree(command); |
| 1801 | return NULL; |
| 1802 | } |
Julia Lawall | 06e1829 | 2009-11-21 12:51:47 +0100 | [diff] [blame] | 1803 | } |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1804 | |
| 1805 | if (allocate_completion) { |
| 1806 | command->completion = |
| 1807 | kzalloc(sizeof(struct completion), mem_flags); |
| 1808 | if (!command->completion) { |
| 1809 | xhci_free_container_ctx(xhci, command->in_ctx); |
Julia Lawall | 06e1829 | 2009-11-21 12:51:47 +0100 | [diff] [blame] | 1810 | kfree(command); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1811 | return NULL; |
| 1812 | } |
| 1813 | init_completion(command->completion); |
| 1814 | } |
| 1815 | |
| 1816 | command->status = 0; |
| 1817 | INIT_LIST_HEAD(&command->cmd_list); |
| 1818 | return command; |
| 1819 | } |
| 1820 | |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1821 | void xhci_urb_free_priv(struct urb_priv *urb_priv) |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1822 | { |
Andiry Xu | 2ffdea2 | 2011-09-02 11:05:57 -0700 | [diff] [blame] | 1823 | if (urb_priv) { |
| 1824 | kfree(urb_priv->td[0]); |
| 1825 | kfree(urb_priv); |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1826 | } |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1827 | } |
| 1828 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1829 | void xhci_free_command(struct xhci_hcd *xhci, |
| 1830 | struct xhci_command *command) |
| 1831 | { |
| 1832 | xhci_free_container_ctx(xhci, |
| 1833 | command->in_ctx); |
| 1834 | kfree(command->completion); |
| 1835 | kfree(command); |
| 1836 | } |
| 1837 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1838 | void xhci_mem_cleanup(struct xhci_hcd *xhci) |
| 1839 | { |
Xenia Ragiadakou | 2a10004 | 2013-11-15 03:18:08 +0200 | [diff] [blame] | 1840 | struct device *dev = xhci_to_hcd(xhci)->self.controller; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1841 | int size; |
Takashi Iwai | 32f1d2c | 2012-06-01 10:06:24 +0200 | [diff] [blame] | 1842 | int i, j, num_ports; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1843 | |
OGAWA Hirofumi | 799dfde | 2017-01-03 18:28:50 +0200 | [diff] [blame] | 1844 | cancel_delayed_work_sync(&xhci->cmd_timer); |
Mathias Nyman | c311e39 | 2014-05-08 19:26:03 +0300 | [diff] [blame] | 1845 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1846 | /* Free the Event Ring Segment Table and the actual Event Ring */ |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1847 | size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); |
| 1848 | if (xhci->erst.entries) |
Xenia Ragiadakou | 2a10004 | 2013-11-15 03:18:08 +0200 | [diff] [blame] | 1849 | dma_free_coherent(dev, size, |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1850 | xhci->erst.entries, xhci->erst.erst_dma_addr); |
| 1851 | xhci->erst.entries = NULL; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 1852 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed ERST"); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1853 | if (xhci->event_ring) |
| 1854 | xhci_ring_free(xhci, xhci->event_ring); |
| 1855 | xhci->event_ring = NULL; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 1856 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed event ring"); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1857 | |
Sarah Sharp | dbc3330 | 2012-05-08 07:32:03 -0700 | [diff] [blame] | 1858 | if (xhci->lpm_command) |
| 1859 | xhci_free_command(xhci, xhci->lpm_command); |
Al Cooper | 0eda06c | 2014-09-11 13:55:49 +0300 | [diff] [blame] | 1860 | xhci->lpm_command = NULL; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1861 | if (xhci->cmd_ring) |
| 1862 | xhci_ring_free(xhci, xhci->cmd_ring); |
| 1863 | xhci->cmd_ring = NULL; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 1864 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed command ring"); |
Mathias Nyman | c9aa1a2 | 2014-05-08 19:26:01 +0300 | [diff] [blame] | 1865 | xhci_cleanup_command_queue(xhci); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1866 | |
Mathias Nyman | 5dc2808 | 2014-05-28 23:51:13 +0300 | [diff] [blame] | 1867 | num_ports = HCS_MAX_PORTS(xhci->hcs_params1); |
Mathias Nyman | c207e7c | 2014-09-11 13:55:48 +0300 | [diff] [blame] | 1868 | for (i = 0; i < num_ports && xhci->rh_bw; i++) { |
Mathias Nyman | 5dc2808 | 2014-05-28 23:51:13 +0300 | [diff] [blame] | 1869 | struct xhci_interval_bw_table *bwt = &xhci->rh_bw[i].bw_table; |
| 1870 | for (j = 0; j < XHCI_MAX_INTERVAL; j++) { |
| 1871 | struct list_head *ep = &bwt->interval_bw[j].endpoints; |
| 1872 | while (!list_empty(ep)) |
| 1873 | list_del_init(ep->next); |
| 1874 | } |
| 1875 | } |
| 1876 | |
Mathias Nyman | 3bf5e74 | 2017-01-03 18:28:43 +0200 | [diff] [blame] | 1877 | for (i = HCS_MAX_SLOTS(xhci->hcs_params1); i > 0; i--) |
| 1878 | xhci_free_virt_devices_depth_first(xhci, i); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1879 | |
Julia Lawall | c7360b3 | 2015-09-13 14:14:58 +0200 | [diff] [blame] | 1880 | dma_pool_destroy(xhci->segment_pool); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 1881 | xhci->segment_pool = NULL; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 1882 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed segment pool"); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1883 | |
Julia Lawall | c7360b3 | 2015-09-13 14:14:58 +0200 | [diff] [blame] | 1884 | dma_pool_destroy(xhci->device_pool); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1885 | xhci->device_pool = NULL; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 1886 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed device context pool"); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1887 | |
Julia Lawall | c7360b3 | 2015-09-13 14:14:58 +0200 | [diff] [blame] | 1888 | dma_pool_destroy(xhci->small_streams_pool); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1889 | xhci->small_streams_pool = NULL; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 1890 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 1891 | "Freed small stream array pool"); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1892 | |
Julia Lawall | c7360b3 | 2015-09-13 14:14:58 +0200 | [diff] [blame] | 1893 | dma_pool_destroy(xhci->medium_streams_pool); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1894 | xhci->medium_streams_pool = NULL; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 1895 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 1896 | "Freed medium stream array pool"); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1897 | |
Sarah Sharp | a74588f | 2009-04-27 19:53:42 -0700 | [diff] [blame] | 1898 | if (xhci->dcbaa) |
Xenia Ragiadakou | 2a10004 | 2013-11-15 03:18:08 +0200 | [diff] [blame] | 1899 | dma_free_coherent(dev, sizeof(*xhci->dcbaa), |
Sarah Sharp | a74588f | 2009-04-27 19:53:42 -0700 | [diff] [blame] | 1900 | xhci->dcbaa, xhci->dcbaa->dma); |
| 1901 | xhci->dcbaa = NULL; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 1902 | |
Sarah Sharp | 5294bea | 2009-11-04 11:22:19 -0800 | [diff] [blame] | 1903 | scratchpad_free(xhci); |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 1904 | |
Vladimir Murzin | 88696ae | 2013-04-09 22:33:31 +0400 | [diff] [blame] | 1905 | if (!xhci->rh_bw) |
| 1906 | goto no_bw; |
| 1907 | |
Takashi Iwai | 32f1d2c | 2012-06-01 10:06:24 +0200 | [diff] [blame] | 1908 | for (i = 0; i < num_ports; i++) { |
| 1909 | struct xhci_tt_bw_info *tt, *n; |
| 1910 | list_for_each_entry_safe(tt, n, &xhci->rh_bw[i].tts, tt_list) { |
| 1911 | list_del(&tt->tt_list); |
| 1912 | kfree(tt); |
| 1913 | } |
Oliver Neukum | f8a9e72 | 2012-05-10 10:19:21 +0200 | [diff] [blame] | 1914 | } |
| 1915 | |
Vladimir Murzin | 88696ae | 2013-04-09 22:33:31 +0400 | [diff] [blame] | 1916 | no_bw: |
Hans de Goede | 127329d | 2013-11-07 08:19:45 +0100 | [diff] [blame] | 1917 | xhci->cmd_ring_reserved_trbs = 0; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 1918 | xhci->num_usb2_ports = 0; |
| 1919 | xhci->num_usb3_ports = 0; |
Oliver Neukum | f8a9e72 | 2012-05-10 10:19:21 +0200 | [diff] [blame] | 1920 | xhci->num_active_eps = 0; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 1921 | kfree(xhci->usb2_ports); |
| 1922 | kfree(xhci->usb3_ports); |
| 1923 | kfree(xhci->port_array); |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 1924 | kfree(xhci->rh_bw); |
Mathias Nyman | b630d4b | 2013-05-23 17:14:28 +0300 | [diff] [blame] | 1925 | kfree(xhci->ext_caps); |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 1926 | |
Lu Baolu | 7150406 | 2016-04-08 16:25:09 +0300 | [diff] [blame] | 1927 | xhci->usb2_ports = NULL; |
| 1928 | xhci->usb3_ports = NULL; |
| 1929 | xhci->port_array = NULL; |
| 1930 | xhci->rh_bw = NULL; |
| 1931 | xhci->ext_caps = NULL; |
| 1932 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1933 | xhci->page_size = 0; |
| 1934 | xhci->page_shift = 0; |
Sarah Sharp | 20b67cf | 2010-12-15 12:47:14 -0800 | [diff] [blame] | 1935 | xhci->bus_state[0].bus_suspended = 0; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 1936 | xhci->bus_state[1].bus_suspended = 0; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1937 | } |
| 1938 | |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 1939 | static int xhci_test_trb_in_td(struct xhci_hcd *xhci, |
| 1940 | struct xhci_segment *input_seg, |
| 1941 | union xhci_trb *start_trb, |
| 1942 | union xhci_trb *end_trb, |
| 1943 | dma_addr_t input_dma, |
| 1944 | struct xhci_segment *result_seg, |
| 1945 | char *test_name, int test_number) |
| 1946 | { |
| 1947 | unsigned long long start_dma; |
| 1948 | unsigned long long end_dma; |
| 1949 | struct xhci_segment *seg; |
| 1950 | |
| 1951 | start_dma = xhci_trb_virt_to_dma(input_seg, start_trb); |
| 1952 | end_dma = xhci_trb_virt_to_dma(input_seg, end_trb); |
| 1953 | |
Hans de Goede | cffb9be | 2014-08-20 16:41:51 +0300 | [diff] [blame] | 1954 | seg = trb_in_td(xhci, input_seg, start_trb, end_trb, input_dma, false); |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 1955 | if (seg != result_seg) { |
| 1956 | xhci_warn(xhci, "WARN: %s TRB math test %d failed!\n", |
| 1957 | test_name, test_number); |
| 1958 | xhci_warn(xhci, "Tested TRB math w/ seg %p and " |
| 1959 | "input DMA 0x%llx\n", |
| 1960 | input_seg, |
| 1961 | (unsigned long long) input_dma); |
| 1962 | xhci_warn(xhci, "starting TRB %p (0x%llx DMA), " |
| 1963 | "ending TRB %p (0x%llx DMA)\n", |
| 1964 | start_trb, start_dma, |
| 1965 | end_trb, end_dma); |
| 1966 | xhci_warn(xhci, "Expected seg %p, got seg %p\n", |
| 1967 | result_seg, seg); |
Hans de Goede | cffb9be | 2014-08-20 16:41:51 +0300 | [diff] [blame] | 1968 | trb_in_td(xhci, input_seg, start_trb, end_trb, input_dma, |
| 1969 | true); |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 1970 | return -1; |
| 1971 | } |
| 1972 | return 0; |
| 1973 | } |
| 1974 | |
| 1975 | /* TRB math checks for xhci_trb_in_td(), using the command and event rings. */ |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 1976 | static int xhci_check_trb_in_td_math(struct xhci_hcd *xhci) |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 1977 | { |
| 1978 | struct { |
| 1979 | dma_addr_t input_dma; |
| 1980 | struct xhci_segment *result_seg; |
| 1981 | } simple_test_vector [] = { |
| 1982 | /* A zeroed DMA field should fail */ |
| 1983 | { 0, NULL }, |
| 1984 | /* One TRB before the ring start should fail */ |
| 1985 | { xhci->event_ring->first_seg->dma - 16, NULL }, |
| 1986 | /* One byte before the ring start should fail */ |
| 1987 | { xhci->event_ring->first_seg->dma - 1, NULL }, |
| 1988 | /* Starting TRB should succeed */ |
| 1989 | { xhci->event_ring->first_seg->dma, xhci->event_ring->first_seg }, |
| 1990 | /* Ending TRB should succeed */ |
| 1991 | { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16, |
| 1992 | xhci->event_ring->first_seg }, |
| 1993 | /* One byte after the ring end should fail */ |
| 1994 | { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16 + 1, NULL }, |
| 1995 | /* One TRB after the ring end should fail */ |
| 1996 | { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT)*16, NULL }, |
| 1997 | /* An address of all ones should fail */ |
| 1998 | { (dma_addr_t) (~0), NULL }, |
| 1999 | }; |
| 2000 | struct { |
| 2001 | struct xhci_segment *input_seg; |
| 2002 | union xhci_trb *start_trb; |
| 2003 | union xhci_trb *end_trb; |
| 2004 | dma_addr_t input_dma; |
| 2005 | struct xhci_segment *result_seg; |
| 2006 | } complex_test_vector [] = { |
| 2007 | /* Test feeding a valid DMA address from a different ring */ |
| 2008 | { .input_seg = xhci->event_ring->first_seg, |
| 2009 | .start_trb = xhci->event_ring->first_seg->trbs, |
| 2010 | .end_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1], |
| 2011 | .input_dma = xhci->cmd_ring->first_seg->dma, |
| 2012 | .result_seg = NULL, |
| 2013 | }, |
| 2014 | /* Test feeding a valid end TRB from a different ring */ |
| 2015 | { .input_seg = xhci->event_ring->first_seg, |
| 2016 | .start_trb = xhci->event_ring->first_seg->trbs, |
| 2017 | .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1], |
| 2018 | .input_dma = xhci->cmd_ring->first_seg->dma, |
| 2019 | .result_seg = NULL, |
| 2020 | }, |
| 2021 | /* Test feeding a valid start and end TRB from a different ring */ |
| 2022 | { .input_seg = xhci->event_ring->first_seg, |
| 2023 | .start_trb = xhci->cmd_ring->first_seg->trbs, |
| 2024 | .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1], |
| 2025 | .input_dma = xhci->cmd_ring->first_seg->dma, |
| 2026 | .result_seg = NULL, |
| 2027 | }, |
| 2028 | /* TRB in this ring, but after this TD */ |
| 2029 | { .input_seg = xhci->event_ring->first_seg, |
| 2030 | .start_trb = &xhci->event_ring->first_seg->trbs[0], |
| 2031 | .end_trb = &xhci->event_ring->first_seg->trbs[3], |
| 2032 | .input_dma = xhci->event_ring->first_seg->dma + 4*16, |
| 2033 | .result_seg = NULL, |
| 2034 | }, |
| 2035 | /* TRB in this ring, but before this TD */ |
| 2036 | { .input_seg = xhci->event_ring->first_seg, |
| 2037 | .start_trb = &xhci->event_ring->first_seg->trbs[3], |
| 2038 | .end_trb = &xhci->event_ring->first_seg->trbs[6], |
| 2039 | .input_dma = xhci->event_ring->first_seg->dma + 2*16, |
| 2040 | .result_seg = NULL, |
| 2041 | }, |
| 2042 | /* TRB in this ring, but after this wrapped TD */ |
| 2043 | { .input_seg = xhci->event_ring->first_seg, |
| 2044 | .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3], |
| 2045 | .end_trb = &xhci->event_ring->first_seg->trbs[1], |
| 2046 | .input_dma = xhci->event_ring->first_seg->dma + 2*16, |
| 2047 | .result_seg = NULL, |
| 2048 | }, |
| 2049 | /* TRB in this ring, but before this wrapped TD */ |
| 2050 | { .input_seg = xhci->event_ring->first_seg, |
| 2051 | .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3], |
| 2052 | .end_trb = &xhci->event_ring->first_seg->trbs[1], |
| 2053 | .input_dma = xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 4)*16, |
| 2054 | .result_seg = NULL, |
| 2055 | }, |
| 2056 | /* TRB not in this ring, and we have a wrapped TD */ |
| 2057 | { .input_seg = xhci->event_ring->first_seg, |
| 2058 | .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3], |
| 2059 | .end_trb = &xhci->event_ring->first_seg->trbs[1], |
| 2060 | .input_dma = xhci->cmd_ring->first_seg->dma + 2*16, |
| 2061 | .result_seg = NULL, |
| 2062 | }, |
| 2063 | }; |
| 2064 | |
| 2065 | unsigned int num_tests; |
| 2066 | int i, ret; |
| 2067 | |
Kulikov Vasiliy | e10fa47 | 2010-06-28 15:55:46 +0400 | [diff] [blame] | 2068 | num_tests = ARRAY_SIZE(simple_test_vector); |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 2069 | for (i = 0; i < num_tests; i++) { |
| 2070 | ret = xhci_test_trb_in_td(xhci, |
| 2071 | xhci->event_ring->first_seg, |
| 2072 | xhci->event_ring->first_seg->trbs, |
| 2073 | &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1], |
| 2074 | simple_test_vector[i].input_dma, |
| 2075 | simple_test_vector[i].result_seg, |
| 2076 | "Simple", i); |
| 2077 | if (ret < 0) |
| 2078 | return ret; |
| 2079 | } |
| 2080 | |
Kulikov Vasiliy | e10fa47 | 2010-06-28 15:55:46 +0400 | [diff] [blame] | 2081 | num_tests = ARRAY_SIZE(complex_test_vector); |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 2082 | for (i = 0; i < num_tests; i++) { |
| 2083 | ret = xhci_test_trb_in_td(xhci, |
| 2084 | complex_test_vector[i].input_seg, |
| 2085 | complex_test_vector[i].start_trb, |
| 2086 | complex_test_vector[i].end_trb, |
| 2087 | complex_test_vector[i].input_dma, |
| 2088 | complex_test_vector[i].result_seg, |
| 2089 | "Complex", i); |
| 2090 | if (ret < 0) |
| 2091 | return ret; |
| 2092 | } |
| 2093 | xhci_dbg(xhci, "TRB math tests passed.\n"); |
| 2094 | return 0; |
| 2095 | } |
| 2096 | |
Sarah Sharp | 257d585 | 2010-07-29 22:12:56 -0700 | [diff] [blame] | 2097 | static void xhci_set_hc_event_deq(struct xhci_hcd *xhci) |
| 2098 | { |
| 2099 | u64 temp; |
| 2100 | dma_addr_t deq; |
| 2101 | |
| 2102 | deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, |
| 2103 | xhci->event_ring->dequeue); |
| 2104 | if (deq == 0 && !in_interrupt()) |
| 2105 | xhci_warn(xhci, "WARN something wrong with SW event ring " |
| 2106 | "dequeue ptr.\n"); |
| 2107 | /* Update HC event ring dequeue pointer */ |
Sarah Sharp | f7b2e40 | 2014-01-30 13:27:49 -0800 | [diff] [blame] | 2108 | temp = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
Sarah Sharp | 257d585 | 2010-07-29 22:12:56 -0700 | [diff] [blame] | 2109 | temp &= ERST_PTR_MASK; |
| 2110 | /* Don't clear the EHB bit (which is RW1C) because |
| 2111 | * there might be more events to service. |
| 2112 | */ |
| 2113 | temp &= ~ERST_EHB; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2114 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2115 | "// Write event ring dequeue pointer, " |
| 2116 | "preserving EHB bit"); |
Sarah Sharp | 477632d | 2014-01-29 14:02:00 -0800 | [diff] [blame] | 2117 | xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp, |
Sarah Sharp | 257d585 | 2010-07-29 22:12:56 -0700 | [diff] [blame] | 2118 | &xhci->ir_set->erst_dequeue); |
| 2119 | } |
| 2120 | |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2121 | static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports, |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2122 | __le32 __iomem *addr, int max_caps) |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2123 | { |
| 2124 | u32 temp, port_offset, port_count; |
| 2125 | int i; |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2126 | u8 major_revision; |
Mathias Nyman | 4718909 | 2015-10-01 18:40:34 +0300 | [diff] [blame] | 2127 | struct xhci_hub *rhub; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2128 | |
Mathias Nyman | 4718909 | 2015-10-01 18:40:34 +0300 | [diff] [blame] | 2129 | temp = readl(addr); |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2130 | major_revision = XHCI_EXT_PORT_MAJOR(temp); |
Mathias Nyman | 4718909 | 2015-10-01 18:40:34 +0300 | [diff] [blame] | 2131 | |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2132 | if (major_revision == 0x03) { |
Mathias Nyman | 4718909 | 2015-10-01 18:40:34 +0300 | [diff] [blame] | 2133 | rhub = &xhci->usb3_rhub; |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2134 | } else if (major_revision <= 0x02) { |
Mathias Nyman | 4718909 | 2015-10-01 18:40:34 +0300 | [diff] [blame] | 2135 | rhub = &xhci->usb2_rhub; |
| 2136 | } else { |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2137 | xhci_warn(xhci, "Ignoring unknown port speed, " |
| 2138 | "Ext Cap %p, revision = 0x%x\n", |
| 2139 | addr, major_revision); |
| 2140 | /* Ignoring port protocol we can't understand. FIXME */ |
| 2141 | return; |
| 2142 | } |
Mathias Nyman | 4718909 | 2015-10-01 18:40:34 +0300 | [diff] [blame] | 2143 | rhub->maj_rev = XHCI_EXT_PORT_MAJOR(temp); |
| 2144 | rhub->min_rev = XHCI_EXT_PORT_MINOR(temp); |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2145 | |
| 2146 | /* Port offset and count in the third dword, see section 7.2 */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 2147 | temp = readl(addr + 2); |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2148 | port_offset = XHCI_EXT_PORT_OFF(temp); |
| 2149 | port_count = XHCI_EXT_PORT_COUNT(temp); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2150 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2151 | "Ext Cap %p, port offset = %u, " |
| 2152 | "count = %u, revision = 0x%x", |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2153 | addr, port_offset, port_count, major_revision); |
| 2154 | /* Port count includes the current port offset */ |
| 2155 | if (port_offset == 0 || (port_offset + port_count - 1) > num_ports) |
| 2156 | /* WTF? "Valid values are ‘1’ to MaxPorts" */ |
| 2157 | return; |
Andiry Xu | fc71ff7 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 2158 | |
Mathias Nyman | 4718909 | 2015-10-01 18:40:34 +0300 | [diff] [blame] | 2159 | rhub->psi_count = XHCI_EXT_PORT_PSIC(temp); |
| 2160 | if (rhub->psi_count) { |
| 2161 | rhub->psi = kcalloc(rhub->psi_count, sizeof(*rhub->psi), |
| 2162 | GFP_KERNEL); |
| 2163 | if (!rhub->psi) |
| 2164 | rhub->psi_count = 0; |
| 2165 | |
| 2166 | rhub->psi_uid_count++; |
| 2167 | for (i = 0; i < rhub->psi_count; i++) { |
| 2168 | rhub->psi[i] = readl(addr + 4 + i); |
| 2169 | |
| 2170 | /* count unique ID values, two consecutive entries can |
| 2171 | * have the same ID if link is assymetric |
| 2172 | */ |
| 2173 | if (i && (XHCI_EXT_PORT_PSIV(rhub->psi[i]) != |
| 2174 | XHCI_EXT_PORT_PSIV(rhub->psi[i - 1]))) |
| 2175 | rhub->psi_uid_count++; |
| 2176 | |
| 2177 | xhci_dbg(xhci, "PSIV:%d PSIE:%d PLT:%d PFD:%d LP:%d PSIM:%d\n", |
| 2178 | XHCI_EXT_PORT_PSIV(rhub->psi[i]), |
| 2179 | XHCI_EXT_PORT_PSIE(rhub->psi[i]), |
| 2180 | XHCI_EXT_PORT_PLT(rhub->psi[i]), |
| 2181 | XHCI_EXT_PORT_PFD(rhub->psi[i]), |
| 2182 | XHCI_EXT_PORT_LP(rhub->psi[i]), |
| 2183 | XHCI_EXT_PORT_PSIM(rhub->psi[i])); |
| 2184 | } |
| 2185 | } |
Mathias Nyman | b630d4b | 2013-05-23 17:14:28 +0300 | [diff] [blame] | 2186 | /* cache usb2 port capabilities */ |
| 2187 | if (major_revision < 0x03 && xhci->num_ext_caps < max_caps) |
| 2188 | xhci->ext_caps[xhci->num_ext_caps++] = temp; |
| 2189 | |
Andiry Xu | fc71ff7 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 2190 | /* Check the host's USB2 LPM capability */ |
| 2191 | if ((xhci->hci_version == 0x96) && (major_revision != 0x03) && |
| 2192 | (temp & XHCI_L1C)) { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2193 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2194 | "xHCI 0.96: support USB2 software lpm"); |
Andiry Xu | fc71ff7 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 2195 | xhci->sw_lpm_support = 1; |
| 2196 | } |
| 2197 | |
| 2198 | if ((xhci->hci_version >= 0x100) && (major_revision != 0x03)) { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2199 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2200 | "xHCI 1.0: support USB2 software lpm"); |
Andiry Xu | fc71ff7 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 2201 | xhci->sw_lpm_support = 1; |
| 2202 | if (temp & XHCI_HLC) { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2203 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2204 | "xHCI 1.0: support USB2 hardware lpm"); |
Andiry Xu | fc71ff7 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 2205 | xhci->hw_lpm_support = 1; |
| 2206 | } |
| 2207 | } |
| 2208 | |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2209 | port_offset--; |
| 2210 | for (i = port_offset; i < (port_offset + port_count); i++) { |
| 2211 | /* Duplicate entry. Ignore the port if the revisions differ. */ |
| 2212 | if (xhci->port_array[i] != 0) { |
| 2213 | xhci_warn(xhci, "Duplicate port entry, Ext Cap %p," |
| 2214 | " port %u\n", addr, i); |
| 2215 | xhci_warn(xhci, "Port was marked as USB %u, " |
| 2216 | "duplicated as USB %u\n", |
| 2217 | xhci->port_array[i], major_revision); |
| 2218 | /* Only adjust the roothub port counts if we haven't |
| 2219 | * found a similar duplicate. |
| 2220 | */ |
| 2221 | if (xhci->port_array[i] != major_revision && |
Dan Carpenter | 22e0487 | 2011-03-17 22:39:49 +0300 | [diff] [blame] | 2222 | xhci->port_array[i] != DUPLICATE_ENTRY) { |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2223 | if (xhci->port_array[i] == 0x03) |
| 2224 | xhci->num_usb3_ports--; |
| 2225 | else |
| 2226 | xhci->num_usb2_ports--; |
Dan Carpenter | 22e0487 | 2011-03-17 22:39:49 +0300 | [diff] [blame] | 2227 | xhci->port_array[i] = DUPLICATE_ENTRY; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2228 | } |
| 2229 | /* FIXME: Should we disable the port? */ |
Sarah Sharp | f8bbeab | 2010-12-09 10:29:00 -0800 | [diff] [blame] | 2230 | continue; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2231 | } |
| 2232 | xhci->port_array[i] = major_revision; |
| 2233 | if (major_revision == 0x03) |
| 2234 | xhci->num_usb3_ports++; |
| 2235 | else |
| 2236 | xhci->num_usb2_ports++; |
| 2237 | } |
| 2238 | /* FIXME: Should we disable ports not in the Extended Capabilities? */ |
| 2239 | } |
| 2240 | |
| 2241 | /* |
| 2242 | * Scan the Extended Capabilities for the "Supported Protocol Capabilities" that |
| 2243 | * specify what speeds each port is supposed to be. We can't count on the port |
| 2244 | * speed bits in the PORTSC register being correct until a device is connected, |
| 2245 | * but we need to set up the two fake roothubs with the correct number of USB |
| 2246 | * 3.0 and USB 2.0 ports at host controller initialization time. |
| 2247 | */ |
| 2248 | static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags) |
| 2249 | { |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2250 | void __iomem *base; |
| 2251 | u32 offset; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2252 | unsigned int num_ports; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2253 | int i, j, port_index; |
Mathias Nyman | b630d4b | 2013-05-23 17:14:28 +0300 | [diff] [blame] | 2254 | int cap_count = 0; |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2255 | u32 cap_start; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2256 | |
| 2257 | num_ports = HCS_MAX_PORTS(xhci->hcs_params1); |
| 2258 | xhci->port_array = kzalloc(sizeof(*xhci->port_array)*num_ports, flags); |
| 2259 | if (!xhci->port_array) |
| 2260 | return -ENOMEM; |
| 2261 | |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 2262 | xhci->rh_bw = kzalloc(sizeof(*xhci->rh_bw)*num_ports, flags); |
| 2263 | if (!xhci->rh_bw) |
| 2264 | return -ENOMEM; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2265 | for (i = 0; i < num_ports; i++) { |
| 2266 | struct xhci_interval_bw_table *bw_table; |
| 2267 | |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 2268 | INIT_LIST_HEAD(&xhci->rh_bw[i].tts); |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2269 | bw_table = &xhci->rh_bw[i].bw_table; |
| 2270 | for (j = 0; j < XHCI_MAX_INTERVAL; j++) |
| 2271 | INIT_LIST_HEAD(&bw_table->interval_bw[j].endpoints); |
| 2272 | } |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2273 | base = &xhci->cap_regs->hc_capbase; |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 2274 | |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2275 | cap_start = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_PROTOCOL); |
| 2276 | if (!cap_start) { |
| 2277 | xhci_err(xhci, "No Extended Capability registers, unable to set up roothub\n"); |
| 2278 | return -ENODEV; |
| 2279 | } |
Mathias Nyman | b630d4b | 2013-05-23 17:14:28 +0300 | [diff] [blame] | 2280 | |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2281 | offset = cap_start; |
Mathias Nyman | b630d4b | 2013-05-23 17:14:28 +0300 | [diff] [blame] | 2282 | /* count extended protocol capability entries for later caching */ |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2283 | while (offset) { |
| 2284 | cap_count++; |
| 2285 | offset = xhci_find_next_ext_cap(base, offset, |
| 2286 | XHCI_EXT_CAPS_PROTOCOL); |
| 2287 | } |
Mathias Nyman | b630d4b | 2013-05-23 17:14:28 +0300 | [diff] [blame] | 2288 | |
| 2289 | xhci->ext_caps = kzalloc(sizeof(*xhci->ext_caps) * cap_count, flags); |
| 2290 | if (!xhci->ext_caps) |
| 2291 | return -ENOMEM; |
| 2292 | |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2293 | offset = cap_start; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2294 | |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2295 | while (offset) { |
| 2296 | xhci_add_in_port(xhci, num_ports, base + offset, cap_count); |
| 2297 | if (xhci->num_usb2_ports + xhci->num_usb3_ports == num_ports) |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2298 | break; |
Mathias Nyman | d5ddcdf | 2015-11-24 13:09:58 +0200 | [diff] [blame] | 2299 | offset = xhci_find_next_ext_cap(base, offset, |
| 2300 | XHCI_EXT_CAPS_PROTOCOL); |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2301 | } |
| 2302 | |
| 2303 | if (xhci->num_usb2_ports == 0 && xhci->num_usb3_ports == 0) { |
| 2304 | xhci_warn(xhci, "No ports on the roothubs?\n"); |
| 2305 | return -ENODEV; |
| 2306 | } |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2307 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2308 | "Found %u USB 2.0 ports and %u USB 3.0 ports.", |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2309 | xhci->num_usb2_ports, xhci->num_usb3_ports); |
Sarah Sharp | d30b2a2 | 2010-11-23 10:42:22 -0800 | [diff] [blame] | 2310 | |
| 2311 | /* Place limits on the number of roothub ports so that the hub |
| 2312 | * descriptors aren't longer than the USB core will allocate. |
| 2313 | */ |
| 2314 | if (xhci->num_usb3_ports > 15) { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2315 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2316 | "Limiting USB 3.0 roothub ports to 15."); |
Sarah Sharp | d30b2a2 | 2010-11-23 10:42:22 -0800 | [diff] [blame] | 2317 | xhci->num_usb3_ports = 15; |
| 2318 | } |
| 2319 | if (xhci->num_usb2_ports > USB_MAXCHILDREN) { |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2320 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2321 | "Limiting USB 2.0 roothub ports to %u.", |
Sarah Sharp | d30b2a2 | 2010-11-23 10:42:22 -0800 | [diff] [blame] | 2322 | USB_MAXCHILDREN); |
| 2323 | xhci->num_usb2_ports = USB_MAXCHILDREN; |
| 2324 | } |
| 2325 | |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2326 | /* |
| 2327 | * Note we could have all USB 3.0 ports, or all USB 2.0 ports. |
| 2328 | * Not sure how the USB core will handle a hub with no ports... |
| 2329 | */ |
| 2330 | if (xhci->num_usb2_ports) { |
| 2331 | xhci->usb2_ports = kmalloc(sizeof(*xhci->usb2_ports)* |
| 2332 | xhci->num_usb2_ports, flags); |
| 2333 | if (!xhci->usb2_ports) |
| 2334 | return -ENOMEM; |
| 2335 | |
| 2336 | port_index = 0; |
Sarah Sharp | f8bbeab | 2010-12-09 10:29:00 -0800 | [diff] [blame] | 2337 | for (i = 0; i < num_ports; i++) { |
| 2338 | if (xhci->port_array[i] == 0x03 || |
| 2339 | xhci->port_array[i] == 0 || |
Dan Carpenter | 22e0487 | 2011-03-17 22:39:49 +0300 | [diff] [blame] | 2340 | xhci->port_array[i] == DUPLICATE_ENTRY) |
Sarah Sharp | f8bbeab | 2010-12-09 10:29:00 -0800 | [diff] [blame] | 2341 | continue; |
| 2342 | |
| 2343 | xhci->usb2_ports[port_index] = |
| 2344 | &xhci->op_regs->port_status_base + |
| 2345 | NUM_PORT_REGS*i; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2346 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2347 | "USB 2.0 port at index %u, " |
| 2348 | "addr = %p", i, |
Sarah Sharp | f8bbeab | 2010-12-09 10:29:00 -0800 | [diff] [blame] | 2349 | xhci->usb2_ports[port_index]); |
| 2350 | port_index++; |
Sarah Sharp | d30b2a2 | 2010-11-23 10:42:22 -0800 | [diff] [blame] | 2351 | if (port_index == xhci->num_usb2_ports) |
| 2352 | break; |
Sarah Sharp | f8bbeab | 2010-12-09 10:29:00 -0800 | [diff] [blame] | 2353 | } |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2354 | } |
| 2355 | if (xhci->num_usb3_ports) { |
| 2356 | xhci->usb3_ports = kmalloc(sizeof(*xhci->usb3_ports)* |
| 2357 | xhci->num_usb3_ports, flags); |
| 2358 | if (!xhci->usb3_ports) |
| 2359 | return -ENOMEM; |
| 2360 | |
| 2361 | port_index = 0; |
| 2362 | for (i = 0; i < num_ports; i++) |
| 2363 | if (xhci->port_array[i] == 0x03) { |
| 2364 | xhci->usb3_ports[port_index] = |
| 2365 | &xhci->op_regs->port_status_base + |
| 2366 | NUM_PORT_REGS*i; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2367 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2368 | "USB 3.0 port at index %u, " |
| 2369 | "addr = %p", i, |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2370 | xhci->usb3_ports[port_index]); |
| 2371 | port_index++; |
Sarah Sharp | d30b2a2 | 2010-11-23 10:42:22 -0800 | [diff] [blame] | 2372 | if (port_index == xhci->num_usb3_ports) |
| 2373 | break; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2374 | } |
| 2375 | } |
| 2376 | return 0; |
| 2377 | } |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 2378 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2379 | int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) |
| 2380 | { |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2381 | dma_addr_t dma; |
| 2382 | struct device *dev = xhci_to_hcd(xhci)->self.controller; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2383 | unsigned int val, val2; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 2384 | u64 val_64; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2385 | struct xhci_segment *seg; |
Sarah Sharp | 623bef9 | 2011-11-11 14:57:33 -0800 | [diff] [blame] | 2386 | u32 page_size, temp; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2387 | int i; |
| 2388 | |
Mathias Nyman | c9aa1a2 | 2014-05-08 19:26:01 +0300 | [diff] [blame] | 2389 | INIT_LIST_HEAD(&xhci->cmd_list); |
Sergio Aguirre | 331de00 | 2013-04-04 10:32:13 -0700 | [diff] [blame] | 2390 | |
OGAWA Hirofumi | 799dfde | 2017-01-03 18:28:50 +0200 | [diff] [blame] | 2391 | /* init command timeout work */ |
| 2392 | INIT_DELAYED_WORK(&xhci->cmd_timer, xhci_handle_command_timeout); |
OGAWA Hirofumi | 63d92d1 | 2017-01-03 18:28:51 +0200 | [diff] [blame] | 2393 | init_completion(&xhci->cmd_ring_stop_completion); |
Mathias Nyman | cc8e4fc | 2015-09-21 17:46:17 +0300 | [diff] [blame] | 2394 | |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 2395 | page_size = readl(&xhci->op_regs->page_size); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2396 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2397 | "Supported page size register = 0x%x", page_size); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2398 | for (i = 0; i < 16; i++) { |
| 2399 | if ((0x1 & page_size) != 0) |
| 2400 | break; |
| 2401 | page_size = page_size >> 1; |
| 2402 | } |
| 2403 | if (i < 16) |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2404 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2405 | "Supported page size of %iK", (1 << (i+12)) / 1024); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2406 | else |
| 2407 | xhci_warn(xhci, "WARN: no supported page size\n"); |
| 2408 | /* Use 4K pages, since that's common and the minimum the HC supports */ |
| 2409 | xhci->page_shift = 12; |
| 2410 | xhci->page_size = 1 << xhci->page_shift; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2411 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2412 | "HCD page size set to %iK", xhci->page_size / 1024); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2413 | |
| 2414 | /* |
| 2415 | * Program the Number of Device Slots Enabled field in the CONFIG |
| 2416 | * register with the max value of slots the HC can handle. |
| 2417 | */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 2418 | val = HCS_MAX_SLOTS(readl(&xhci->cap_regs->hcs_params1)); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2419 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2420 | "// xHC can handle at most %d device slots.", val); |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 2421 | val2 = readl(&xhci->op_regs->config_reg); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2422 | val |= (val2 & ~HCS_SLOTS_MASK); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2423 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2424 | "// Setting Max device slots reg = 0x%x.", val); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 2425 | writel(val, &xhci->op_regs->config_reg); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2426 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2427 | /* |
Sarah Sharp | a74588f | 2009-04-27 19:53:42 -0700 | [diff] [blame] | 2428 | * Section 5.4.8 - doorbell array must be |
| 2429 | * "physically contiguous and 64-byte (cache line) aligned". |
| 2430 | */ |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 2431 | xhci->dcbaa = dma_alloc_coherent(dev, sizeof(*xhci->dcbaa), &dma, |
Dan Carpenter | 6db5215 | 2016-11-10 22:33:17 +0300 | [diff] [blame] | 2432 | flags); |
Sarah Sharp | a74588f | 2009-04-27 19:53:42 -0700 | [diff] [blame] | 2433 | if (!xhci->dcbaa) |
| 2434 | goto fail; |
| 2435 | memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa)); |
| 2436 | xhci->dcbaa->dma = dma; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2437 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2438 | "// Device context base array address = 0x%llx (DMA), %p (virt)", |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 2439 | (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa); |
Sarah Sharp | 477632d | 2014-01-29 14:02:00 -0800 | [diff] [blame] | 2440 | xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr); |
Sarah Sharp | a74588f | 2009-04-27 19:53:42 -0700 | [diff] [blame] | 2441 | |
| 2442 | /* |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2443 | * Initialize the ring segment pool. The ring must be a contiguous |
| 2444 | * structure comprised of TRBs. The TRBs must be 16 byte aligned, |
Hans de Goede | 84c1e40 | 2013-11-05 15:50:03 +0100 | [diff] [blame] | 2445 | * however, the command ring segment needs 64-byte aligned segments |
| 2446 | * and our use of dma addresses in the trb_address_map radix tree needs |
| 2447 | * TRB_SEGMENT_SIZE alignment, so we pick the greater alignment need. |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2448 | */ |
| 2449 | xhci->segment_pool = dma_pool_create("xHCI ring segments", dev, |
Hans de Goede | 84c1e40 | 2013-11-05 15:50:03 +0100 | [diff] [blame] | 2450 | TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2451 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 2452 | /* See Table 46 and Note on Figure 55 */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 2453 | xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev, |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2454 | 2112, 64, xhci->page_size); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 2455 | if (!xhci->segment_pool || !xhci->device_pool) |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2456 | goto fail; |
| 2457 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 2458 | /* Linear stream context arrays don't have any boundary restrictions, |
| 2459 | * and only need to be 16-byte aligned. |
| 2460 | */ |
| 2461 | xhci->small_streams_pool = |
| 2462 | dma_pool_create("xHCI 256 byte stream ctx arrays", |
| 2463 | dev, SMALL_STREAM_ARRAY_SIZE, 16, 0); |
| 2464 | xhci->medium_streams_pool = |
| 2465 | dma_pool_create("xHCI 1KB stream ctx arrays", |
| 2466 | dev, MEDIUM_STREAM_ARRAY_SIZE, 16, 0); |
| 2467 | /* Any stream context array bigger than MEDIUM_STREAM_ARRAY_SIZE |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 2468 | * will be allocated with dma_alloc_coherent() |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 2469 | */ |
| 2470 | |
| 2471 | if (!xhci->small_streams_pool || !xhci->medium_streams_pool) |
| 2472 | goto fail; |
| 2473 | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2474 | /* Set up the command ring to have one segments for now. */ |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 2475 | xhci->cmd_ring = xhci_ring_alloc(xhci, 1, 1, TYPE_COMMAND, 0, flags); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2476 | if (!xhci->cmd_ring) |
| 2477 | goto fail; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2478 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2479 | "Allocated command ring at %p", xhci->cmd_ring); |
| 2480 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "First segment DMA is 0x%llx", |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 2481 | (unsigned long long)xhci->cmd_ring->first_seg->dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2482 | |
| 2483 | /* Set the address in the Command Ring Control register */ |
Sarah Sharp | f7b2e40 | 2014-01-30 13:27:49 -0800 | [diff] [blame] | 2484 | val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 2485 | val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) | |
| 2486 | (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) | |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2487 | xhci->cmd_ring->cycle_state; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2488 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
Peter Chen | 91cd8f9 | 2017-04-19 16:55:52 +0300 | [diff] [blame] | 2489 | "// Setting command ring address to 0x%016llx", val_64); |
Sarah Sharp | 477632d | 2014-01-29 14:02:00 -0800 | [diff] [blame] | 2490 | xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2491 | xhci_dbg_cmd_ptrs(xhci); |
| 2492 | |
Sarah Sharp | dbc3330 | 2012-05-08 07:32:03 -0700 | [diff] [blame] | 2493 | xhci->lpm_command = xhci_alloc_command(xhci, true, true, flags); |
| 2494 | if (!xhci->lpm_command) |
| 2495 | goto fail; |
| 2496 | |
| 2497 | /* Reserve one command ring TRB for disabling LPM. |
| 2498 | * Since the USB core grabs the shared usb_bus bandwidth mutex before |
| 2499 | * disabling LPM, we only need to reserve one TRB for all devices. |
| 2500 | */ |
| 2501 | xhci->cmd_ring_reserved_trbs++; |
| 2502 | |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 2503 | val = readl(&xhci->cap_regs->db_off); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2504 | val &= DBOFF_MASK; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2505 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2506 | "// Doorbell array is located at offset 0x%x" |
| 2507 | " from cap regs base addr", val); |
Dmitry Torokhov | c50a00f | 2011-02-08 16:29:34 -0800 | [diff] [blame] | 2508 | xhci->dba = (void __iomem *) xhci->cap_regs + val; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2509 | xhci_dbg_regs(xhci); |
| 2510 | xhci_print_run_regs(xhci); |
| 2511 | /* Set ir_set to interrupt register set 0 */ |
Dmitry Torokhov | c50a00f | 2011-02-08 16:29:34 -0800 | [diff] [blame] | 2512 | xhci->ir_set = &xhci->run_regs->ir_set[0]; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2513 | |
| 2514 | /* |
| 2515 | * Event ring setup: Allocate a normal ring, but also setup |
| 2516 | * the event ring segment table (ERST). Section 4.9.3. |
| 2517 | */ |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2518 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Allocating event ring"); |
Andiry Xu | 186a7ef | 2012-03-05 17:49:36 +0800 | [diff] [blame] | 2519 | xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, 1, TYPE_EVENT, |
Mathias Nyman | f9c589e | 2016-06-21 10:58:02 +0300 | [diff] [blame] | 2520 | 0, flags); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2521 | if (!xhci->event_ring) |
| 2522 | goto fail; |
Lin Wang | 4daf9df | 2015-01-09 16:06:31 +0200 | [diff] [blame] | 2523 | if (xhci_check_trb_in_td_math(xhci) < 0) |
Sarah Sharp | 6648f29 | 2009-11-09 13:35:23 -0800 | [diff] [blame] | 2524 | goto fail; |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2525 | |
Sebastian Andrzej Siewior | 22d45f0 | 2011-09-23 14:19:59 -0700 | [diff] [blame] | 2526 | xhci->erst.entries = dma_alloc_coherent(dev, |
| 2527 | sizeof(struct xhci_erst_entry) * ERST_NUM_SEGS, &dma, |
Dan Carpenter | 6db5215 | 2016-11-10 22:33:17 +0300 | [diff] [blame] | 2528 | flags); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2529 | if (!xhci->erst.entries) |
| 2530 | goto fail; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2531 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2532 | "// Allocated event ring segment table at 0x%llx", |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 2533 | (unsigned long long)dma); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2534 | |
| 2535 | memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS); |
| 2536 | xhci->erst.num_entries = ERST_NUM_SEGS; |
| 2537 | xhci->erst.erst_dma_addr = dma; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2538 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2539 | "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx", |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2540 | xhci->erst.num_entries, |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 2541 | xhci->erst.entries, |
| 2542 | (unsigned long long)xhci->erst.erst_dma_addr); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2543 | |
| 2544 | /* set ring base address and size for each segment table entry */ |
| 2545 | for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { |
| 2546 | struct xhci_erst_entry *entry = &xhci->erst.entries[val]; |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2547 | entry->seg_addr = cpu_to_le64(seg->dma); |
| 2548 | entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2549 | entry->rsvd = 0; |
| 2550 | seg = seg->next; |
| 2551 | } |
| 2552 | |
| 2553 | /* set ERST count with the number of entries in the segment table */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 2554 | val = readl(&xhci->ir_set->erst_size); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2555 | val &= ERST_SIZE_MASK; |
| 2556 | val |= ERST_NUM_SEGS; |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2557 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2558 | "// Write ERST size = %i to ir_set 0 (some bits preserved)", |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2559 | val); |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 2560 | writel(val, &xhci->ir_set->erst_size); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2561 | |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2562 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2563 | "// Set ERST entries to point to event ring."); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2564 | /* set the segment table base address */ |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2565 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2566 | "// Set ERST base address for ir_set 0 = 0x%llx", |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 2567 | (unsigned long long)xhci->erst.erst_dma_addr); |
Sarah Sharp | f7b2e40 | 2014-01-30 13:27:49 -0800 | [diff] [blame] | 2568 | val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base); |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 2569 | val_64 &= ERST_PTR_MASK; |
| 2570 | val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK); |
Sarah Sharp | 477632d | 2014-01-29 14:02:00 -0800 | [diff] [blame] | 2571 | xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2572 | |
| 2573 | /* Set the event ring dequeue address */ |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 2574 | xhci_set_hc_event_deq(xhci); |
Xenia Ragiadakou | d195fcf | 2013-08-14 06:33:55 +0300 | [diff] [blame] | 2575 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 2576 | "Wrote ERST address to ir_set 0."); |
Dmitry Torokhov | 09ece30 | 2011-02-08 16:29:33 -0800 | [diff] [blame] | 2577 | xhci_print_ir_set(xhci, 0); |
Sarah Sharp | 0ebbab3 | 2009-04-27 19:52:34 -0700 | [diff] [blame] | 2578 | |
| 2579 | /* |
| 2580 | * XXX: Might need to set the Interrupter Moderation Register to |
| 2581 | * something other than the default (~1ms minimum between interrupts). |
| 2582 | * See section 5.5.1.2. |
| 2583 | */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 2584 | init_completion(&xhci->addr_dev); |
| 2585 | for (i = 0; i < MAX_HC_SLOTS; ++i) |
Randy Dunlap | 326b481 | 2010-04-19 08:53:50 -0700 | [diff] [blame] | 2586 | xhci->devs[i] = NULL; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 2587 | for (i = 0; i < USB_MAXCHILDREN; ++i) { |
Sarah Sharp | 20b67cf | 2010-12-15 12:47:14 -0800 | [diff] [blame] | 2588 | xhci->bus_state[0].resume_done[i] = 0; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 2589 | xhci->bus_state[1].resume_done[i] = 0; |
Sarah Sharp | 8b3d457 | 2013-08-20 08:12:12 -0700 | [diff] [blame] | 2590 | /* Only the USB 2.0 completions will ever be used. */ |
| 2591 | init_completion(&xhci->bus_state[1].rexit_done[i]); |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 2592 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2593 | |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 2594 | if (scratchpad_alloc(xhci, flags)) |
| 2595 | goto fail; |
Sarah Sharp | da6699c | 2010-10-26 16:47:13 -0700 | [diff] [blame] | 2596 | if (xhci_setup_port_arrays(xhci, flags)) |
| 2597 | goto fail; |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 2598 | |
Sarah Sharp | 623bef9 | 2011-11-11 14:57:33 -0800 | [diff] [blame] | 2599 | /* Enable USB 3.0 device notifications for function remote wake, which |
| 2600 | * is necessary for allowing USB 3.0 devices to do remote wakeup from |
| 2601 | * U3 (device suspend). |
| 2602 | */ |
Xenia Ragiadakou | b0ba972 | 2013-11-15 05:34:06 +0200 | [diff] [blame] | 2603 | temp = readl(&xhci->op_regs->dev_notification); |
Sarah Sharp | 623bef9 | 2011-11-11 14:57:33 -0800 | [diff] [blame] | 2604 | temp &= ~DEV_NOTE_MASK; |
| 2605 | temp |= DEV_NOTE_FWAKE; |
Xenia Ragiadakou | 204b779 | 2013-11-15 05:34:07 +0200 | [diff] [blame] | 2606 | writel(temp, &xhci->op_regs->dev_notification); |
Sarah Sharp | 623bef9 | 2011-11-11 14:57:33 -0800 | [diff] [blame] | 2607 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2608 | return 0; |
John Youn | 254c80a | 2009-07-27 12:05:03 -0700 | [diff] [blame] | 2609 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2610 | fail: |
| 2611 | xhci_warn(xhci, "Couldn't initialize memory\n"); |
Sarah Sharp | 159e1fc | 2012-03-16 13:09:39 -0700 | [diff] [blame] | 2612 | xhci_halt(xhci); |
| 2613 | xhci_reset(xhci); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 2614 | xhci_mem_cleanup(xhci); |
| 2615 | return -ENOMEM; |
| 2616 | } |