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Gwenhael Goavec-Meroue910b452013-03-08 08:41:38 +01001/*
2 * Copyright 2013 Armadeus Systems - <support@armadeus.com>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/* APF51Dev is a docking board for the APF51 SOM */
13#include "imx51-apf51.dts"
14
15/ {
16 model = "Armadeus Systems APF51Dev docking/development board";
17 compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
18
19 gpio-keys {
20 compatible = "gpio-keys";
21
22 user-key {
23 label = "user";
24 gpios = <&gpio1 3 0>;
25 linux,code = <256>; /* BTN_0 */
26 };
27 };
28
29 leds {
30 compatible = "gpio-leds";
31
32 user {
33 label = "Heartbeat";
34 gpios = <&gpio1 2 0>;
35 linux,default-trigger = "heartbeat";
36 };
37 };
38};
39
Gwenhael Goavec-Merou003c70d2013-03-16 16:53:54 +010040&ecspi1 {
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_ecspi1_1>;
43 fsl,spi-num-chipselects = <2>;
44 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
45 status = "okay";
46};
47
48&ecspi2 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_ecspi2_1>;
51 fsl,spi-num-chipselects = <2>;
52 cs-gpios = <&gpio3 28 1>, <&gpio3 27 1>;
53 status = "okay";
54};
55
Gwenhael Goavec-Meroue910b452013-03-08 08:41:38 +010056&esdhc1 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_esdhc1_1>;
59 cd-gpios = <&gpio2 29 0>;
60 bus-width = <4>;
61 status = "okay";
62};
63
64&esdhc2 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_esdhc2_1>;
67 bus-width = <4>;
68 non-removable;
69 status = "okay";
70};
71
Gwenhael Goavec-Merou003c70d2013-03-16 16:53:54 +010072&i2c2 {
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_i2c2_2>;
75 status = "okay";
76};
77
Gwenhael Goavec-Meroue910b452013-03-08 08:41:38 +010078&iomuxc {
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_hog>;
81
82 hog {
83 pinctrl_hog: hoggrp {
84 fsl,pins = <
85 MX51_PAD_EIM_EB2__GPIO2_22 0x0C5
86 MX51_PAD_EIM_EB3__GPIO2_23 0x0C5
87 MX51_PAD_EIM_CS4__GPIO2_29 0x100
88 MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
89 MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
90 MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
91 MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
92 MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
93 MX51_PAD_GPIO1_3__GPIO1_3 0x0C5
94 >;
95 };
96 };
97};