Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Platform data for Arizona devices |
| 3 | * |
| 4 | * Copyright 2012 Wolfson Microelectronics. PLC. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #ifndef _ARIZONA_PDATA_H |
| 12 | #define _ARIZONA_PDATA_H |
| 13 | |
| 14 | #define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */ |
| 15 | #define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */ |
| 16 | #define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */ |
| 17 | #define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */ |
| 18 | #define ARIZONA_GPN_PU 0x4000 /* GPN_PU */ |
| 19 | #define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */ |
| 20 | #define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */ |
| 21 | #define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */ |
| 22 | #define ARIZONA_GPN_PD 0x2000 /* GPN_PD */ |
| 23 | #define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */ |
| 24 | #define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */ |
| 25 | #define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */ |
| 26 | #define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */ |
| 27 | #define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */ |
| 28 | #define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */ |
| 29 | #define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */ |
| 30 | #define ARIZONA_GPN_POL 0x0400 /* GPN_POL */ |
| 31 | #define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */ |
| 32 | #define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */ |
| 33 | #define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */ |
| 34 | #define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */ |
| 35 | #define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */ |
| 36 | #define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */ |
| 37 | #define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */ |
| 38 | #define ARIZONA_GPN_DB 0x0100 /* GPN_DB */ |
| 39 | #define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */ |
| 40 | #define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */ |
| 41 | #define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */ |
| 42 | #define ARIZONA_GPN_FN_MASK 0x007F /* GPN_FN - [6:0] */ |
| 43 | #define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */ |
| 44 | #define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */ |
| 45 | |
| 46 | #define ARIZONA_MAX_GPIO 5 |
| 47 | |
| 48 | #define ARIZONA_32KZ_MCLK1 1 |
| 49 | #define ARIZONA_32KZ_MCLK2 2 |
| 50 | #define ARIZONA_32KZ_NONE 3 |
| 51 | |
Mark Brown | e102bef | 2012-07-10 12:37:58 +0100 | [diff] [blame] | 52 | #define ARIZONA_MAX_INPUT 4 |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 53 | |
| 54 | #define ARIZONA_DMIC_MICVDD 0 |
| 55 | #define ARIZONA_DMIC_MICBIAS1 1 |
| 56 | #define ARIZONA_DMIC_MICBIAS2 2 |
| 57 | #define ARIZONA_DMIC_MICBIAS3 3 |
| 58 | |
| 59 | #define ARIZONA_INMODE_DIFF 0 |
| 60 | #define ARIZONA_INMODE_SE 1 |
| 61 | #define ARIZONA_INMODE_DMIC 2 |
| 62 | |
Mark Brown | e102bef | 2012-07-10 12:37:58 +0100 | [diff] [blame] | 63 | #define ARIZONA_MAX_OUTPUT 6 |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 64 | |
Mark Brown | 2a51da0 | 2012-07-09 19:33:14 +0100 | [diff] [blame] | 65 | #define ARIZONA_MAX_PDM_SPK 2 |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 66 | |
| 67 | struct regulator_init_data; |
| 68 | |
| 69 | struct arizona_micd_config { |
| 70 | unsigned int src; |
| 71 | unsigned int bias; |
| 72 | bool gpio; |
| 73 | }; |
| 74 | |
| 75 | struct arizona_pdata { |
| 76 | int reset; /** GPIO controlling /RESET, if any */ |
| 77 | int ldoena; /** GPIO controlling LODENA, if any */ |
| 78 | |
| 79 | /** Regulator configuration for MICVDD */ |
| 80 | struct regulator_init_data *micvdd; |
| 81 | |
| 82 | /** Regulator configuration for LDO1 */ |
| 83 | struct regulator_init_data *ldo1; |
| 84 | |
| 85 | /** If a direct 32kHz clock is provided on an MCLK specify it here */ |
| 86 | int clk32k_src; |
| 87 | |
| 88 | bool irq_active_high; /** IRQ polarity */ |
| 89 | |
| 90 | /* Base GPIO */ |
| 91 | int gpio_base; |
| 92 | |
| 93 | /** Pin state for GPIO pins */ |
| 94 | int gpio_defaults[ARIZONA_MAX_GPIO]; |
| 95 | |
| 96 | /** GPIO for mic detection polarity */ |
| 97 | int micd_pol_gpio; |
| 98 | |
| 99 | /** Headset polarity configurations */ |
| 100 | struct arizona_micd_config *micd_configs; |
| 101 | int num_micd_configs; |
| 102 | |
| 103 | /** Reference voltage for DMIC inputs */ |
| 104 | int dmic_ref[ARIZONA_MAX_INPUT]; |
| 105 | |
| 106 | /** Mode of input structures */ |
| 107 | int inmode[ARIZONA_MAX_INPUT]; |
| 108 | |
| 109 | /** Mode for outputs */ |
| 110 | bool out_mono[ARIZONA_MAX_OUTPUT]; |
| 111 | |
| 112 | /** PDM speaker mute setting */ |
| 113 | unsigned int spk_mute[ARIZONA_MAX_PDM_SPK]; |
| 114 | |
| 115 | /** PDM speaker format */ |
| 116 | unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK]; |
| 117 | }; |
| 118 | |
| 119 | #endif |