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Sascha Hauer295c08b2009-08-19 01:43:50 +02001/*
2 * Regulator Driver for Freescale MC13783 PMIC
3 *
Yong Shen167e3d82010-12-14 14:00:54 +08004 * Copyright 2010 Yong Shen <yong.shen@linaro.org>
Sascha Hauer295c08b2009-08-19 01:43:50 +02005 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
Alberto Panizzo1bd588f2009-12-14 18:26:38 +01006 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
Sascha Hauer295c08b2009-08-19 01:43:50 +02007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010013#include <linux/mfd/mc13783.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020014#include <linux/regulator/machine.h>
15#include <linux/regulator/driver.h>
16#include <linux/platform_device.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020017#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090018#include <linux/slab.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020019#include <linux/init.h>
20#include <linux/err.h>
Yong Shen167e3d82010-12-14 14:00:54 +080021#include "mc13xxx.h"
Sascha Hauer295c08b2009-08-19 01:43:50 +020022
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010023#define MC13783_REG_SWITCHERS5 29
24#define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +010025#define MC13783_REG_SWITCHERS5_SW3VSEL 18
26#define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18)
27
28#define MC13783_REG_REGULATORSETTING0 30
29#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2
30#define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4
31#define MC13783_REG_REGULATORSETTING0_VGENVSEL 6
32#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9
33#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11
34#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13
35#define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14
36#define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15
37#define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16
38
39#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2)
40#define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4)
41#define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6)
42#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9)
43#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11)
44#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13)
45#define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14)
46#define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15)
47#define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16)
48
49#define MC13783_REG_REGULATORSETTING1 31
50#define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0
51#define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2
52#define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4
53#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6
54#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9
55
56#define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0)
57#define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2)
58#define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4)
59#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6)
60#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9)
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010061
62#define MC13783_REG_REGULATORMODE0 32
63#define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
64#define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
65#define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
66#define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
67#define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
68#define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
69#define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
70#define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
71
72#define MC13783_REG_REGULATORMODE1 33
73#define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
74#define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
75#define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
76#define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
77#define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
78#define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
79#define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
80#define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
81#define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
82
83#define MC13783_REG_POWERMISC 34
84#define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
85#define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
86#define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
87#define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
Alberto Panizzof4b97b32010-01-19 12:48:54 +010088#define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
89#define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
90
91#define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
92
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010093
Alberto Panizzo1bd588f2009-12-14 18:26:38 +010094/* Voltage Values */
Mark Brown6220b872010-11-29 15:57:48 +000095static const int mc13783_sw3_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +010096 5000000, 5000000, 5000000, 5500000,
97};
98
Mark Brown6220b872010-11-29 15:57:48 +000099static const int mc13783_vaudio_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100100 2775000,
101};
102
Mark Brown6220b872010-11-29 15:57:48 +0000103static const int mc13783_viohi_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100104 2775000,
105};
106
Mark Brown6220b872010-11-29 15:57:48 +0000107static const int mc13783_violo_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100108 1200000, 1300000, 1500000, 1800000,
109};
110
Mark Brown6220b872010-11-29 15:57:48 +0000111static const int mc13783_vdig_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100112 1200000, 1300000, 1500000, 1800000,
113};
114
Mark Brown6220b872010-11-29 15:57:48 +0000115static const int mc13783_vgen_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100116 1200000, 1300000, 1500000, 1800000,
117 1100000, 2000000, 2775000, 2400000,
118};
119
Mark Brown6220b872010-11-29 15:57:48 +0000120static const int mc13783_vrfdig_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100121 1200000, 1500000, 1800000, 1875000,
122};
123
Mark Brown6220b872010-11-29 15:57:48 +0000124static const int mc13783_vrfref_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100125 2475000, 2600000, 2700000, 2775000,
126};
127
Mark Brown6220b872010-11-29 15:57:48 +0000128static const int mc13783_vrfcp_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100129 2700000, 2775000,
130};
131
Mark Brown6220b872010-11-29 15:57:48 +0000132static const int mc13783_vsim_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100133 1800000, 2900000, 3000000,
134};
135
Mark Brown6220b872010-11-29 15:57:48 +0000136static const int mc13783_vesim_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100137 1800000, 2900000,
138};
139
Mark Brown6220b872010-11-29 15:57:48 +0000140static const int mc13783_vcam_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100141 1500000, 1800000, 2500000, 2550000,
142 2600000, 2750000, 2800000, 3000000,
143};
144
Mark Brown6220b872010-11-29 15:57:48 +0000145static const int mc13783_vrfbg_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100146 1250000,
147};
148
Mark Brown6220b872010-11-29 15:57:48 +0000149static const int mc13783_vvib_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100150 1300000, 1800000, 2000000, 3000000,
151};
152
Mark Brown6220b872010-11-29 15:57:48 +0000153static const int mc13783_vmmc_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100154 1600000, 1800000, 2000000, 2600000,
155 2700000, 2800000, 2900000, 3000000,
156};
157
Mark Brown6220b872010-11-29 15:57:48 +0000158static const int mc13783_vrf_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100159 1500000, 1875000, 2700000, 2775000,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200160};
161
Mark Brown6220b872010-11-29 15:57:48 +0000162static const int mc13783_gpo_val[] = {
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100163 3100000,
164};
165
Mark Brown6220b872010-11-29 15:57:48 +0000166static const int mc13783_pwgtdrv_val[] = {
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100167 5500000,
168};
169
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100170static struct regulator_ops mc13783_gpo_regulator_ops;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200171
Yong Shen167e3d82010-12-14 14:00:54 +0800172#define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages) \
173 MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \
174 mc13xxx_regulator_ops)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100175
Yong Shen167e3d82010-12-14 14:00:54 +0800176#define MC13783_FIXED_DEFINE(prefix, name, reg, voltages) \
177 MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \
178 mc13xxx_fixed_regulator_ops)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100179
Yong Shen167e3d82010-12-14 14:00:54 +0800180#define MC13783_GPO_DEFINE(prefix, name, reg, voltages) \
181 MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \
182 mc13783_gpo_regulator_ops)
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100183
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100184#define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
Yong Shen57c78e32010-12-14 14:00:53 +0800185 MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100186#define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \
Yong Shen57c78e32010-12-14 14:00:53 +0800187 MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100188
Yong Shen167e3d82010-12-14 14:00:54 +0800189static struct mc13xxx_regulator mc13783_regulators[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100190 MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100191
Yong Shen57c78e32010-12-14 14:00:53 +0800192 MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val),
193 MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val),
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100194 MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, \
195 mc13783_violo_val),
196 MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \
197 mc13783_vdig_val),
198 MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, \
199 mc13783_vgen_val),
200 MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, \
201 mc13783_vrfdig_val),
202 MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, \
203 mc13783_vrfref_val),
204 MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, \
205 mc13783_vrfcp_val),
206 MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, \
207 mc13783_vsim_val),
208 MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, \
209 mc13783_vesim_val),
210 MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, \
211 mc13783_vcam_val),
Yong Shen57c78e32010-12-14 14:00:53 +0800212 MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val),
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100213 MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, \
214 mc13783_vvib_val),
215 MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, \
216 mc13783_vrf_val),
217 MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, \
218 mc13783_vrf_val),
219 MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, \
220 mc13783_vmmc_val),
221 MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \
222 mc13783_vmmc_val),
Yong Shen57c78e32010-12-14 14:00:53 +0800223 MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val),
224 MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val),
225 MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val),
226 MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val),
227 MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
228 MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
Sascha Hauer295c08b2009-08-19 01:43:50 +0200229};
230
Yong Shen167e3d82010-12-14 14:00:54 +0800231static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
232 u32 val)
Sascha Hauer295c08b2009-08-19 01:43:50 +0200233{
Yong Shen167e3d82010-12-14 14:00:54 +0800234 struct mc13xxx *mc13783 = priv->mc13xxx;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100235 int ret;
236 u32 valread;
237
238 BUG_ON(val & ~mask);
239
Yong Shen167e3d82010-12-14 14:00:54 +0800240 ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100241 if (ret)
242 return ret;
243
244 /* Update the stored state for Power Gates. */
245 priv->powermisc_pwgt_state =
246 (priv->powermisc_pwgt_state & ~mask) | val;
247 priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
248
249 /* Construct the new register value */
250 valread = (valread & ~mask) | val;
251 /* Overwrite the PWGTxEN with the stored version */
252 valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
253 priv->powermisc_pwgt_state;
254
Yong Shen167e3d82010-12-14 14:00:54 +0800255 return mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100256}
257
258static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
259{
Yong Shen167e3d82010-12-14 14:00:54 +0800260 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
261 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100262 int id = rdev_get_id(rdev);
263 int ret;
Yong Shen167e3d82010-12-14 14:00:54 +0800264 u32 en_val = mc13xxx_regulators[id].enable_bit;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100265
266 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
267
268 /* Power Gate enable value is 0 */
Yong Shen57c78e32010-12-14 14:00:53 +0800269 if (id == MC13783_REG_PWGT1SPI ||
270 id == MC13783_REG_PWGT2SPI)
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100271 en_val = 0;
272
Yong Shen167e3d82010-12-14 14:00:54 +0800273 mc13xxx_lock(priv->mc13xxx);
274 ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100275 en_val);
Yong Shen167e3d82010-12-14 14:00:54 +0800276 mc13xxx_unlock(priv->mc13xxx);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100277
278 return ret;
279}
280
281static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
282{
Yong Shen167e3d82010-12-14 14:00:54 +0800283 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
284 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100285 int id = rdev_get_id(rdev);
286 int ret;
287 u32 dis_val = 0;
288
289 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
290
291 /* Power Gate disable value is 1 */
Yong Shen57c78e32010-12-14 14:00:53 +0800292 if (id == MC13783_REG_PWGT1SPI ||
293 id == MC13783_REG_PWGT2SPI)
Yong Shen167e3d82010-12-14 14:00:54 +0800294 dis_val = mc13xxx_regulators[id].enable_bit;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100295
Yong Shen167e3d82010-12-14 14:00:54 +0800296 mc13xxx_lock(priv->mc13xxx);
297 ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100298 dis_val);
Yong Shen167e3d82010-12-14 14:00:54 +0800299 mc13xxx_unlock(priv->mc13xxx);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100300
301 return ret;
302}
303
304static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
305{
Yong Shen167e3d82010-12-14 14:00:54 +0800306 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
307 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100308 int ret, id = rdev_get_id(rdev);
309 unsigned int val;
310
Yong Shen167e3d82010-12-14 14:00:54 +0800311 mc13xxx_lock(priv->mc13xxx);
312 ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
313 mc13xxx_unlock(priv->mc13xxx);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100314
315 if (ret)
316 return ret;
317
318 /* Power Gates state is stored in powermisc_pwgt_state
319 * where the meaning of bits is negated */
320 val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
321 (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
322
Yong Shen167e3d82010-12-14 14:00:54 +0800323 return (val & mc13xxx_regulators[id].enable_bit) != 0;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100324}
325
326static struct regulator_ops mc13783_gpo_regulator_ops = {
327 .enable = mc13783_gpo_regulator_enable,
328 .disable = mc13783_gpo_regulator_disable,
329 .is_enabled = mc13783_gpo_regulator_is_enabled,
Yong Shen167e3d82010-12-14 14:00:54 +0800330 .list_voltage = mc13xxx_regulator_list_voltage,
331 .set_voltage = mc13xxx_fixed_regulator_set_voltage,
332 .get_voltage = mc13xxx_fixed_regulator_get_voltage,
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100333};
334
Sascha Hauer295c08b2009-08-19 01:43:50 +0200335static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
336{
Yong Shen167e3d82010-12-14 14:00:54 +0800337 struct mc13xxx_regulator_priv *priv;
338 struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100339 struct mc13783_regulator_platform_data *pdata =
340 dev_get_platdata(&pdev->dev);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200341 struct mc13783_regulator_init_data *init_data;
342 int i, ret;
343
344 dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
345
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100346 priv = kzalloc(sizeof(*priv) +
347 pdata->num_regulators * sizeof(priv->regulators[0]),
Sascha Hauer295c08b2009-08-19 01:43:50 +0200348 GFP_KERNEL);
349 if (!priv)
350 return -ENOMEM;
351
Yong Shen167e3d82010-12-14 14:00:54 +0800352 priv->mc13xxx_regulators = mc13783_regulators;
353 priv->mc13xxx = mc13783;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200354
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100355 for (i = 0; i < pdata->num_regulators; i++) {
356 init_data = &pdata->regulators[i];
Sascha Hauer295c08b2009-08-19 01:43:50 +0200357 priv->regulators[i] = regulator_register(
358 &mc13783_regulators[init_data->id].desc,
359 &pdev->dev, init_data->init_data, priv);
360
361 if (IS_ERR(priv->regulators[i])) {
362 dev_err(&pdev->dev, "failed to register regulator %s\n",
363 mc13783_regulators[i].desc.name);
364 ret = PTR_ERR(priv->regulators[i]);
365 goto err;
366 }
367 }
368
369 platform_set_drvdata(pdev, priv);
370
371 return 0;
372err:
373 while (--i >= 0)
374 regulator_unregister(priv->regulators[i]);
375
376 kfree(priv);
377
378 return ret;
379}
380
381static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
382{
Yong Shen167e3d82010-12-14 14:00:54 +0800383 struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev);
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100384 struct mc13783_regulator_platform_data *pdata =
385 dev_get_platdata(&pdev->dev);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200386 int i;
387
Axel Lin58d57652010-04-19 09:58:02 +0800388 platform_set_drvdata(pdev, NULL);
389
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100390 for (i = 0; i < pdata->num_regulators; i++)
Sascha Hauer295c08b2009-08-19 01:43:50 +0200391 regulator_unregister(priv->regulators[i]);
392
Axel Lin58d57652010-04-19 09:58:02 +0800393 kfree(priv);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200394 return 0;
395}
396
397static struct platform_driver mc13783_regulator_driver = {
398 .driver = {
399 .name = "mc13783-regulator",
400 .owner = THIS_MODULE,
401 },
402 .remove = __devexit_p(mc13783_regulator_remove),
Alberto Panizzo735eb932009-12-14 18:53:35 +0100403 .probe = mc13783_regulator_probe,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200404};
405
406static int __init mc13783_regulator_init(void)
407{
Alberto Panizzo735eb932009-12-14 18:53:35 +0100408 return platform_driver_register(&mc13783_regulator_driver);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200409}
410subsys_initcall(mc13783_regulator_init);
411
412static void __exit mc13783_regulator_exit(void)
413{
414 platform_driver_unregister(&mc13783_regulator_driver);
415}
416module_exit(mc13783_regulator_exit);
417
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100418MODULE_LICENSE("GPL v2");
Axel Lin1dcc4342010-05-06 11:33:36 +0800419MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
Sascha Hauer295c08b2009-08-19 01:43:50 +0200420MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
421MODULE_ALIAS("platform:mc13783-regulator");