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Andres Salomonc30d7d22009-12-14 18:00:38 -08001/*
2 * Clock event driver for the CS5535/CS5536
3 *
4 * Copyright (C) 2006, Advanced Micro Devices, Inc.
5 * Copyright (C) 2007 Andres Salomon <dilinger@debian.org>
6 * Copyright (C) 2009 Andres Salomon <dilinger@collabora.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of version 2 of the GNU General Public License
10 * as published by the Free Software Foundation.
11 *
12 * The MFGPTs are documented in AMD Geode CS5536 Companion Device Data Book.
13 */
14
15#include <linux/kernel.h>
16#include <linux/irq.h>
17#include <linux/interrupt.h>
18#include <linux/module.h>
19#include <linux/cs5535.h>
20#include <linux/clockchips.h>
21
22#define DRV_NAME "cs5535-clockevt"
23
Jens Rottmann115079a2010-02-22 12:44:20 -080024static int timer_irq;
Andres Salomonc30d7d22009-12-14 18:00:38 -080025module_param_named(irq, timer_irq, int, 0644);
26MODULE_PARM_DESC(irq, "Which IRQ to use for the clock source MFGPT ticks.");
27
28/*
29 * We are using the 32.768kHz input clock - it's the only one that has the
30 * ranges we find desirable. The following table lists the suitable
31 * divisors and the associated Hz, minimum interval and the maximum interval:
32 *
33 * Divisor Hz Min Delta (s) Max Delta (s)
34 * 1 32768 .00048828125 2.000
35 * 2 16384 .0009765625 4.000
36 * 4 8192 .001953125 8.000
37 * 8 4096 .00390625 16.000
38 * 16 2048 .0078125 32.000
39 * 32 1024 .015625 64.000
40 * 64 512 .03125 128.000
41 * 128 256 .0625 256.000
42 * 256 128 .125 512.000
43 */
44
45static unsigned int cs5535_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
46static struct cs5535_mfgpt_timer *cs5535_event_clock;
47
48/* Selected from the table above */
49
50#define MFGPT_DIVISOR 16
51#define MFGPT_SCALE 4 /* divisor = 2^(scale) */
52#define MFGPT_HZ (32768 / MFGPT_DIVISOR)
53#define MFGPT_PERIODIC (MFGPT_HZ / HZ)
54
55/*
Jens Rottmann61e01be2012-08-21 16:15:43 -070056 * The MFGPT timers on the CS5536 provide us with suitable timers to use
Andres Salomonc30d7d22009-12-14 18:00:38 -080057 * as clock event sources - not as good as a HPET or APIC, but certainly
58 * better than the PIT. This isn't a general purpose MFGPT driver, but
59 * a simplified one designed specifically to act as a clock event source.
60 * For full details about the MFGPT, please consult the CS5536 data sheet.
61 */
62
63static void disable_timer(struct cs5535_mfgpt_timer *timer)
64{
65 /* avoid races by clearing CMP1 and CMP2 unconditionally */
66 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP,
67 (uint16_t) ~MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP1 |
68 MFGPT_SETUP_CMP2);
69}
70
71static void start_timer(struct cs5535_mfgpt_timer *timer, uint16_t delta)
72{
73 cs5535_mfgpt_write(timer, MFGPT_REG_CMP2, delta);
74 cs5535_mfgpt_write(timer, MFGPT_REG_COUNTER, 0);
75
76 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP,
77 MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
78}
79
80static void mfgpt_set_mode(enum clock_event_mode mode,
81 struct clock_event_device *evt)
82{
83 disable_timer(cs5535_event_clock);
84
85 if (mode == CLOCK_EVT_MODE_PERIODIC)
86 start_timer(cs5535_event_clock, MFGPT_PERIODIC);
87
88 cs5535_tick_mode = mode;
89}
90
91static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
92{
93 start_timer(cs5535_event_clock, delta);
94 return 0;
95}
96
97static struct clock_event_device cs5535_clockevent = {
98 .name = DRV_NAME,
99 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
100 .set_mode = mfgpt_set_mode,
101 .set_next_event = mfgpt_next_event,
102 .rating = 250,
Andres Salomonc30d7d22009-12-14 18:00:38 -0800103};
104
105static irqreturn_t mfgpt_tick(int irq, void *dev_id)
106{
107 uint16_t val = cs5535_mfgpt_read(cs5535_event_clock, MFGPT_REG_SETUP);
108
109 /* See if the interrupt was for us */
110 if (!(val & (MFGPT_SETUP_SETUP | MFGPT_SETUP_CMP2 | MFGPT_SETUP_CMP1)))
111 return IRQ_NONE;
112
113 /* Turn off the clock (and clear the event) */
114 disable_timer(cs5535_event_clock);
115
116 if (cs5535_tick_mode == CLOCK_EVT_MODE_SHUTDOWN)
117 return IRQ_HANDLED;
118
119 /* Clear the counter */
120 cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_COUNTER, 0);
121
122 /* Restart the clock in periodic mode */
123
124 if (cs5535_tick_mode == CLOCK_EVT_MODE_PERIODIC)
125 cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP,
126 MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
127
128 cs5535_clockevent.event_handler(&cs5535_clockevent);
129 return IRQ_HANDLED;
130}
131
132static struct irqaction mfgptirq = {
133 .handler = mfgpt_tick,
Michael Opdenacker38c30a82013-12-09 10:12:10 +0100134 .flags = IRQF_NOBALANCING | IRQF_TIMER | IRQF_SHARED,
Andres Salomonc30d7d22009-12-14 18:00:38 -0800135 .name = DRV_NAME,
136};
137
138static int __init cs5535_mfgpt_init(void)
139{
140 struct cs5535_mfgpt_timer *timer;
141 int ret;
142 uint16_t val;
143
144 timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
145 if (!timer) {
Jens Rottmann61e01be2012-08-21 16:15:43 -0700146 printk(KERN_ERR DRV_NAME ": Could not allocate MFGPT timer\n");
Andres Salomonc30d7d22009-12-14 18:00:38 -0800147 return -ENODEV;
148 }
149 cs5535_event_clock = timer;
150
151 /* Set up the IRQ on the MFGPT side */
152 if (cs5535_mfgpt_setup_irq(timer, MFGPT_CMP2, &timer_irq)) {
153 printk(KERN_ERR DRV_NAME ": Could not set up IRQ %d\n",
154 timer_irq);
Jens Rottmannfdb19a62010-03-11 14:04:44 -0800155 goto err_timer;
Andres Salomonc30d7d22009-12-14 18:00:38 -0800156 }
157
158 /* And register it with the kernel */
159 ret = setup_irq(timer_irq, &mfgptirq);
160 if (ret) {
161 printk(KERN_ERR DRV_NAME ": Unable to set up the interrupt.\n");
Jens Rottmannfdb19a62010-03-11 14:04:44 -0800162 goto err_irq;
Andres Salomonc30d7d22009-12-14 18:00:38 -0800163 }
164
165 /* Set the clock scale and enable the event mode for CMP2 */
166 val = MFGPT_SCALE | (3 << 8);
167
168 cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, val);
169
170 /* Set up the clock event */
Andres Salomonc30d7d22009-12-14 18:00:38 -0800171 printk(KERN_INFO DRV_NAME
172 ": Registering MFGPT timer as a clock event, using IRQ %d\n",
173 timer_irq);
Shawn Guo77cc9822013-01-12 11:50:06 +0000174 clockevents_config_and_register(&cs5535_clockevent, MFGPT_HZ,
175 0xF, 0xFFFE);
Andres Salomonc30d7d22009-12-14 18:00:38 -0800176
177 return 0;
178
Jens Rottmannfdb19a62010-03-11 14:04:44 -0800179err_irq:
Andres Salomonc30d7d22009-12-14 18:00:38 -0800180 cs5535_mfgpt_release_irq(cs5535_event_clock, MFGPT_CMP2, &timer_irq);
Jens Rottmannfdb19a62010-03-11 14:04:44 -0800181err_timer:
182 cs5535_mfgpt_free_timer(cs5535_event_clock);
Andres Salomonc30d7d22009-12-14 18:00:38 -0800183 printk(KERN_ERR DRV_NAME ": Unable to set up the MFGPT clock source\n");
184 return -EIO;
185}
186
187module_init(cs5535_mfgpt_init);
188
Andres Salomond45840d2010-07-20 13:24:32 -0700189MODULE_AUTHOR("Andres Salomon <dilinger@queued.net>");
Andres Salomonc30d7d22009-12-14 18:00:38 -0800190MODULE_DESCRIPTION("CS5535/CS5536 MFGPT clock event driver");
191MODULE_LICENSE("GPL");