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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H
3
4#include <mach_apicdef.h>
5#include <asm/smp.h>
6
7#define APIC_DFR_VALUE (APIC_DFR_FLAT)
8
9static inline cpumask_t target_cpus(void)
10{
11#ifdef CONFIG_SMP
12 return cpu_online_map;
13#else
14 return cpumask_of_cpu(0);
15#endif
16}
17#define TARGET_CPUS (target_cpus())
18
19#define NO_BALANCE_IRQ (0)
20#define esr_disable (0)
21
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#define INT_DELIVERY_MODE dest_LowestPrio
23#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
24
25static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
26{
27 return physid_isset(apicid, bitmap);
28}
29
30static inline unsigned long check_apicid_present(int bit)
31{
32 return physid_isset(bit, phys_cpu_present_map);
33}
34
35/*
36 * Set up the logical destination ID.
37 *
38 * Intel recommends to set DFR, LDR and TPR before enabling
39 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
40 * document number 292116). So here it goes...
41 */
42static inline void init_apic_ldr(void)
43{
44 unsigned long val;
45
46 apic_write_around(APIC_DFR, APIC_DFR_VALUE);
47 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
48 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
49 apic_write_around(APIC_LDR, val);
50}
51
52static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
53{
54 return phys_map;
55}
56
57static inline void clustered_apic_check(void)
58{
59 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
60 "Flat", nr_ioapics);
61}
62
63static inline int multi_timer_check(int apic, int irq)
64{
65 return 0;
66}
67
68static inline int apicid_to_node(int logical_apicid)
69{
70 return 0;
71}
72
73/* Mapping from cpu number to logical apicid */
74static inline int cpu_to_logical_apicid(int cpu)
75{
76 return 1 << cpu;
77}
78
79static inline int cpu_present_to_apicid(int mps_cpu)
80{
81 if (mps_cpu < get_physical_broadcast())
82 return mps_cpu;
83 else
84 return BAD_APICID;
85}
86
87static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
88{
89 return physid_mask_of_physid(phys_apicid);
90}
91
92static inline int mpc_apic_id(struct mpc_config_processor *m,
93 struct mpc_config_translation *translation_record)
94{
95 printk("Processor #%d %ld:%ld APIC version %d\n",
96 m->mpc_apicid,
97 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
98 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
99 m->mpc_apicver);
100 return (m->mpc_apicid);
101}
102
103static inline void setup_portio_remap(void)
104{
105}
106
107static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
108{
109 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
110}
111
112static inline int apic_id_registered(void)
113{
114 return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
115}
116
117static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
118{
119 return cpus_addr(cpumask)[0];
120}
121
122static inline void enable_apic_mode(void)
123{
124}
125
126static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
127{
128 return cpuid_apic >> index_msb;
129}
130
131#endif /* __ASM_MACH_APIC_H */