Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * PowerPC64 port by Mike Corrigan and Dave Engebretsen |
| 3 | * {mikejc|engebret}@us.ibm.com |
| 4 | * |
| 5 | * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com> |
| 6 | * |
| 7 | * SMP scalability work: |
| 8 | * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM |
| 9 | * |
| 10 | * Module name: htab.c |
| 11 | * |
| 12 | * Description: |
| 13 | * PowerPC Hashed Page Table functions |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License |
| 17 | * as published by the Free Software Foundation; either version |
| 18 | * 2 of the License, or (at your option) any later version. |
| 19 | */ |
| 20 | |
| 21 | #undef DEBUG |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 22 | #undef DEBUG_LOW |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
| 24 | #include <linux/config.h> |
| 25 | #include <linux/spinlock.h> |
| 26 | #include <linux/errno.h> |
| 27 | #include <linux/sched.h> |
| 28 | #include <linux/proc_fs.h> |
| 29 | #include <linux/stat.h> |
| 30 | #include <linux/sysctl.h> |
| 31 | #include <linux/ctype.h> |
| 32 | #include <linux/cache.h> |
| 33 | #include <linux/init.h> |
| 34 | #include <linux/signal.h> |
| 35 | |
| 36 | #include <asm/ppcdebug.h> |
| 37 | #include <asm/processor.h> |
| 38 | #include <asm/pgtable.h> |
| 39 | #include <asm/mmu.h> |
| 40 | #include <asm/mmu_context.h> |
| 41 | #include <asm/page.h> |
| 42 | #include <asm/types.h> |
| 43 | #include <asm/system.h> |
| 44 | #include <asm/uaccess.h> |
| 45 | #include <asm/machdep.h> |
| 46 | #include <asm/lmb.h> |
| 47 | #include <asm/abs_addr.h> |
| 48 | #include <asm/tlbflush.h> |
| 49 | #include <asm/io.h> |
| 50 | #include <asm/eeh.h> |
| 51 | #include <asm/tlb.h> |
| 52 | #include <asm/cacheflush.h> |
| 53 | #include <asm/cputable.h> |
| 54 | #include <asm/abs_addr.h> |
| 55 | #include <asm/sections.h> |
| 56 | |
| 57 | #ifdef DEBUG |
| 58 | #define DBG(fmt...) udbg_printf(fmt) |
| 59 | #else |
| 60 | #define DBG(fmt...) |
| 61 | #endif |
| 62 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 63 | #ifdef DEBUG_LOW |
| 64 | #define DBG_LOW(fmt...) udbg_printf(fmt) |
| 65 | #else |
| 66 | #define DBG_LOW(fmt...) |
| 67 | #endif |
| 68 | |
| 69 | #define KB (1024) |
| 70 | #define MB (1024*KB) |
| 71 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | /* |
| 73 | * Note: pte --> Linux PTE |
| 74 | * HPTE --> PowerPC Hashed Page Table Entry |
| 75 | * |
| 76 | * Execution context: |
| 77 | * htab_initialize is called with the MMU off (of course), but |
| 78 | * the kernel has been copied down to zero so it can directly |
| 79 | * reference global data. At this point it is very difficult |
| 80 | * to print debug info. |
| 81 | * |
| 82 | */ |
| 83 | |
| 84 | #ifdef CONFIG_U3_DART |
| 85 | extern unsigned long dart_tablebase; |
| 86 | #endif /* CONFIG_U3_DART */ |
| 87 | |
David Gibson | 96e2844 | 2005-07-13 01:11:42 -0700 | [diff] [blame] | 88 | hpte_t *htab_address; |
| 89 | unsigned long htab_hash_mask; |
Paul Mackerras | ab1f9da | 2005-10-10 21:58:35 +1000 | [diff] [blame] | 90 | unsigned long _SDR1; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 91 | struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; |
| 92 | int mmu_linear_psize = MMU_PAGE_4K; |
| 93 | int mmu_virtual_psize = MMU_PAGE_4K; |
| 94 | #ifdef CONFIG_HUGETLB_PAGE |
| 95 | int mmu_huge_psize = MMU_PAGE_16M; |
| 96 | unsigned int HPAGE_SHIFT; |
| 97 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 99 | /* There are definitions of page sizes arrays to be used when none |
| 100 | * is provided by the firmware. |
| 101 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 103 | /* Pre-POWER4 CPUs (4k pages only) |
| 104 | */ |
| 105 | struct mmu_psize_def mmu_psize_defaults_old[] = { |
| 106 | [MMU_PAGE_4K] = { |
| 107 | .shift = 12, |
| 108 | .sllp = 0, |
| 109 | .penc = 0, |
| 110 | .avpnm = 0, |
| 111 | .tlbiel = 0, |
| 112 | }, |
| 113 | }; |
| 114 | |
| 115 | /* POWER4, GPUL, POWER5 |
| 116 | * |
| 117 | * Support for 16Mb large pages |
| 118 | */ |
| 119 | struct mmu_psize_def mmu_psize_defaults_gp[] = { |
| 120 | [MMU_PAGE_4K] = { |
| 121 | .shift = 12, |
| 122 | .sllp = 0, |
| 123 | .penc = 0, |
| 124 | .avpnm = 0, |
| 125 | .tlbiel = 1, |
| 126 | }, |
| 127 | [MMU_PAGE_16M] = { |
| 128 | .shift = 24, |
| 129 | .sllp = SLB_VSID_L, |
| 130 | .penc = 0, |
| 131 | .avpnm = 0x1UL, |
| 132 | .tlbiel = 0, |
| 133 | }, |
| 134 | }; |
| 135 | |
| 136 | |
| 137 | int htab_bolt_mapping(unsigned long vstart, unsigned long vend, |
| 138 | unsigned long pstart, unsigned long mode, int psize) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 140 | unsigned long vaddr, paddr; |
| 141 | unsigned int step, shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | unsigned long tmp_mode; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 143 | int ret = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 145 | shift = mmu_psize_defs[psize].shift; |
| 146 | step = 1 << shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 148 | for (vaddr = vstart, paddr = pstart; vaddr < vend; |
| 149 | vaddr += step, paddr += step) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | unsigned long vpn, hash, hpteg; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 151 | unsigned long vsid = get_kernel_vsid(vaddr); |
| 152 | unsigned long va = (vsid << 28) | (vaddr & 0x0fffffff); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 154 | vpn = va >> shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | tmp_mode = mode; |
| 156 | |
| 157 | /* Make non-kernel text non-executable */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 158 | if (!in_kernel_text(vaddr)) |
| 159 | tmp_mode = mode | HPTE_R_N; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 161 | hash = hpt_hash(va, shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); |
| 163 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 164 | /* The crap below can be cleaned once ppd_md.probe() can |
| 165 | * set up the hash callbacks, thus we can just used the |
| 166 | * normal insert callback here. |
| 167 | */ |
Michael Ellerman | 4c55130 | 2005-09-23 14:47:58 +1000 | [diff] [blame] | 168 | #ifdef CONFIG_PPC_ISERIES |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 169 | if (systemcfg->platform == PLATFORM_ISERIES_LPAR) |
| 170 | ret = iSeries_hpte_insert(hpteg, va, |
| 171 | virt_to_abs(paddr), |
| 172 | tmp_mode, |
| 173 | HPTE_V_BOLTED, |
| 174 | psize); |
Michael Ellerman | 4c55130 | 2005-09-23 14:47:58 +1000 | [diff] [blame] | 175 | else |
| 176 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | #ifdef CONFIG_PPC_PSERIES |
| 178 | if (systemcfg->platform & PLATFORM_LPAR) |
| 179 | ret = pSeries_lpar_hpte_insert(hpteg, va, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 180 | virt_to_abs(paddr), |
| 181 | tmp_mode, |
| 182 | HPTE_V_BOLTED, |
| 183 | psize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | else |
Michael Ellerman | 4c55130 | 2005-09-23 14:47:58 +1000 | [diff] [blame] | 185 | #endif |
| 186 | #ifdef CONFIG_PPC_MULTIPLATFORM |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | ret = native_hpte_insert(hpteg, va, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 188 | virt_to_abs(paddr), |
| 189 | tmp_mode, HPTE_V_BOLTED, |
| 190 | psize); |
Michael Ellerman | 4c55130 | 2005-09-23 14:47:58 +1000 | [diff] [blame] | 191 | #endif |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 192 | if (ret < 0) |
| 193 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 195 | return ret < 0 ? ret : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | } |
| 197 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 198 | static int __init htab_dt_scan_page_sizes(unsigned long node, |
| 199 | const char *uname, int depth, |
| 200 | void *data) |
| 201 | { |
| 202 | char *type = of_get_flat_dt_prop(node, "device_type", NULL); |
| 203 | u32 *prop; |
| 204 | unsigned long size = 0; |
| 205 | |
| 206 | /* We are scanning "cpu" nodes only */ |
| 207 | if (type == NULL || strcmp(type, "cpu") != 0) |
| 208 | return 0; |
| 209 | |
| 210 | prop = (u32 *)of_get_flat_dt_prop(node, |
| 211 | "ibm,segment-page-sizes", &size); |
| 212 | if (prop != NULL) { |
| 213 | DBG("Page sizes from device-tree:\n"); |
| 214 | size /= 4; |
| 215 | cur_cpu_spec->cpu_features &= ~(CPU_FTR_16M_PAGE); |
| 216 | while(size > 0) { |
| 217 | unsigned int shift = prop[0]; |
| 218 | unsigned int slbenc = prop[1]; |
| 219 | unsigned int lpnum = prop[2]; |
| 220 | unsigned int lpenc = 0; |
| 221 | struct mmu_psize_def *def; |
| 222 | int idx = -1; |
| 223 | |
| 224 | size -= 3; prop += 3; |
| 225 | while(size > 0 && lpnum) { |
| 226 | if (prop[0] == shift) |
| 227 | lpenc = prop[1]; |
| 228 | prop += 2; size -= 2; |
| 229 | lpnum--; |
| 230 | } |
| 231 | switch(shift) { |
| 232 | case 0xc: |
| 233 | idx = MMU_PAGE_4K; |
| 234 | break; |
| 235 | case 0x10: |
| 236 | idx = MMU_PAGE_64K; |
| 237 | break; |
| 238 | case 0x14: |
| 239 | idx = MMU_PAGE_1M; |
| 240 | break; |
| 241 | case 0x18: |
| 242 | idx = MMU_PAGE_16M; |
| 243 | cur_cpu_spec->cpu_features |= CPU_FTR_16M_PAGE; |
| 244 | break; |
| 245 | case 0x22: |
| 246 | idx = MMU_PAGE_16G; |
| 247 | break; |
| 248 | } |
| 249 | if (idx < 0) |
| 250 | continue; |
| 251 | def = &mmu_psize_defs[idx]; |
| 252 | def->shift = shift; |
| 253 | if (shift <= 23) |
| 254 | def->avpnm = 0; |
| 255 | else |
| 256 | def->avpnm = (1 << (shift - 23)) - 1; |
| 257 | def->sllp = slbenc; |
| 258 | def->penc = lpenc; |
| 259 | /* We don't know for sure what's up with tlbiel, so |
| 260 | * for now we only set it for 4K and 64K pages |
| 261 | */ |
| 262 | if (idx == MMU_PAGE_4K || idx == MMU_PAGE_64K) |
| 263 | def->tlbiel = 1; |
| 264 | else |
| 265 | def->tlbiel = 0; |
| 266 | |
| 267 | DBG(" %d: shift=%02x, sllp=%04x, avpnm=%08x, " |
| 268 | "tlbiel=%d, penc=%d\n", |
| 269 | idx, shift, def->sllp, def->avpnm, def->tlbiel, |
| 270 | def->penc); |
| 271 | } |
| 272 | return 1; |
| 273 | } |
| 274 | return 0; |
| 275 | } |
| 276 | |
| 277 | |
| 278 | static void __init htab_init_page_sizes(void) |
| 279 | { |
| 280 | int rc; |
| 281 | |
| 282 | /* Default to 4K pages only */ |
| 283 | memcpy(mmu_psize_defs, mmu_psize_defaults_old, |
| 284 | sizeof(mmu_psize_defaults_old)); |
| 285 | |
| 286 | /* |
| 287 | * Try to find the available page sizes in the device-tree |
| 288 | */ |
| 289 | rc = of_scan_flat_dt(htab_dt_scan_page_sizes, NULL); |
| 290 | if (rc != 0) /* Found */ |
| 291 | goto found; |
| 292 | |
| 293 | /* |
| 294 | * Not in the device-tree, let's fallback on known size |
| 295 | * list for 16M capable GP & GR |
| 296 | */ |
| 297 | if ((systemcfg->platform != PLATFORM_ISERIES_LPAR) && |
| 298 | cpu_has_feature(CPU_FTR_16M_PAGE)) |
| 299 | memcpy(mmu_psize_defs, mmu_psize_defaults_gp, |
| 300 | sizeof(mmu_psize_defaults_gp)); |
| 301 | found: |
| 302 | /* |
| 303 | * Pick a size for the linear mapping. Currently, we only support |
| 304 | * 16M, 1M and 4K which is the default |
| 305 | */ |
| 306 | if (mmu_psize_defs[MMU_PAGE_16M].shift) |
| 307 | mmu_linear_psize = MMU_PAGE_16M; |
| 308 | else if (mmu_psize_defs[MMU_PAGE_1M].shift) |
| 309 | mmu_linear_psize = MMU_PAGE_1M; |
| 310 | |
| 311 | /* |
| 312 | * Pick a size for the ordinary pages. Default is 4K, we support |
| 313 | * 64K if cache inhibited large pages are supported by the |
| 314 | * processor |
| 315 | */ |
| 316 | #ifdef CONFIG_PPC_64K_PAGES |
| 317 | if (mmu_psize_defs[MMU_PAGE_64K].shift && |
| 318 | cpu_has_feature(CPU_FTR_CI_LARGE_PAGE)) |
| 319 | mmu_virtual_psize = MMU_PAGE_64K; |
| 320 | #endif |
| 321 | |
| 322 | printk(KERN_INFO "Page orders: linear mapping = %d, others = %d\n", |
| 323 | mmu_psize_defs[mmu_linear_psize].shift, |
| 324 | mmu_psize_defs[mmu_virtual_psize].shift); |
| 325 | |
| 326 | #ifdef CONFIG_HUGETLB_PAGE |
| 327 | /* Init large page size. Currently, we pick 16M or 1M depending |
| 328 | * on what is available |
| 329 | */ |
| 330 | if (mmu_psize_defs[MMU_PAGE_16M].shift) |
| 331 | mmu_huge_psize = MMU_PAGE_16M; |
| 332 | else if (mmu_psize_defs[MMU_PAGE_1M].shift) |
| 333 | mmu_huge_psize = MMU_PAGE_1M; |
| 334 | |
| 335 | /* Calculate HPAGE_SHIFT and sanity check it */ |
| 336 | if (mmu_psize_defs[mmu_huge_psize].shift > 16 && |
| 337 | mmu_psize_defs[mmu_huge_psize].shift < 28) |
| 338 | HPAGE_SHIFT = mmu_psize_defs[mmu_huge_psize].shift; |
| 339 | else |
| 340 | HPAGE_SHIFT = 0; /* No huge pages dude ! */ |
| 341 | #endif /* CONFIG_HUGETLB_PAGE */ |
| 342 | } |
| 343 | |
| 344 | static int __init htab_dt_scan_pftsize(unsigned long node, |
| 345 | const char *uname, int depth, |
| 346 | void *data) |
| 347 | { |
| 348 | char *type = of_get_flat_dt_prop(node, "device_type", NULL); |
| 349 | u32 *prop; |
| 350 | |
| 351 | /* We are scanning "cpu" nodes only */ |
| 352 | if (type == NULL || strcmp(type, "cpu") != 0) |
| 353 | return 0; |
| 354 | |
| 355 | prop = (u32 *)of_get_flat_dt_prop(node, "ibm,pft-size", NULL); |
| 356 | if (prop != NULL) { |
| 357 | /* pft_size[0] is the NUMA CEC cookie */ |
| 358 | ppc64_pft_size = prop[1]; |
| 359 | return 1; |
| 360 | } |
| 361 | return 0; |
| 362 | } |
| 363 | |
| 364 | static unsigned long __init htab_get_table_size(void) |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 365 | { |
| 366 | unsigned long rnd_mem_size, pteg_count; |
| 367 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 368 | /* If hash size isn't already provided by the platform, we try to |
| 369 | * retreive it from the device-tree. If it's not there neither, we |
| 370 | * calculate it now based on the total RAM size |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 371 | */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 372 | if (ppc64_pft_size == 0) |
| 373 | of_scan_flat_dt(htab_dt_scan_pftsize, NULL); |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 374 | if (ppc64_pft_size) |
| 375 | return 1UL << ppc64_pft_size; |
| 376 | |
| 377 | /* round mem_size up to next power of 2 */ |
| 378 | rnd_mem_size = 1UL << __ilog2(systemcfg->physicalMemorySize); |
| 379 | if (rnd_mem_size < systemcfg->physicalMemorySize) |
| 380 | rnd_mem_size <<= 1; |
| 381 | |
| 382 | /* # pages / 2 */ |
| 383 | pteg_count = max(rnd_mem_size >> (12 + 1), 1UL << 11); |
| 384 | |
| 385 | return pteg_count << 7; |
| 386 | } |
| 387 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | void __init htab_initialize(void) |
| 389 | { |
| 390 | unsigned long table, htab_size_bytes; |
| 391 | unsigned long pteg_count; |
| 392 | unsigned long mode_rw; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | unsigned long base = 0, size = 0; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 394 | int i; |
| 395 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 396 | extern unsigned long tce_alloc_start, tce_alloc_end; |
| 397 | |
| 398 | DBG(" -> htab_initialize()\n"); |
| 399 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 400 | /* Initialize page sizes */ |
| 401 | htab_init_page_sizes(); |
| 402 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | /* |
| 404 | * Calculate the required size of the htab. We want the number of |
| 405 | * PTEGs to equal one half the number of real pages. |
| 406 | */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 407 | htab_size_bytes = htab_get_table_size(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | pteg_count = htab_size_bytes >> 7; |
| 409 | |
| 410 | /* For debug, make the HTAB 1/8 as big as it normally would be. */ |
| 411 | ifppcdebug(PPCDBG_HTABSIZE) { |
| 412 | pteg_count >>= 3; |
| 413 | htab_size_bytes = pteg_count << 7; |
| 414 | } |
| 415 | |
| 416 | htab_hash_mask = pteg_count - 1; |
| 417 | |
| 418 | if (systemcfg->platform & PLATFORM_LPAR) { |
| 419 | /* Using a hypervisor which owns the htab */ |
| 420 | htab_address = NULL; |
| 421 | _SDR1 = 0; |
| 422 | } else { |
| 423 | /* Find storage for the HPT. Must be contiguous in |
| 424 | * the absolute address space. |
| 425 | */ |
| 426 | table = lmb_alloc(htab_size_bytes, htab_size_bytes); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 427 | BUG_ON(table == 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | |
| 429 | DBG("Hash table allocated at %lx, size: %lx\n", table, |
| 430 | htab_size_bytes); |
| 431 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 432 | htab_address = abs_to_virt(table); |
| 433 | |
| 434 | /* htab absolute addr + encoded htabsize */ |
| 435 | _SDR1 = table + __ilog2(pteg_count) - 11; |
| 436 | |
| 437 | /* Initialize the HPT with no entries */ |
| 438 | memset((void *)table, 0, htab_size_bytes); |
| 439 | } |
| 440 | |
Anton Blanchard | 515bae9 | 2005-06-21 17:15:55 -0700 | [diff] [blame] | 441 | mode_rw = _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | |
| 443 | /* On U3 based machines, we need to reserve the DART area and |
| 444 | * _NOT_ map it to avoid cache paradoxes as it's remapped non |
| 445 | * cacheable later on |
| 446 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | |
| 448 | /* create bolted the linear mapping in the hash table */ |
| 449 | for (i=0; i < lmb.memory.cnt; i++) { |
Michael Ellerman | 180379d | 2005-08-03 20:21:26 +1000 | [diff] [blame] | 450 | base = lmb.memory.region[i].base + KERNELBASE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | size = lmb.memory.region[i].size; |
| 452 | |
| 453 | DBG("creating mapping for region: %lx : %lx\n", base, size); |
| 454 | |
| 455 | #ifdef CONFIG_U3_DART |
| 456 | /* Do not map the DART space. Fortunately, it will be aligned |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 457 | * in such a way that it will not cross two lmb regions and |
| 458 | * will fit within a single 16Mb page. |
| 459 | * The DART space is assumed to be a full 16Mb region even if |
| 460 | * we only use 2Mb of that space. We will use more of it later |
| 461 | * for AGP GART. We have to use a full 16Mb large page. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | */ |
| 463 | DBG("DART base: %lx\n", dart_tablebase); |
| 464 | |
| 465 | if (dart_tablebase != 0 && dart_tablebase >= base |
| 466 | && dart_tablebase < (base + size)) { |
| 467 | if (base != dart_tablebase) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 468 | BUG_ON(htab_bolt_mapping(base, dart_tablebase, |
| 469 | base, mode_rw, |
| 470 | mmu_linear_psize)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | if ((base + size) > (dart_tablebase + 16*MB)) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 472 | BUG_ON(htab_bolt_mapping(dart_tablebase+16*MB, |
| 473 | base + size, |
| 474 | dart_tablebase+16*MB, |
| 475 | mode_rw, |
| 476 | mmu_linear_psize)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | continue; |
| 478 | } |
| 479 | #endif /* CONFIG_U3_DART */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 480 | BUG_ON(htab_bolt_mapping(base, base + size, base, |
| 481 | mode_rw, mmu_linear_psize)); |
| 482 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 483 | |
| 484 | /* |
| 485 | * If we have a memory_limit and we've allocated TCEs then we need to |
| 486 | * explicitly map the TCE area at the top of RAM. We also cope with the |
| 487 | * case that the TCEs start below memory_limit. |
| 488 | * tce_alloc_start/end are 16MB aligned so the mapping should work |
| 489 | * for either 4K or 16MB pages. |
| 490 | */ |
| 491 | if (tce_alloc_start) { |
| 492 | tce_alloc_start += KERNELBASE; |
| 493 | tce_alloc_end += KERNELBASE; |
| 494 | |
| 495 | if (base + size >= tce_alloc_start) |
| 496 | tce_alloc_start = base + size + 1; |
| 497 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 498 | BUG_ON(htab_bolt_mapping(tce_alloc_start, tce_alloc_end, |
| 499 | tce_alloc_start, mode_rw, |
| 500 | mmu_linear_psize)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | } |
| 502 | |
| 503 | DBG(" <- htab_initialize()\n"); |
| 504 | } |
| 505 | #undef KB |
| 506 | #undef MB |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 507 | |
| 508 | /* |
| 509 | * Called by asm hashtable.S for doing lazy icache flush |
| 510 | */ |
| 511 | unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap) |
| 512 | { |
| 513 | struct page *page; |
| 514 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | page = pte_page(pte); |
| 516 | |
| 517 | /* page is dirty */ |
| 518 | if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) { |
| 519 | if (trap == 0x400) { |
| 520 | __flush_dcache_icache(page_address(page)); |
| 521 | set_bit(PG_arch_1, &page->flags); |
| 522 | } else |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 523 | pp |= HPTE_R_N; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | } |
| 525 | return pp; |
| 526 | } |
| 527 | |
| 528 | /* Result code is: |
| 529 | * 0 - handled |
| 530 | * 1 - normal page fault |
| 531 | * -1 - critical hash insertion error |
| 532 | */ |
| 533 | int hash_page(unsigned long ea, unsigned long access, unsigned long trap) |
| 534 | { |
| 535 | void *pgdir; |
| 536 | unsigned long vsid; |
| 537 | struct mm_struct *mm; |
| 538 | pte_t *ptep; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 539 | cpumask_t tmp; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 540 | int rc, user_region = 0, local = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 541 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 542 | DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n", |
| 543 | ea, access, trap); |
David Gibson | 1f8d419 | 2005-05-05 16:15:13 -0700 | [diff] [blame] | 544 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 545 | if ((ea & ~REGION_MASK) >= PGTABLE_RANGE) { |
| 546 | DBG_LOW(" out of pgtable range !\n"); |
| 547 | return 1; |
| 548 | } |
| 549 | |
| 550 | /* Get region & vsid */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 551 | switch (REGION_ID(ea)) { |
| 552 | case USER_REGION_ID: |
| 553 | user_region = 1; |
| 554 | mm = current->mm; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 555 | if (! mm) { |
| 556 | DBG_LOW(" user region with no mm !\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 557 | return 1; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 558 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | vsid = get_vsid(mm->context.id, ea); |
| 560 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 561 | case VMALLOC_REGION_ID: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | mm = &init_mm; |
| 563 | vsid = get_kernel_vsid(ea); |
| 564 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 565 | default: |
| 566 | /* Not a valid range |
| 567 | * Send the problem up to do_page_fault |
| 568 | */ |
| 569 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 570 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 571 | DBG_LOW(" mm=%p, mm->pgdir=%p, vsid=%016lx\n", mm, mm->pgd, vsid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 573 | /* Get pgdir */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 574 | pgdir = mm->pgd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | if (pgdir == NULL) |
| 576 | return 1; |
| 577 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 578 | /* Check CPU locality */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | tmp = cpumask_of_cpu(smp_processor_id()); |
| 580 | if (user_region && cpus_equal(mm->cpu_vm_mask, tmp)) |
| 581 | local = 1; |
| 582 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 583 | /* Handle hugepage regions */ |
| 584 | if (unlikely(in_hugepage_area(mm->context, ea))) { |
| 585 | DBG_LOW(" -> huge page !\n"); |
| 586 | return hash_huge_page(mm, access, ea, vsid, local); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | } |
| 588 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 589 | /* Get PTE and page size from page tables */ |
| 590 | ptep = find_linux_pte(pgdir, ea); |
| 591 | if (ptep == NULL || !pte_present(*ptep)) { |
| 592 | DBG_LOW(" no PTE !\n"); |
| 593 | return 1; |
| 594 | } |
| 595 | |
| 596 | #ifndef CONFIG_PPC_64K_PAGES |
| 597 | DBG_LOW(" i-pte: %016lx\n", pte_val(*ptep)); |
| 598 | #else |
| 599 | DBG_LOW(" i-pte: %016lx %016lx\n", pte_val(*ptep), |
| 600 | pte_val(*(ptep + PTRS_PER_PTE))); |
| 601 | #endif |
| 602 | /* Pre-check access permissions (will be re-checked atomically |
| 603 | * in __hash_page_XX but this pre-check is a fast path |
| 604 | */ |
| 605 | if (access & ~pte_val(*ptep)) { |
| 606 | DBG_LOW(" no access !\n"); |
| 607 | return 1; |
| 608 | } |
| 609 | |
| 610 | /* Do actual hashing */ |
| 611 | #ifndef CONFIG_PPC_64K_PAGES |
| 612 | rc = __hash_page_4K(ea, access, vsid, ptep, trap, local); |
| 613 | #else |
| 614 | if (mmu_virtual_psize == MMU_PAGE_64K) |
| 615 | rc = __hash_page_64K(ea, access, vsid, ptep, trap, local); |
| 616 | else |
| 617 | rc = __hash_page_4K(ea, access, vsid, ptep, trap, local); |
| 618 | #endif /* CONFIG_PPC_64K_PAGES */ |
| 619 | |
| 620 | #ifndef CONFIG_PPC_64K_PAGES |
| 621 | DBG_LOW(" o-pte: %016lx\n", pte_val(*ptep)); |
| 622 | #else |
| 623 | DBG_LOW(" o-pte: %016lx %016lx\n", pte_val(*ptep), |
| 624 | pte_val(*(ptep + PTRS_PER_PTE))); |
| 625 | #endif |
| 626 | DBG_LOW(" -> rc=%d\n", rc); |
| 627 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | } |
| 629 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 630 | void hash_preload(struct mm_struct *mm, unsigned long ea, |
| 631 | unsigned long access, unsigned long trap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 633 | unsigned long vsid; |
| 634 | void *pgdir; |
| 635 | pte_t *ptep; |
| 636 | cpumask_t mask; |
| 637 | unsigned long flags; |
| 638 | int local = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 640 | /* We don't want huge pages prefaulted for now |
| 641 | */ |
| 642 | if (unlikely(in_hugepage_area(mm->context, ea))) |
| 643 | return; |
| 644 | |
| 645 | DBG_LOW("hash_preload(mm=%p, mm->pgdir=%p, ea=%016lx, access=%lx," |
| 646 | " trap=%lx\n", mm, mm->pgd, ea, access, trap); |
| 647 | |
| 648 | /* Get PTE, VSID, access mask */ |
| 649 | pgdir = mm->pgd; |
| 650 | if (pgdir == NULL) |
| 651 | return; |
| 652 | ptep = find_linux_pte(pgdir, ea); |
| 653 | if (!ptep) |
| 654 | return; |
| 655 | vsid = get_vsid(mm->context.id, ea); |
| 656 | |
| 657 | /* Hash it in */ |
| 658 | local_irq_save(flags); |
| 659 | mask = cpumask_of_cpu(smp_processor_id()); |
| 660 | if (cpus_equal(mm->cpu_vm_mask, mask)) |
| 661 | local = 1; |
| 662 | #ifndef CONFIG_PPC_64K_PAGES |
| 663 | __hash_page_4K(ea, access, vsid, ptep, trap, local); |
| 664 | #else |
| 665 | if (mmu_virtual_psize == MMU_PAGE_64K) |
| 666 | __hash_page_64K(ea, access, vsid, ptep, trap, local); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 667 | else |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 668 | __hash_page_4K(ea, access, vsid, ptep, trap, local); |
| 669 | #endif /* CONFIG_PPC_64K_PAGES */ |
| 670 | local_irq_restore(flags); |
| 671 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 673 | void flush_hash_page(unsigned long va, real_pte_t pte, int psize, int local) |
| 674 | { |
| 675 | unsigned long hash, index, shift, hidx, slot; |
| 676 | |
| 677 | DBG_LOW("flush_hash_page(va=%016x)\n", va); |
| 678 | pte_iterate_hashed_subpages(pte, psize, va, index, shift) { |
| 679 | hash = hpt_hash(va, shift); |
| 680 | hidx = __rpte_to_hidx(pte, index); |
| 681 | if (hidx & _PTEIDX_SECONDARY) |
| 682 | hash = ~hash; |
| 683 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 684 | slot += hidx & _PTEIDX_GROUP_IX; |
| 685 | DBG_LOW(" sub %d: hash=%x, hidx=%x\n", index, slot, hidx); |
| 686 | ppc_md.hpte_invalidate(slot, va, psize, local); |
| 687 | } pte_iterate_hashed_end(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 688 | } |
| 689 | |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 690 | void flush_hash_range(unsigned long number, int local) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 692 | if (ppc_md.flush_hash_range) |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 693 | ppc_md.flush_hash_range(number, local); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 694 | else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 695 | int i; |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 696 | struct ppc64_tlb_batch *batch = |
| 697 | &__get_cpu_var(ppc64_tlb_batch); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | |
| 699 | for (i = 0; i < number; i++) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 700 | flush_hash_page(batch->vaddr[i], batch->pte[i], |
| 701 | batch->psize, local); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 702 | } |
| 703 | } |
| 704 | |
| 705 | static inline void make_bl(unsigned int *insn_addr, void *func) |
| 706 | { |
| 707 | unsigned long funcp = *((unsigned long *)func); |
| 708 | int offset = funcp - (unsigned long)insn_addr; |
| 709 | |
| 710 | *insn_addr = (unsigned int)(0x48000001 | (offset & 0x03fffffc)); |
| 711 | flush_icache_range((unsigned long)insn_addr, 4+ |
| 712 | (unsigned long)insn_addr); |
| 713 | } |
| 714 | |
| 715 | /* |
| 716 | * low_hash_fault is called when we the low level hash code failed |
| 717 | * to instert a PTE due to an hypervisor error |
| 718 | */ |
| 719 | void low_hash_fault(struct pt_regs *regs, unsigned long address) |
| 720 | { |
| 721 | if (user_mode(regs)) { |
| 722 | siginfo_t info; |
| 723 | |
| 724 | info.si_signo = SIGBUS; |
| 725 | info.si_errno = 0; |
| 726 | info.si_code = BUS_ADRERR; |
| 727 | info.si_addr = (void __user *)address; |
| 728 | force_sig_info(SIGBUS, &info, current); |
| 729 | return; |
| 730 | } |
| 731 | bad_page_fault(regs, address, SIGBUS); |
| 732 | } |
| 733 | |
| 734 | void __init htab_finish_init(void) |
| 735 | { |
| 736 | extern unsigned int *htab_call_hpte_insert1; |
| 737 | extern unsigned int *htab_call_hpte_insert2; |
| 738 | extern unsigned int *htab_call_hpte_remove; |
| 739 | extern unsigned int *htab_call_hpte_updatepp; |
| 740 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame^] | 741 | #ifdef CONFIG_PPC_64K_PAGES |
| 742 | extern unsigned int *ht64_call_hpte_insert1; |
| 743 | extern unsigned int *ht64_call_hpte_insert2; |
| 744 | extern unsigned int *ht64_call_hpte_remove; |
| 745 | extern unsigned int *ht64_call_hpte_updatepp; |
| 746 | |
| 747 | make_bl(ht64_call_hpte_insert1, ppc_md.hpte_insert); |
| 748 | make_bl(ht64_call_hpte_insert2, ppc_md.hpte_insert); |
| 749 | make_bl(ht64_call_hpte_remove, ppc_md.hpte_remove); |
| 750 | make_bl(ht64_call_hpte_updatepp, ppc_md.hpte_updatepp); |
| 751 | #endif /* CONFIG_PPC_64K_PAGES */ |
| 752 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | make_bl(htab_call_hpte_insert1, ppc_md.hpte_insert); |
| 754 | make_bl(htab_call_hpte_insert2, ppc_md.hpte_insert); |
| 755 | make_bl(htab_call_hpte_remove, ppc_md.hpte_remove); |
| 756 | make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp); |
| 757 | } |