Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SH-Mobile High-Definition Multimedia Interface (HDMI) driver |
| 3 | * for SLISHDMI13T and SLIPHDMIT IP cores |
| 4 | * |
| 5 | * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/console.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include <linux/err.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/pm_runtime.h> |
| 22 | #include <linux/slab.h> |
| 23 | #include <linux/types.h> |
| 24 | #include <linux/workqueue.h> |
Kuninori Morimoto | 644a984 | 2010-12-27 13:42:20 +0900 | [diff] [blame] | 25 | #include <sound/soc.h> |
Kuninori Morimoto | 1d6be33 | 2010-08-31 14:47:07 +0900 | [diff] [blame] | 26 | #include <sound/soc-dapm.h> |
| 27 | #include <sound/initval.h> |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 28 | |
| 29 | #include <video/sh_mobile_hdmi.h> |
| 30 | #include <video/sh_mobile_lcdc.h> |
| 31 | |
Guennadi Liakhovetski | 6de9edd | 2010-09-03 07:20:23 +0000 | [diff] [blame] | 32 | #include "sh_mobile_lcdcfb.h" |
| 33 | |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 34 | /* HDMI Core Control Register (HTOP0) */ |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 35 | #define HDMI_SYSTEM_CTRL 0x00 /* System control */ |
| 36 | #define HDMI_L_R_DATA_SWAP_CTRL_RPKT 0x01 /* L/R data swap control, |
| 37 | bits 19..16 of 20-bit N for Audio Clock Regeneration packet */ |
| 38 | #define HDMI_20_BIT_N_FOR_AUDIO_RPKT_15_8 0x02 /* bits 15..8 of 20-bit N for Audio Clock Regeneration packet */ |
| 39 | #define HDMI_20_BIT_N_FOR_AUDIO_RPKT_7_0 0x03 /* bits 7..0 of 20-bit N for Audio Clock Regeneration packet */ |
| 40 | #define HDMI_SPDIF_AUDIO_SAMP_FREQ_CTS 0x04 /* SPDIF audio sampling frequency, |
| 41 | bits 19..16 of Internal CTS */ |
| 42 | #define HDMI_INTERNAL_CTS_15_8 0x05 /* bits 15..8 of Internal CTS */ |
| 43 | #define HDMI_INTERNAL_CTS_7_0 0x06 /* bits 7..0 of Internal CTS */ |
| 44 | #define HDMI_EXTERNAL_CTS_19_16 0x07 /* External CTS */ |
| 45 | #define HDMI_EXTERNAL_CTS_15_8 0x08 /* External CTS */ |
| 46 | #define HDMI_EXTERNAL_CTS_7_0 0x09 /* External CTS */ |
| 47 | #define HDMI_AUDIO_SETTING_1 0x0A /* Audio setting.1 */ |
| 48 | #define HDMI_AUDIO_SETTING_2 0x0B /* Audio setting.2 */ |
| 49 | #define HDMI_I2S_AUDIO_SET 0x0C /* I2S audio setting */ |
| 50 | #define HDMI_DSD_AUDIO_SET 0x0D /* DSD audio setting */ |
| 51 | #define HDMI_DEBUG_MONITOR_1 0x0E /* Debug monitor.1 */ |
| 52 | #define HDMI_DEBUG_MONITOR_2 0x0F /* Debug monitor.2 */ |
| 53 | #define HDMI_I2S_INPUT_PIN_SWAP 0x10 /* I2S input pin swap */ |
| 54 | #define HDMI_AUDIO_STATUS_BITS_SETTING_1 0x11 /* Audio status bits setting.1 */ |
| 55 | #define HDMI_AUDIO_STATUS_BITS_SETTING_2 0x12 /* Audio status bits setting.2 */ |
| 56 | #define HDMI_CATEGORY_CODE 0x13 /* Category code */ |
| 57 | #define HDMI_SOURCE_NUM_AUDIO_WORD_LEN 0x14 /* Source number/Audio word length */ |
| 58 | #define HDMI_AUDIO_VIDEO_SETTING_1 0x15 /* Audio/Video setting.1 */ |
| 59 | #define HDMI_VIDEO_SETTING_1 0x16 /* Video setting.1 */ |
| 60 | #define HDMI_DEEP_COLOR_MODES 0x17 /* Deep Color Modes */ |
| 61 | |
| 62 | /* 12 16- and 10-bit Color space conversion parameters: 0x18..0x2f */ |
| 63 | #define HDMI_COLOR_SPACE_CONVERSION_PARAMETERS 0x18 |
| 64 | |
| 65 | #define HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS 0x30 /* External video parameter settings */ |
| 66 | #define HDMI_EXTERNAL_H_TOTAL_7_0 0x31 /* External horizontal total (LSB) */ |
| 67 | #define HDMI_EXTERNAL_H_TOTAL_11_8 0x32 /* External horizontal total (MSB) */ |
| 68 | #define HDMI_EXTERNAL_H_BLANK_7_0 0x33 /* External horizontal blank (LSB) */ |
| 69 | #define HDMI_EXTERNAL_H_BLANK_9_8 0x34 /* External horizontal blank (MSB) */ |
| 70 | #define HDMI_EXTERNAL_H_DELAY_7_0 0x35 /* External horizontal delay (LSB) */ |
| 71 | #define HDMI_EXTERNAL_H_DELAY_9_8 0x36 /* External horizontal delay (MSB) */ |
| 72 | #define HDMI_EXTERNAL_H_DURATION_7_0 0x37 /* External horizontal duration (LSB) */ |
| 73 | #define HDMI_EXTERNAL_H_DURATION_9_8 0x38 /* External horizontal duration (MSB) */ |
| 74 | #define HDMI_EXTERNAL_V_TOTAL_7_0 0x39 /* External vertical total (LSB) */ |
| 75 | #define HDMI_EXTERNAL_V_TOTAL_9_8 0x3A /* External vertical total (MSB) */ |
| 76 | #define HDMI_AUDIO_VIDEO_SETTING_2 0x3B /* Audio/Video setting.2 */ |
| 77 | #define HDMI_EXTERNAL_V_BLANK 0x3D /* External vertical blank */ |
| 78 | #define HDMI_EXTERNAL_V_DELAY 0x3E /* External vertical delay */ |
| 79 | #define HDMI_EXTERNAL_V_DURATION 0x3F /* External vertical duration */ |
| 80 | #define HDMI_CTRL_PKT_MANUAL_SEND_CONTROL 0x40 /* Control packet manual send control */ |
| 81 | #define HDMI_CTRL_PKT_AUTO_SEND 0x41 /* Control packet auto send with VSYNC control */ |
| 82 | #define HDMI_AUTO_CHECKSUM_OPTION 0x42 /* Auto checksum option */ |
| 83 | #define HDMI_VIDEO_SETTING_2 0x45 /* Video setting.2 */ |
| 84 | #define HDMI_OUTPUT_OPTION 0x46 /* Output option */ |
| 85 | #define HDMI_SLIPHDMIT_PARAM_OPTION 0x51 /* SLIPHDMIT parameter option */ |
| 86 | #define HDMI_HSYNC_PMENT_AT_EMB_7_0 0x52 /* HSYNC placement at embedded sync (LSB) */ |
| 87 | #define HDMI_HSYNC_PMENT_AT_EMB_15_8 0x53 /* HSYNC placement at embedded sync (MSB) */ |
| 88 | #define HDMI_VSYNC_PMENT_AT_EMB_7_0 0x54 /* VSYNC placement at embedded sync (LSB) */ |
| 89 | #define HDMI_VSYNC_PMENT_AT_EMB_14_8 0x55 /* VSYNC placement at embedded sync (MSB) */ |
| 90 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_1 0x56 /* SLIPHDMIT parameter settings.1 */ |
| 91 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_2 0x57 /* SLIPHDMIT parameter settings.2 */ |
| 92 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_3 0x58 /* SLIPHDMIT parameter settings.3 */ |
| 93 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_5 0x59 /* SLIPHDMIT parameter settings.5 */ |
| 94 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_6 0x5A /* SLIPHDMIT parameter settings.6 */ |
| 95 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_7 0x5B /* SLIPHDMIT parameter settings.7 */ |
| 96 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_8 0x5C /* SLIPHDMIT parameter settings.8 */ |
| 97 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_9 0x5D /* SLIPHDMIT parameter settings.9 */ |
| 98 | #define HDMI_SLIPHDMIT_PARAM_SETTINGS_10 0x5E /* SLIPHDMIT parameter settings.10 */ |
| 99 | #define HDMI_CTRL_PKT_BUF_INDEX 0x5F /* Control packet buffer index */ |
| 100 | #define HDMI_CTRL_PKT_BUF_ACCESS_HB0 0x60 /* Control packet data buffer access window - HB0 */ |
| 101 | #define HDMI_CTRL_PKT_BUF_ACCESS_HB1 0x61 /* Control packet data buffer access window - HB1 */ |
| 102 | #define HDMI_CTRL_PKT_BUF_ACCESS_HB2 0x62 /* Control packet data buffer access window - HB2 */ |
| 103 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB0 0x63 /* Control packet data buffer access window - PB0 */ |
| 104 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB1 0x64 /* Control packet data buffer access window - PB1 */ |
| 105 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB2 0x65 /* Control packet data buffer access window - PB2 */ |
| 106 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB3 0x66 /* Control packet data buffer access window - PB3 */ |
| 107 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB4 0x67 /* Control packet data buffer access window - PB4 */ |
| 108 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB5 0x68 /* Control packet data buffer access window - PB5 */ |
| 109 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB6 0x69 /* Control packet data buffer access window - PB6 */ |
| 110 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB7 0x6A /* Control packet data buffer access window - PB7 */ |
| 111 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB8 0x6B /* Control packet data buffer access window - PB8 */ |
| 112 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB9 0x6C /* Control packet data buffer access window - PB9 */ |
| 113 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB10 0x6D /* Control packet data buffer access window - PB10 */ |
| 114 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB11 0x6E /* Control packet data buffer access window - PB11 */ |
| 115 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB12 0x6F /* Control packet data buffer access window - PB12 */ |
| 116 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB13 0x70 /* Control packet data buffer access window - PB13 */ |
| 117 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB14 0x71 /* Control packet data buffer access window - PB14 */ |
| 118 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB15 0x72 /* Control packet data buffer access window - PB15 */ |
| 119 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB16 0x73 /* Control packet data buffer access window - PB16 */ |
| 120 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB17 0x74 /* Control packet data buffer access window - PB17 */ |
| 121 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB18 0x75 /* Control packet data buffer access window - PB18 */ |
| 122 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB19 0x76 /* Control packet data buffer access window - PB19 */ |
| 123 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB20 0x77 /* Control packet data buffer access window - PB20 */ |
| 124 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB21 0x78 /* Control packet data buffer access window - PB21 */ |
| 125 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB22 0x79 /* Control packet data buffer access window - PB22 */ |
| 126 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB23 0x7A /* Control packet data buffer access window - PB23 */ |
| 127 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB24 0x7B /* Control packet data buffer access window - PB24 */ |
| 128 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB25 0x7C /* Control packet data buffer access window - PB25 */ |
| 129 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB26 0x7D /* Control packet data buffer access window - PB26 */ |
| 130 | #define HDMI_CTRL_PKT_BUF_ACCESS_PB27 0x7E /* Control packet data buffer access window - PB27 */ |
| 131 | #define HDMI_EDID_KSV_FIFO_ACCESS_WINDOW 0x80 /* EDID/KSV FIFO access window */ |
| 132 | #define HDMI_DDC_BUS_ACCESS_FREQ_CTRL_7_0 0x81 /* DDC bus access frequency control (LSB) */ |
| 133 | #define HDMI_DDC_BUS_ACCESS_FREQ_CTRL_15_8 0x82 /* DDC bus access frequency control (MSB) */ |
| 134 | #define HDMI_INTERRUPT_MASK_1 0x92 /* Interrupt mask.1 */ |
| 135 | #define HDMI_INTERRUPT_MASK_2 0x93 /* Interrupt mask.2 */ |
| 136 | #define HDMI_INTERRUPT_STATUS_1 0x94 /* Interrupt status.1 */ |
| 137 | #define HDMI_INTERRUPT_STATUS_2 0x95 /* Interrupt status.2 */ |
| 138 | #define HDMI_INTERRUPT_MASK_3 0x96 /* Interrupt mask.3 */ |
| 139 | #define HDMI_INTERRUPT_MASK_4 0x97 /* Interrupt mask.4 */ |
| 140 | #define HDMI_INTERRUPT_STATUS_3 0x98 /* Interrupt status.3 */ |
| 141 | #define HDMI_INTERRUPT_STATUS_4 0x99 /* Interrupt status.4 */ |
| 142 | #define HDMI_SOFTWARE_HDCP_CONTROL_1 0x9A /* Software HDCP control.1 */ |
| 143 | #define HDMI_FRAME_COUNTER 0x9C /* Frame counter */ |
| 144 | #define HDMI_FRAME_COUNTER_FOR_RI_CHECK 0x9D /* Frame counter for Ri check */ |
| 145 | #define HDMI_HDCP_CONTROL 0xAF /* HDCP control */ |
| 146 | #define HDMI_RI_FRAME_COUNT_REGISTER 0xB2 /* Ri frame count register */ |
| 147 | #define HDMI_DDC_BUS_CONTROL 0xB7 /* DDC bus control */ |
| 148 | #define HDMI_HDCP_STATUS 0xB8 /* HDCP status */ |
| 149 | #define HDMI_SHA0 0xB9 /* sha0 */ |
| 150 | #define HDMI_SHA1 0xBA /* sha1 */ |
| 151 | #define HDMI_SHA2 0xBB /* sha2 */ |
| 152 | #define HDMI_SHA3 0xBC /* sha3 */ |
| 153 | #define HDMI_SHA4 0xBD /* sha4 */ |
| 154 | #define HDMI_BCAPS_READ 0xBE /* BCAPS read / debug */ |
| 155 | #define HDMI_AKSV_BKSV_7_0_MONITOR 0xBF /* AKSV/BKSV[7:0] monitor */ |
| 156 | #define HDMI_AKSV_BKSV_15_8_MONITOR 0xC0 /* AKSV/BKSV[15:8] monitor */ |
| 157 | #define HDMI_AKSV_BKSV_23_16_MONITOR 0xC1 /* AKSV/BKSV[23:16] monitor */ |
| 158 | #define HDMI_AKSV_BKSV_31_24_MONITOR 0xC2 /* AKSV/BKSV[31:24] monitor */ |
| 159 | #define HDMI_AKSV_BKSV_39_32_MONITOR 0xC3 /* AKSV/BKSV[39:32] monitor */ |
| 160 | #define HDMI_EDID_SEGMENT_POINTER 0xC4 /* EDID segment pointer */ |
| 161 | #define HDMI_EDID_WORD_ADDRESS 0xC5 /* EDID word address */ |
| 162 | #define HDMI_EDID_DATA_FIFO_ADDRESS 0xC6 /* EDID data FIFO address */ |
| 163 | #define HDMI_NUM_OF_HDMI_DEVICES 0xC7 /* Number of HDMI devices */ |
| 164 | #define HDMI_HDCP_ERROR_CODE 0xC8 /* HDCP error code */ |
| 165 | #define HDMI_100MS_TIMER_SET 0xC9 /* 100ms timer setting */ |
| 166 | #define HDMI_5SEC_TIMER_SET 0xCA /* 5sec timer setting */ |
| 167 | #define HDMI_RI_READ_COUNT 0xCB /* Ri read count */ |
| 168 | #define HDMI_AN_SEED 0xCC /* An seed */ |
| 169 | #define HDMI_MAX_NUM_OF_RCIVRS_ALLOWED 0xCD /* Maximum number of receivers allowed */ |
| 170 | #define HDMI_HDCP_MEMORY_ACCESS_CONTROL_1 0xCE /* HDCP memory access control.1 */ |
| 171 | #define HDMI_HDCP_MEMORY_ACCESS_CONTROL_2 0xCF /* HDCP memory access control.2 */ |
| 172 | #define HDMI_HDCP_CONTROL_2 0xD0 /* HDCP Control 2 */ |
| 173 | #define HDMI_HDCP_KEY_MEMORY_CONTROL 0xD2 /* HDCP Key Memory Control */ |
| 174 | #define HDMI_COLOR_SPACE_CONV_CONFIG_1 0xD3 /* Color space conversion configuration.1 */ |
| 175 | #define HDMI_VIDEO_SETTING_3 0xD4 /* Video setting.3 */ |
| 176 | #define HDMI_RI_7_0 0xD5 /* Ri[7:0] */ |
| 177 | #define HDMI_RI_15_8 0xD6 /* Ri[15:8] */ |
| 178 | #define HDMI_PJ 0xD7 /* Pj */ |
| 179 | #define HDMI_SHA_RD 0xD8 /* sha_rd */ |
| 180 | #define HDMI_RI_7_0_SAVED 0xD9 /* Ri[7:0] saved */ |
| 181 | #define HDMI_RI_15_8_SAVED 0xDA /* Ri[15:8] saved */ |
| 182 | #define HDMI_PJ_SAVED 0xDB /* Pj saved */ |
| 183 | #define HDMI_NUM_OF_DEVICES 0xDC /* Number of devices */ |
| 184 | #define HDMI_HOT_PLUG_MSENS_STATUS 0xDF /* Hot plug/MSENS status */ |
| 185 | #define HDMI_BCAPS_WRITE 0xE0 /* bcaps */ |
| 186 | #define HDMI_BSTAT_7_0 0xE1 /* bstat[7:0] */ |
| 187 | #define HDMI_BSTAT_15_8 0xE2 /* bstat[15:8] */ |
| 188 | #define HDMI_BKSV_7_0 0xE3 /* bksv[7:0] */ |
| 189 | #define HDMI_BKSV_15_8 0xE4 /* bksv[15:8] */ |
| 190 | #define HDMI_BKSV_23_16 0xE5 /* bksv[23:16] */ |
| 191 | #define HDMI_BKSV_31_24 0xE6 /* bksv[31:24] */ |
| 192 | #define HDMI_BKSV_39_32 0xE7 /* bksv[39:32] */ |
| 193 | #define HDMI_AN_7_0 0xE8 /* An[7:0] */ |
| 194 | #define HDMI_AN_15_8 0xE9 /* An [15:8] */ |
| 195 | #define HDMI_AN_23_16 0xEA /* An [23:16] */ |
| 196 | #define HDMI_AN_31_24 0xEB /* An [31:24] */ |
| 197 | #define HDMI_AN_39_32 0xEC /* An [39:32] */ |
| 198 | #define HDMI_AN_47_40 0xED /* An [47:40] */ |
| 199 | #define HDMI_AN_55_48 0xEE /* An [55:48] */ |
| 200 | #define HDMI_AN_63_56 0xEF /* An [63:56] */ |
| 201 | #define HDMI_PRODUCT_ID 0xF0 /* Product ID */ |
| 202 | #define HDMI_REVISION_ID 0xF1 /* Revision ID */ |
| 203 | #define HDMI_TEST_MODE 0xFE /* Test mode */ |
| 204 | |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 205 | /* HDMI Control Register (HTOP1) */ |
| 206 | #define HDMI_HTOP1_TEST_MODE 0x0000 /* Test mode */ |
| 207 | #define HDMI_HTOP1_VIDEO_INPUT 0x0008 /* VideoInput */ |
| 208 | #define HDMI_HTOP1_CORE_RSTN 0x000C /* CoreResetn */ |
| 209 | #define HDMI_HTOP1_PLLBW 0x0018 /* PLLBW */ |
| 210 | #define HDMI_HTOP1_CLK_TO_PHY 0x001C /* Clk to Phy */ |
| 211 | #define HDMI_HTOP1_VIDEO_INPUT2 0x0020 /* VideoInput2 */ |
| 212 | #define HDMI_HTOP1_TISEMP0_1 0x0024 /* tisemp0-1 */ |
| 213 | #define HDMI_HTOP1_TISEMP2_C 0x0028 /* tisemp2-c */ |
| 214 | #define HDMI_HTOP1_TISIDRV 0x002C /* tisidrv */ |
| 215 | #define HDMI_HTOP1_TISEN 0x0034 /* tisen */ |
| 216 | #define HDMI_HTOP1_TISDREN 0x0038 /* tisdren */ |
| 217 | #define HDMI_HTOP1_CISRANGE 0x003C /* cisrange */ |
| 218 | #define HDMI_HTOP1_ENABLE_SELECTOR 0x0040 /* Enable Selector */ |
| 219 | #define HDMI_HTOP1_MACRO_RESET 0x0044 /* Macro reset */ |
| 220 | #define HDMI_HTOP1_PLL_CALIBRATION 0x0048 /* PLL calibration */ |
| 221 | #define HDMI_HTOP1_RE_CALIBRATION 0x004C /* Re-calibration */ |
| 222 | #define HDMI_HTOP1_CURRENT 0x0050 /* Current */ |
| 223 | #define HDMI_HTOP1_PLL_LOCK_DETECT 0x0054 /* PLL lock detect */ |
| 224 | #define HDMI_HTOP1_PHY_TEST_MODE 0x0058 /* PHY Test Mode */ |
| 225 | #define HDMI_HTOP1_CLK_SET 0x0080 /* Clock Set */ |
| 226 | #define HDMI_HTOP1_DDC_FAIL_SAFE 0x0084 /* DDC fail safe */ |
| 227 | #define HDMI_HTOP1_PRBS 0x0088 /* PRBS */ |
| 228 | #define HDMI_HTOP1_EDID_AINC_CONTROL 0x008C /* EDID ainc Control */ |
| 229 | #define HDMI_HTOP1_HTOP_DCL_MODE 0x00FC /* Deep Coloer Mode */ |
| 230 | #define HDMI_HTOP1_HTOP_DCL_FRC_COEF0 0x0100 /* Deep Color:FRC COEF0 */ |
| 231 | #define HDMI_HTOP1_HTOP_DCL_FRC_COEF1 0x0104 /* Deep Color:FRC COEF1 */ |
| 232 | #define HDMI_HTOP1_HTOP_DCL_FRC_COEF2 0x0108 /* Deep Color:FRC COEF2 */ |
| 233 | #define HDMI_HTOP1_HTOP_DCL_FRC_COEF3 0x010C /* Deep Color:FRC COEF3 */ |
| 234 | #define HDMI_HTOP1_HTOP_DCL_FRC_COEF0_C 0x0110 /* Deep Color:FRC COEF0C */ |
| 235 | #define HDMI_HTOP1_HTOP_DCL_FRC_COEF1_C 0x0114 /* Deep Color:FRC COEF1C */ |
| 236 | #define HDMI_HTOP1_HTOP_DCL_FRC_COEF2_C 0x0118 /* Deep Color:FRC COEF2C */ |
| 237 | #define HDMI_HTOP1_HTOP_DCL_FRC_COEF3_C 0x011C /* Deep Color:FRC COEF3C */ |
| 238 | #define HDMI_HTOP1_HTOP_DCL_FRC_MODE 0x0120 /* Deep Color:FRC Mode */ |
| 239 | #define HDMI_HTOP1_HTOP_DCL_RECT_START1 0x0124 /* Deep Color:Rect Start1 */ |
| 240 | #define HDMI_HTOP1_HTOP_DCL_RECT_SIZE1 0x0128 /* Deep Color:Rect Size1 */ |
| 241 | #define HDMI_HTOP1_HTOP_DCL_RECT_START2 0x012C /* Deep Color:Rect Start2 */ |
| 242 | #define HDMI_HTOP1_HTOP_DCL_RECT_SIZE2 0x0130 /* Deep Color:Rect Size2 */ |
| 243 | #define HDMI_HTOP1_HTOP_DCL_RECT_START3 0x0134 /* Deep Color:Rect Start3 */ |
| 244 | #define HDMI_HTOP1_HTOP_DCL_RECT_SIZE3 0x0138 /* Deep Color:Rect Size3 */ |
| 245 | #define HDMI_HTOP1_HTOP_DCL_RECT_START4 0x013C /* Deep Color:Rect Start4 */ |
| 246 | #define HDMI_HTOP1_HTOP_DCL_RECT_SIZE4 0x0140 /* Deep Color:Rect Size4 */ |
| 247 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_1 0x0144 /* Deep Color:Fil Para Y1_1 */ |
| 248 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_2 0x0148 /* Deep Color:Fil Para Y1_2 */ |
| 249 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_1 0x014C /* Deep Color:Fil Para CB1_1 */ |
| 250 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_2 0x0150 /* Deep Color:Fil Para CB1_2 */ |
| 251 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_1 0x0154 /* Deep Color:Fil Para CR1_1 */ |
| 252 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_2 0x0158 /* Deep Color:Fil Para CR1_2 */ |
| 253 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_1 0x015C /* Deep Color:Fil Para Y2_1 */ |
| 254 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_2 0x0160 /* Deep Color:Fil Para Y2_2 */ |
| 255 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_1 0x0164 /* Deep Color:Fil Para CB2_1 */ |
| 256 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_2 0x0168 /* Deep Color:Fil Para CB2_2 */ |
| 257 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_1 0x016C /* Deep Color:Fil Para CR2_1 */ |
| 258 | #define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_2 0x0170 /* Deep Color:Fil Para CR2_2 */ |
| 259 | #define HDMI_HTOP1_HTOP_DCL_COR_PARA_Y1 0x0174 /* Deep Color:Cor Para Y1 */ |
| 260 | #define HDMI_HTOP1_HTOP_DCL_COR_PARA_CB1 0x0178 /* Deep Color:Cor Para CB1 */ |
| 261 | #define HDMI_HTOP1_HTOP_DCL_COR_PARA_CR1 0x017C /* Deep Color:Cor Para CR1 */ |
| 262 | #define HDMI_HTOP1_HTOP_DCL_COR_PARA_Y2 0x0180 /* Deep Color:Cor Para Y2 */ |
| 263 | #define HDMI_HTOP1_HTOP_DCL_COR_PARA_CB2 0x0184 /* Deep Color:Cor Para CB2 */ |
| 264 | #define HDMI_HTOP1_HTOP_DCL_COR_PARA_CR2 0x0188 /* Deep Color:Cor Para CR2 */ |
| 265 | #define HDMI_HTOP1_EDID_DATA_READ 0x0200 /* EDID Data Read 128Byte:0x03FC */ |
| 266 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 267 | enum hotplug_state { |
| 268 | HDMI_HOTPLUG_DISCONNECTED, |
| 269 | HDMI_HOTPLUG_CONNECTED, |
| 270 | HDMI_HOTPLUG_EDID_DONE, |
| 271 | }; |
| 272 | |
| 273 | struct sh_hdmi { |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 274 | struct sh_mobile_lcdc_entity entity; |
| 275 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 276 | void __iomem *base; |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 277 | void __iomem *htop1; |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 278 | enum hotplug_state hp_state; /* hot-plug status */ |
Guennadi Liakhovetski | 0ea2af1 | 2010-11-04 11:06:17 +0000 | [diff] [blame] | 279 | u8 preprogrammed_vic; /* use a pre-programmed VIC or |
| 280 | the external mode */ |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 281 | u8 edid_block_addr; |
| 282 | u8 edid_segment_nr; |
| 283 | u8 edid_blocks; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 284 | struct clk *hdmi_clk; |
| 285 | struct device *dev; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 286 | struct delayed_work edid_work; |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 287 | struct fb_videomode mode; |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 288 | struct fb_monspecs monspec; |
Kuninori Morimoto | db6668d | 2012-05-07 21:07:49 -0700 | [diff] [blame] | 289 | |
| 290 | /* register access functions */ |
| 291 | void (*write)(struct sh_hdmi *hdmi, u8 data, u8 reg); |
| 292 | u8 (*read)(struct sh_hdmi *hdmi, u8 reg); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 293 | }; |
| 294 | |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 295 | #define entity_to_sh_hdmi(e) container_of(e, struct sh_hdmi, entity) |
Laurent Pinchart | 12ee250 | 2011-11-24 11:53:47 +0100 | [diff] [blame] | 296 | |
Kuninori Morimoto | db6668d | 2012-05-07 21:07:49 -0700 | [diff] [blame] | 297 | static void __hdmi_write8(struct sh_hdmi *hdmi, u8 data, u8 reg) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 298 | { |
| 299 | iowrite8(data, hdmi->base + reg); |
| 300 | } |
| 301 | |
Kuninori Morimoto | db6668d | 2012-05-07 21:07:49 -0700 | [diff] [blame] | 302 | static u8 __hdmi_read8(struct sh_hdmi *hdmi, u8 reg) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 303 | { |
| 304 | return ioread8(hdmi->base + reg); |
| 305 | } |
| 306 | |
Kuninori Morimoto | db6668d | 2012-05-07 21:07:49 -0700 | [diff] [blame] | 307 | static void __hdmi_write32(struct sh_hdmi *hdmi, u8 data, u8 reg) |
| 308 | { |
| 309 | iowrite32((u32)data, hdmi->base + (reg * 4)); |
| 310 | udelay(100); |
| 311 | } |
| 312 | |
| 313 | static u8 __hdmi_read32(struct sh_hdmi *hdmi, u8 reg) |
| 314 | { |
| 315 | return (u8)ioread32(hdmi->base + (reg * 4)); |
| 316 | } |
| 317 | |
| 318 | static void hdmi_write(struct sh_hdmi *hdmi, u8 data, u8 reg) |
| 319 | { |
| 320 | hdmi->write(hdmi, data, reg); |
| 321 | } |
| 322 | |
| 323 | static u8 hdmi_read(struct sh_hdmi *hdmi, u8 reg) |
| 324 | { |
| 325 | return hdmi->read(hdmi, reg); |
| 326 | } |
| 327 | |
Kuninori Morimoto | 3f521ab | 2012-05-07 21:06:54 -0700 | [diff] [blame] | 328 | static void hdmi_bit_set(struct sh_hdmi *hdmi, u8 mask, u8 data, u8 reg) |
| 329 | { |
| 330 | u8 val = hdmi_read(hdmi, reg); |
| 331 | |
| 332 | val &= ~mask; |
| 333 | val |= (data & mask); |
| 334 | |
| 335 | hdmi_write(hdmi, val, reg); |
| 336 | } |
| 337 | |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 338 | static void hdmi_htop1_write(struct sh_hdmi *hdmi, u32 data, u32 reg) |
| 339 | { |
| 340 | iowrite32(data, hdmi->htop1 + reg); |
| 341 | udelay(100); |
| 342 | } |
| 343 | |
| 344 | static u32 hdmi_htop1_read(struct sh_hdmi *hdmi, u32 reg) |
| 345 | { |
| 346 | return ioread32(hdmi->htop1 + reg); |
| 347 | } |
| 348 | |
Kuninori Morimoto | f4363b7 | 2010-09-09 11:47:49 +0900 | [diff] [blame] | 349 | /* |
| 350 | * HDMI sound |
| 351 | */ |
Kuninori Morimoto | 1d6be33 | 2010-08-31 14:47:07 +0900 | [diff] [blame] | 352 | static unsigned int sh_hdmi_snd_read(struct snd_soc_codec *codec, |
| 353 | unsigned int reg) |
| 354 | { |
| 355 | struct sh_hdmi *hdmi = snd_soc_codec_get_drvdata(codec); |
| 356 | |
| 357 | return hdmi_read(hdmi, reg); |
| 358 | } |
| 359 | |
| 360 | static int sh_hdmi_snd_write(struct snd_soc_codec *codec, |
| 361 | unsigned int reg, |
| 362 | unsigned int value) |
| 363 | { |
| 364 | struct sh_hdmi *hdmi = snd_soc_codec_get_drvdata(codec); |
| 365 | |
| 366 | hdmi_write(hdmi, value, reg); |
| 367 | return 0; |
| 368 | } |
| 369 | |
| 370 | static struct snd_soc_dai_driver sh_hdmi_dai = { |
| 371 | .name = "sh_mobile_hdmi-hifi", |
| 372 | .playback = { |
| 373 | .stream_name = "Playback", |
Kuninori Morimoto | 17731f8 | 2010-09-09 11:48:10 +0900 | [diff] [blame] | 374 | .channels_min = 2, |
| 375 | .channels_max = 8, |
| 376 | .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | |
| 377 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | |
| 378 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | |
| 379 | SNDRV_PCM_RATE_192000, |
Kuninori Morimoto | 1d6be33 | 2010-08-31 14:47:07 +0900 | [diff] [blame] | 380 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, |
| 381 | }, |
| 382 | }; |
| 383 | |
| 384 | static int sh_hdmi_snd_probe(struct snd_soc_codec *codec) |
| 385 | { |
| 386 | dev_info(codec->dev, "SH Mobile HDMI Audio Codec"); |
| 387 | |
| 388 | return 0; |
| 389 | } |
| 390 | |
| 391 | static struct snd_soc_codec_driver soc_codec_dev_sh_hdmi = { |
| 392 | .probe = sh_hdmi_snd_probe, |
| 393 | .read = sh_hdmi_snd_read, |
| 394 | .write = sh_hdmi_snd_write, |
| 395 | }; |
| 396 | |
Kuninori Morimoto | f4363b7 | 2010-09-09 11:47:49 +0900 | [diff] [blame] | 397 | /* |
| 398 | * HDMI video |
| 399 | */ |
Kuninori Morimoto | 1d6be33 | 2010-08-31 14:47:07 +0900 | [diff] [blame] | 400 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 401 | /* External video parameter settings */ |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 402 | static void sh_hdmi_external_video_param(struct sh_hdmi *hdmi) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 403 | { |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 404 | struct fb_videomode *mode = &hdmi->mode; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 405 | u16 htotal, hblank, hdelay, vtotal, vblank, vdelay, voffset; |
| 406 | u8 sync = 0; |
| 407 | |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 408 | htotal = mode->xres + mode->right_margin + mode->left_margin |
| 409 | + mode->hsync_len; |
| 410 | hdelay = mode->hsync_len + mode->left_margin; |
| 411 | hblank = mode->right_margin + hdelay; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 412 | |
| 413 | /* |
| 414 | * Vertical timing looks a bit different in Figure 18, |
| 415 | * but let's try the same first by setting offset = 0 |
| 416 | */ |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 417 | vtotal = mode->yres + mode->upper_margin + mode->lower_margin |
| 418 | + mode->vsync_len; |
| 419 | vdelay = mode->vsync_len + mode->upper_margin; |
| 420 | vblank = mode->lower_margin + vdelay; |
| 421 | voffset = min(mode->upper_margin / 2, 6U); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 422 | |
| 423 | /* |
| 424 | * [3]: VSYNC polarity: Positive |
| 425 | * [2]: HSYNC polarity: Positive |
| 426 | * [1]: Interlace/Progressive: Progressive |
| 427 | * [0]: External video settings enable: used. |
| 428 | */ |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 429 | if (mode->sync & FB_SYNC_HOR_HIGH_ACT) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 430 | sync |= 4; |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 431 | if (mode->sync & FB_SYNC_VERT_HIGH_ACT) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 432 | sync |= 8; |
| 433 | |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 434 | dev_dbg(hdmi->dev, "H: %u, %u, %u, %u; V: %u, %u, %u, %u; sync 0x%x\n", |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 435 | htotal, hblank, hdelay, mode->hsync_len, |
| 436 | vtotal, vblank, vdelay, mode->vsync_len, sync); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 437 | |
| 438 | hdmi_write(hdmi, sync | (voffset << 4), HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS); |
| 439 | |
| 440 | hdmi_write(hdmi, htotal, HDMI_EXTERNAL_H_TOTAL_7_0); |
| 441 | hdmi_write(hdmi, htotal >> 8, HDMI_EXTERNAL_H_TOTAL_11_8); |
| 442 | |
| 443 | hdmi_write(hdmi, hblank, HDMI_EXTERNAL_H_BLANK_7_0); |
| 444 | hdmi_write(hdmi, hblank >> 8, HDMI_EXTERNAL_H_BLANK_9_8); |
| 445 | |
| 446 | hdmi_write(hdmi, hdelay, HDMI_EXTERNAL_H_DELAY_7_0); |
| 447 | hdmi_write(hdmi, hdelay >> 8, HDMI_EXTERNAL_H_DELAY_9_8); |
| 448 | |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 449 | hdmi_write(hdmi, mode->hsync_len, HDMI_EXTERNAL_H_DURATION_7_0); |
| 450 | hdmi_write(hdmi, mode->hsync_len >> 8, HDMI_EXTERNAL_H_DURATION_9_8); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 451 | |
| 452 | hdmi_write(hdmi, vtotal, HDMI_EXTERNAL_V_TOTAL_7_0); |
| 453 | hdmi_write(hdmi, vtotal >> 8, HDMI_EXTERNAL_V_TOTAL_9_8); |
| 454 | |
| 455 | hdmi_write(hdmi, vblank, HDMI_EXTERNAL_V_BLANK); |
| 456 | |
| 457 | hdmi_write(hdmi, vdelay, HDMI_EXTERNAL_V_DELAY); |
| 458 | |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 459 | hdmi_write(hdmi, mode->vsync_len, HDMI_EXTERNAL_V_DURATION); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 460 | |
Guennadi Liakhovetski | 8971269 | 2010-09-03 07:20:20 +0000 | [diff] [blame] | 461 | /* Set bit 0 of HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS here for external mode */ |
Guennadi Liakhovetski | 0ea2af1 | 2010-11-04 11:06:17 +0000 | [diff] [blame] | 462 | if (!hdmi->preprogrammed_vic) |
Guennadi Liakhovetski | 8971269 | 2010-09-03 07:20:20 +0000 | [diff] [blame] | 463 | hdmi_write(hdmi, sync | 1 | (voffset << 4), |
| 464 | HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 465 | } |
| 466 | |
| 467 | /** |
| 468 | * sh_hdmi_video_config() |
| 469 | */ |
| 470 | static void sh_hdmi_video_config(struct sh_hdmi *hdmi) |
| 471 | { |
| 472 | /* |
| 473 | * [7:4]: Audio sampling frequency: 48kHz |
| 474 | * [3:1]: Input video format: RGB and YCbCr 4:4:4 (Y on Green) |
| 475 | * [0]: Internal/External DE select: internal |
| 476 | */ |
| 477 | hdmi_write(hdmi, 0x20, HDMI_AUDIO_VIDEO_SETTING_1); |
| 478 | |
| 479 | /* |
| 480 | * [7:6]: Video output format: RGB 4:4:4 |
| 481 | * [5:4]: Input video data width: 8 bit |
| 482 | * [3:1]: EAV/SAV location: channel 1 |
| 483 | * [0]: Video input color space: RGB |
| 484 | */ |
| 485 | hdmi_write(hdmi, 0x34, HDMI_VIDEO_SETTING_1); |
| 486 | |
| 487 | /* |
| 488 | * [7:6]: Together with bit [6] of HDMI_AUDIO_VIDEO_SETTING_2, which is |
| 489 | * left at 0 by default, this configures 24bpp and sets the Color Depth |
| 490 | * (CD) field in the General Control Packet |
| 491 | */ |
| 492 | hdmi_write(hdmi, 0x20, HDMI_DEEP_COLOR_MODES); |
| 493 | } |
| 494 | |
| 495 | /** |
| 496 | * sh_hdmi_audio_config() |
| 497 | */ |
| 498 | static void sh_hdmi_audio_config(struct sh_hdmi *hdmi) |
| 499 | { |
Kuninori Morimoto | 6d86577 | 2010-08-31 14:46:41 +0900 | [diff] [blame] | 500 | u8 data; |
| 501 | struct sh_mobile_hdmi_info *pdata = hdmi->dev->platform_data; |
| 502 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 503 | /* |
| 504 | * [7:4] L/R data swap control |
| 505 | * [3:0] appropriate N[19:16] |
| 506 | */ |
| 507 | hdmi_write(hdmi, 0x00, HDMI_L_R_DATA_SWAP_CTRL_RPKT); |
| 508 | /* appropriate N[15:8] */ |
| 509 | hdmi_write(hdmi, 0x18, HDMI_20_BIT_N_FOR_AUDIO_RPKT_15_8); |
| 510 | /* appropriate N[7:0] */ |
| 511 | hdmi_write(hdmi, 0x00, HDMI_20_BIT_N_FOR_AUDIO_RPKT_7_0); |
| 512 | |
| 513 | /* [7:4] 48 kHz SPDIF not used */ |
| 514 | hdmi_write(hdmi, 0x20, HDMI_SPDIF_AUDIO_SAMP_FREQ_CTS); |
| 515 | |
| 516 | /* |
| 517 | * [6:5] set required down sampling rate if required |
| 518 | * [4:3] set required audio source |
| 519 | */ |
Kuninori Morimoto | dec6aa4 | 2010-09-09 11:48:01 +0900 | [diff] [blame] | 520 | switch (pdata->flags & HDMI_SND_SRC_MASK) { |
Kuninori Morimoto | 6d86577 | 2010-08-31 14:46:41 +0900 | [diff] [blame] | 521 | default: |
Kuninori Morimoto | f4363b7 | 2010-09-09 11:47:49 +0900 | [diff] [blame] | 522 | /* fall through */ |
Kuninori Morimoto | dec6aa4 | 2010-09-09 11:48:01 +0900 | [diff] [blame] | 523 | case HDMI_SND_SRC_I2S: |
| 524 | data = 0x0 << 3; |
Kuninori Morimoto | 6d86577 | 2010-08-31 14:46:41 +0900 | [diff] [blame] | 525 | break; |
Kuninori Morimoto | dec6aa4 | 2010-09-09 11:48:01 +0900 | [diff] [blame] | 526 | case HDMI_SND_SRC_SPDIF: |
| 527 | data = 0x1 << 3; |
Kuninori Morimoto | 6d86577 | 2010-08-31 14:46:41 +0900 | [diff] [blame] | 528 | break; |
Kuninori Morimoto | dec6aa4 | 2010-09-09 11:48:01 +0900 | [diff] [blame] | 529 | case HDMI_SND_SRC_DSD: |
| 530 | data = 0x2 << 3; |
Kuninori Morimoto | 6d86577 | 2010-08-31 14:46:41 +0900 | [diff] [blame] | 531 | break; |
Kuninori Morimoto | dec6aa4 | 2010-09-09 11:48:01 +0900 | [diff] [blame] | 532 | case HDMI_SND_SRC_HBR: |
| 533 | data = 0x3 << 3; |
Kuninori Morimoto | 6d86577 | 2010-08-31 14:46:41 +0900 | [diff] [blame] | 534 | break; |
| 535 | } |
| 536 | hdmi_write(hdmi, data, HDMI_AUDIO_SETTING_1); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 537 | |
| 538 | /* [3:0] set sending channel number for channel status */ |
| 539 | hdmi_write(hdmi, 0x40, HDMI_AUDIO_SETTING_2); |
| 540 | |
| 541 | /* |
| 542 | * [5:2] set valid I2S source input pin |
| 543 | * [1:0] set input I2S source mode |
| 544 | */ |
| 545 | hdmi_write(hdmi, 0x04, HDMI_I2S_AUDIO_SET); |
| 546 | |
| 547 | /* [7:4] set valid DSD source input pin */ |
| 548 | hdmi_write(hdmi, 0x00, HDMI_DSD_AUDIO_SET); |
| 549 | |
| 550 | /* [7:0] set appropriate I2S input pin swap settings if required */ |
| 551 | hdmi_write(hdmi, 0x00, HDMI_I2S_INPUT_PIN_SWAP); |
| 552 | |
| 553 | /* |
| 554 | * [7] set validity bit for channel status |
| 555 | * [3:0] set original sample frequency for channel status |
| 556 | */ |
| 557 | hdmi_write(hdmi, 0x00, HDMI_AUDIO_STATUS_BITS_SETTING_1); |
| 558 | |
| 559 | /* |
| 560 | * [7] set value for channel status |
| 561 | * [6] set value for channel status |
| 562 | * [5] set copyright bit for channel status |
| 563 | * [4:2] set additional information for channel status |
| 564 | * [1:0] set clock accuracy for channel status |
| 565 | */ |
| 566 | hdmi_write(hdmi, 0x00, HDMI_AUDIO_STATUS_BITS_SETTING_2); |
| 567 | |
| 568 | /* [7:0] set category code for channel status */ |
| 569 | hdmi_write(hdmi, 0x00, HDMI_CATEGORY_CODE); |
| 570 | |
| 571 | /* |
| 572 | * [7:4] set source number for channel status |
| 573 | * [3:0] set word length for channel status |
| 574 | */ |
| 575 | hdmi_write(hdmi, 0x00, HDMI_SOURCE_NUM_AUDIO_WORD_LEN); |
| 576 | |
| 577 | /* [7:4] set sample frequency for channel status */ |
| 578 | hdmi_write(hdmi, 0x20, HDMI_AUDIO_VIDEO_SETTING_1); |
| 579 | } |
| 580 | |
| 581 | /** |
Guennadi Liakhovetski | 6e45746 | 2010-09-03 07:20:16 +0000 | [diff] [blame] | 582 | * sh_hdmi_phy_config() - configure the HDMI PHY for the used video mode |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 583 | */ |
| 584 | static void sh_hdmi_phy_config(struct sh_hdmi *hdmi) |
| 585 | { |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 586 | if (hdmi->mode.pixclock < 10000) { |
Guennadi Liakhovetski | 0ea2af1 | 2010-11-04 11:06:17 +0000 | [diff] [blame] | 587 | /* for 1080p8bit 148MHz */ |
| 588 | hdmi_write(hdmi, 0x1d, HDMI_SLIPHDMIT_PARAM_SETTINGS_1); |
| 589 | hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2); |
| 590 | hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3); |
| 591 | hdmi_write(hdmi, 0x4c, HDMI_SLIPHDMIT_PARAM_SETTINGS_5); |
| 592 | hdmi_write(hdmi, 0x1e, HDMI_SLIPHDMIT_PARAM_SETTINGS_6); |
| 593 | hdmi_write(hdmi, 0x48, HDMI_SLIPHDMIT_PARAM_SETTINGS_7); |
| 594 | hdmi_write(hdmi, 0x0e, HDMI_SLIPHDMIT_PARAM_SETTINGS_8); |
| 595 | hdmi_write(hdmi, 0x25, HDMI_SLIPHDMIT_PARAM_SETTINGS_9); |
| 596 | hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10); |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 597 | } else if (hdmi->mode.pixclock < 30000) { |
Guennadi Liakhovetski | 6e45746 | 2010-09-03 07:20:16 +0000 | [diff] [blame] | 598 | /* 720p, 8bit, 74.25MHz. Might need to be adjusted for other formats */ |
| 599 | /* |
| 600 | * [1:0] Speed_A |
| 601 | * [3:2] Speed_B |
| 602 | * [4] PLLA_Bypass |
| 603 | * [6] DRV_TEST_EN |
| 604 | * [7] DRV_TEST_IN |
| 605 | */ |
Guennadi Liakhovetski | 9289c47 | 2010-09-03 07:20:35 +0000 | [diff] [blame] | 606 | hdmi_write(hdmi, 0x0f, HDMI_SLIPHDMIT_PARAM_SETTINGS_1); |
Guennadi Liakhovetski | 6e45746 | 2010-09-03 07:20:16 +0000 | [diff] [blame] | 607 | /* PLLB_CONFIG[17], PLLA_CONFIG[17] - not in PHY datasheet */ |
| 608 | hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2); |
| 609 | /* |
| 610 | * [2:0] BGR_I_OFFSET |
| 611 | * [6:4] BGR_V_OFFSET |
| 612 | */ |
| 613 | hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3); |
| 614 | /* PLLA_CONFIG[7:0]: VCO gain, VCO offset, LPF resistance[0] */ |
| 615 | hdmi_write(hdmi, 0x44, HDMI_SLIPHDMIT_PARAM_SETTINGS_5); |
| 616 | /* |
| 617 | * PLLA_CONFIG[15:8]: regulator voltage[0], CP current, |
| 618 | * LPF capacitance, LPF resistance[1] |
| 619 | */ |
| 620 | hdmi_write(hdmi, 0x32, HDMI_SLIPHDMIT_PARAM_SETTINGS_6); |
| 621 | /* PLLB_CONFIG[7:0]: LPF resistance[0], VCO offset, VCO gain */ |
| 622 | hdmi_write(hdmi, 0x4A, HDMI_SLIPHDMIT_PARAM_SETTINGS_7); |
| 623 | /* |
| 624 | * PLLB_CONFIG[15:8]: regulator voltage[0], CP current, |
| 625 | * LPF capacitance, LPF resistance[1] |
| 626 | */ |
Guennadi Liakhovetski | 9289c47 | 2010-09-03 07:20:35 +0000 | [diff] [blame] | 627 | hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_8); |
Guennadi Liakhovetski | 6e45746 | 2010-09-03 07:20:16 +0000 | [diff] [blame] | 628 | /* DRV_CONFIG, PE_CONFIG */ |
| 629 | hdmi_write(hdmi, 0x25, HDMI_SLIPHDMIT_PARAM_SETTINGS_9); |
| 630 | /* |
| 631 | * [2:0] AMON_SEL (4 == LPF voltage) |
| 632 | * [4] PLLA_CONFIG[16] |
| 633 | * [5] PLLB_CONFIG[16] |
| 634 | */ |
| 635 | hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10); |
| 636 | } else { |
| 637 | /* for 480p8bit 27MHz */ |
| 638 | hdmi_write(hdmi, 0x19, HDMI_SLIPHDMIT_PARAM_SETTINGS_1); |
| 639 | hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2); |
| 640 | hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3); |
| 641 | hdmi_write(hdmi, 0x44, HDMI_SLIPHDMIT_PARAM_SETTINGS_5); |
| 642 | hdmi_write(hdmi, 0x32, HDMI_SLIPHDMIT_PARAM_SETTINGS_6); |
| 643 | hdmi_write(hdmi, 0x48, HDMI_SLIPHDMIT_PARAM_SETTINGS_7); |
| 644 | hdmi_write(hdmi, 0x0F, HDMI_SLIPHDMIT_PARAM_SETTINGS_8); |
| 645 | hdmi_write(hdmi, 0x20, HDMI_SLIPHDMIT_PARAM_SETTINGS_9); |
| 646 | hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10); |
| 647 | } |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 648 | } |
| 649 | |
| 650 | /** |
| 651 | * sh_hdmi_avi_infoframe_setup() - Auxiliary Video Information InfoFrame CONTROL PACKET |
| 652 | */ |
| 653 | static void sh_hdmi_avi_infoframe_setup(struct sh_hdmi *hdmi) |
| 654 | { |
Guennadi Liakhovetski | 6e45746 | 2010-09-03 07:20:16 +0000 | [diff] [blame] | 655 | u8 vic; |
| 656 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 657 | /* AVI InfoFrame */ |
| 658 | hdmi_write(hdmi, 0x06, HDMI_CTRL_PKT_BUF_INDEX); |
| 659 | |
| 660 | /* Packet Type = 0x82 */ |
| 661 | hdmi_write(hdmi, 0x82, HDMI_CTRL_PKT_BUF_ACCESS_HB0); |
| 662 | |
| 663 | /* Version = 0x02 */ |
| 664 | hdmi_write(hdmi, 0x02, HDMI_CTRL_PKT_BUF_ACCESS_HB1); |
| 665 | |
| 666 | /* Length = 13 (0x0D) */ |
| 667 | hdmi_write(hdmi, 0x0D, HDMI_CTRL_PKT_BUF_ACCESS_HB2); |
| 668 | |
| 669 | /* N. A. Checksum */ |
| 670 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB0); |
| 671 | |
| 672 | /* |
| 673 | * Y = RGB |
| 674 | * A0 = No Data |
| 675 | * B = Bar Data not valid |
| 676 | * S = No Data |
| 677 | */ |
| 678 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB1); |
| 679 | |
| 680 | /* |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 681 | * [7:6] C = Colorimetry: no data |
| 682 | * [5:4] M = 2: 16:9, 1: 4:3 Picture Aspect Ratio |
| 683 | * [3:0] R = 8: Active Frame Aspect Ratio: same as picture aspect ratio |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 684 | */ |
| 685 | hdmi_write(hdmi, 0x28, HDMI_CTRL_PKT_BUF_ACCESS_PB2); |
| 686 | |
| 687 | /* |
| 688 | * ITC = No Data |
| 689 | * EC = xvYCC601 |
| 690 | * Q = Default (depends on video format) |
| 691 | * SC = No Known non_uniform Scaling |
| 692 | */ |
| 693 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB3); |
| 694 | |
| 695 | /* |
Guennadi Liakhovetski | 0ea2af1 | 2010-11-04 11:06:17 +0000 | [diff] [blame] | 696 | * VIC should be ignored if external config is used, so, we could just use 0, |
| 697 | * but play safe and use a valid value in any case just in case |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 698 | */ |
Guennadi Liakhovetski | 0ea2af1 | 2010-11-04 11:06:17 +0000 | [diff] [blame] | 699 | if (hdmi->preprogrammed_vic) |
| 700 | vic = hdmi->preprogrammed_vic; |
Guennadi Liakhovetski | 6e45746 | 2010-09-03 07:20:16 +0000 | [diff] [blame] | 701 | else |
| 702 | vic = 4; |
| 703 | hdmi_write(hdmi, vic, HDMI_CTRL_PKT_BUF_ACCESS_PB4); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 704 | |
| 705 | /* PR = No Repetition */ |
| 706 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB5); |
| 707 | |
| 708 | /* Line Number of End of Top Bar (lower 8 bits) */ |
| 709 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB6); |
| 710 | |
| 711 | /* Line Number of End of Top Bar (upper 8 bits) */ |
| 712 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB7); |
| 713 | |
| 714 | /* Line Number of Start of Bottom Bar (lower 8 bits) */ |
| 715 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB8); |
| 716 | |
| 717 | /* Line Number of Start of Bottom Bar (upper 8 bits) */ |
| 718 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB9); |
| 719 | |
| 720 | /* Pixel Number of End of Left Bar (lower 8 bits) */ |
| 721 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB10); |
| 722 | |
| 723 | /* Pixel Number of End of Left Bar (upper 8 bits) */ |
| 724 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB11); |
| 725 | |
| 726 | /* Pixel Number of Start of Right Bar (lower 8 bits) */ |
| 727 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB12); |
| 728 | |
| 729 | /* Pixel Number of Start of Right Bar (upper 8 bits) */ |
| 730 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB13); |
| 731 | } |
| 732 | |
| 733 | /** |
| 734 | * sh_hdmi_audio_infoframe_setup() - Audio InfoFrame of CONTROL PACKET |
| 735 | */ |
| 736 | static void sh_hdmi_audio_infoframe_setup(struct sh_hdmi *hdmi) |
| 737 | { |
| 738 | /* Audio InfoFrame */ |
| 739 | hdmi_write(hdmi, 0x08, HDMI_CTRL_PKT_BUF_INDEX); |
| 740 | |
| 741 | /* Packet Type = 0x84 */ |
| 742 | hdmi_write(hdmi, 0x84, HDMI_CTRL_PKT_BUF_ACCESS_HB0); |
| 743 | |
| 744 | /* Version Number = 0x01 */ |
| 745 | hdmi_write(hdmi, 0x01, HDMI_CTRL_PKT_BUF_ACCESS_HB1); |
| 746 | |
| 747 | /* 0 Length = 10 (0x0A) */ |
| 748 | hdmi_write(hdmi, 0x0A, HDMI_CTRL_PKT_BUF_ACCESS_HB2); |
| 749 | |
| 750 | /* n. a. Checksum */ |
| 751 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB0); |
| 752 | |
| 753 | /* Audio Channel Count = Refer to Stream Header */ |
| 754 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB1); |
| 755 | |
| 756 | /* Refer to Stream Header */ |
| 757 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB2); |
| 758 | |
| 759 | /* Format depends on coding type (i.e. CT0...CT3) */ |
| 760 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB3); |
| 761 | |
| 762 | /* Speaker Channel Allocation = Front Right + Front Left */ |
| 763 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB4); |
| 764 | |
| 765 | /* Level Shift Value = 0 dB, Down - mix is permitted or no information */ |
| 766 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB5); |
| 767 | |
| 768 | /* Reserved (0) */ |
| 769 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB6); |
| 770 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB7); |
| 771 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB8); |
| 772 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB9); |
| 773 | hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB10); |
| 774 | } |
| 775 | |
| 776 | /** |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 777 | * sh_hdmi_configure() - Initialise HDMI for output |
| 778 | */ |
| 779 | static void sh_hdmi_configure(struct sh_hdmi *hdmi) |
| 780 | { |
| 781 | /* Configure video format */ |
| 782 | sh_hdmi_video_config(hdmi); |
| 783 | |
| 784 | /* Configure audio format */ |
| 785 | sh_hdmi_audio_config(hdmi); |
| 786 | |
| 787 | /* Configure PHY */ |
| 788 | sh_hdmi_phy_config(hdmi); |
| 789 | |
| 790 | /* Auxiliary Video Information (AVI) InfoFrame */ |
| 791 | sh_hdmi_avi_infoframe_setup(hdmi); |
| 792 | |
| 793 | /* Audio InfoFrame */ |
| 794 | sh_hdmi_audio_infoframe_setup(hdmi); |
| 795 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 796 | /* |
| 797 | * Control packet auto send with VSYNC control: auto send |
| 798 | * General control, Gamut metadata, ISRC, and ACP packets |
| 799 | */ |
| 800 | hdmi_write(hdmi, 0x8E, HDMI_CTRL_PKT_AUTO_SEND); |
| 801 | |
| 802 | /* FIXME */ |
| 803 | msleep(10); |
| 804 | |
| 805 | /* PS mode b->d, reset PLLA and PLLB */ |
Kuninori Morimoto | 3f521ab | 2012-05-07 21:06:54 -0700 | [diff] [blame] | 806 | hdmi_bit_set(hdmi, 0xFC, 0x4C, HDMI_SYSTEM_CTRL); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 807 | |
| 808 | udelay(10); |
| 809 | |
Kuninori Morimoto | 3f521ab | 2012-05-07 21:06:54 -0700 | [diff] [blame] | 810 | hdmi_bit_set(hdmi, 0xFC, 0x40, HDMI_SYSTEM_CTRL); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 811 | } |
| 812 | |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 813 | static unsigned long sh_hdmi_rate_error(struct sh_hdmi *hdmi, |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 814 | const struct fb_videomode *mode, |
| 815 | unsigned long *hdmi_rate, unsigned long *parent_rate) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 816 | { |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 817 | unsigned long target = PICOS2KHZ(mode->pixclock) * 1000, rate_error; |
| 818 | struct sh_mobile_hdmi_info *pdata = hdmi->dev->platform_data; |
| 819 | |
| 820 | *hdmi_rate = clk_round_rate(hdmi->hdmi_clk, target); |
| 821 | if ((long)*hdmi_rate < 0) |
| 822 | *hdmi_rate = clk_get_rate(hdmi->hdmi_clk); |
| 823 | |
| 824 | rate_error = (long)*hdmi_rate > 0 ? abs(*hdmi_rate - target) : ULONG_MAX; |
| 825 | if (rate_error && pdata->clk_optimize_parent) |
| 826 | rate_error = pdata->clk_optimize_parent(target, hdmi_rate, parent_rate); |
| 827 | else if (clk_get_parent(hdmi->hdmi_clk)) |
| 828 | *parent_rate = clk_get_rate(clk_get_parent(hdmi->hdmi_clk)); |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 829 | |
| 830 | dev_dbg(hdmi->dev, "%u-%u-%u-%u x %u-%u-%u-%u\n", |
| 831 | mode->left_margin, mode->xres, |
| 832 | mode->right_margin, mode->hsync_len, |
| 833 | mode->upper_margin, mode->yres, |
| 834 | mode->lower_margin, mode->vsync_len); |
| 835 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 836 | dev_dbg(hdmi->dev, "\t@%lu(+/-%lu)Hz, e=%lu / 1000, r=%uHz, p=%luHz\n", target, |
| 837 | rate_error, rate_error ? 10000 / (10 * target / rate_error) : 0, |
| 838 | mode->refresh, *parent_rate); |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 839 | |
| 840 | return rate_error; |
| 841 | } |
| 842 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 843 | static int sh_hdmi_read_edid(struct sh_hdmi *hdmi, unsigned long *hdmi_rate, |
| 844 | unsigned long *parent_rate) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 845 | { |
Laurent Pinchart | 7295752 | 2011-09-18 14:18:28 +0200 | [diff] [blame] | 846 | struct sh_mobile_lcdc_chan *ch = hdmi->entity.lcdc; |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 847 | const struct fb_videomode *mode, *found = NULL; |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 848 | unsigned int f_width = 0, f_height = 0, f_refresh = 0; |
| 849 | unsigned long found_rate_error = ULONG_MAX; /* silly compiler... */ |
Guennadi Liakhovetski | c7321d6 | 2011-01-07 11:57:55 +0000 | [diff] [blame] | 850 | bool scanning = false, preferred_bad = false; |
Laurent Pinchart | 13f80ee | 2011-11-29 01:46:12 +0100 | [diff] [blame] | 851 | bool use_edid_mode = false; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 852 | u8 edid[128]; |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 853 | char *forced; |
| 854 | int i; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 855 | |
| 856 | /* Read EDID */ |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 857 | dev_dbg(hdmi->dev, "Read back EDID code:"); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 858 | for (i = 0; i < 128; i++) { |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 859 | edid[i] = (hdmi->htop1) ? |
| 860 | (u8)hdmi_htop1_read(hdmi, HDMI_HTOP1_EDID_DATA_READ + (i * 4)) : |
| 861 | hdmi_read(hdmi, HDMI_EDID_KSV_FIFO_ACCESS_WINDOW); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 862 | #ifdef DEBUG |
| 863 | if ((i % 16) == 0) { |
| 864 | printk(KERN_CONT "\n"); |
| 865 | printk(KERN_DEBUG "%02X | %02X", i, edid[i]); |
| 866 | } else { |
| 867 | printk(KERN_CONT " %02X", edid[i]); |
| 868 | } |
| 869 | #endif |
| 870 | } |
| 871 | #ifdef DEBUG |
| 872 | printk(KERN_CONT "\n"); |
| 873 | #endif |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 874 | |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 875 | if (!hdmi->edid_blocks) { |
| 876 | fb_edid_to_monspecs(edid, &hdmi->monspec); |
| 877 | hdmi->edid_blocks = edid[126] + 1; |
| 878 | |
| 879 | dev_dbg(hdmi->dev, "%d main modes, %d extension blocks\n", |
| 880 | hdmi->monspec.modedb_len, hdmi->edid_blocks - 1); |
| 881 | } else { |
| 882 | dev_dbg(hdmi->dev, "Extension %u detected, DTD start %u\n", |
| 883 | edid[0], edid[2]); |
| 884 | fb_edid_add_monspecs(edid, &hdmi->monspec); |
| 885 | } |
| 886 | |
| 887 | if (hdmi->edid_blocks > hdmi->edid_segment_nr * 2 + |
| 888 | (hdmi->edid_block_addr >> 7) + 1) { |
| 889 | /* More blocks to read */ |
| 890 | if (hdmi->edid_block_addr) { |
| 891 | hdmi->edid_block_addr = 0; |
| 892 | hdmi->edid_segment_nr++; |
| 893 | } else { |
| 894 | hdmi->edid_block_addr = 0x80; |
| 895 | } |
| 896 | /* Set EDID word address */ |
| 897 | hdmi_write(hdmi, hdmi->edid_block_addr, HDMI_EDID_WORD_ADDRESS); |
| 898 | /* Enable EDID interrupt */ |
| 899 | hdmi_write(hdmi, 0xC6, HDMI_INTERRUPT_MASK_1); |
| 900 | /* Set EDID segment pointer - starts reading EDID */ |
| 901 | hdmi_write(hdmi, hdmi->edid_segment_nr, HDMI_EDID_SEGMENT_POINTER); |
| 902 | return -EAGAIN; |
| 903 | } |
| 904 | |
| 905 | /* All E-EDID blocks ready */ |
| 906 | dev_dbg(hdmi->dev, "%d main and extended modes\n", hdmi->monspec.modedb_len); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 907 | |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 908 | fb_get_options("sh_mobile_lcdc", &forced); |
| 909 | if (forced && *forced) { |
| 910 | /* Only primitive parsing so far */ |
| 911 | i = sscanf(forced, "%ux%u@%u", |
| 912 | &f_width, &f_height, &f_refresh); |
| 913 | if (i < 2) { |
| 914 | f_width = 0; |
| 915 | f_height = 0; |
Guennadi Liakhovetski | c7321d6 | 2011-01-07 11:57:55 +0000 | [diff] [blame] | 916 | } else { |
| 917 | /* The user wants us to use the EDID data */ |
| 918 | scanning = true; |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 919 | } |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 920 | dev_dbg(hdmi->dev, "Forced mode %ux%u@%uHz\n", |
| 921 | f_width, f_height, f_refresh); |
| 922 | } |
| 923 | |
| 924 | /* Walk monitor modes to find the best or the exact match */ |
| 925 | for (i = 0, mode = hdmi->monspec.modedb; |
Guennadi Liakhovetski | c7321d6 | 2011-01-07 11:57:55 +0000 | [diff] [blame] | 926 | i < hdmi->monspec.modedb_len && scanning; |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 927 | i++, mode++) { |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 928 | unsigned long rate_error; |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 929 | |
Guennadi Liakhovetski | c7321d6 | 2011-01-07 11:57:55 +0000 | [diff] [blame] | 930 | if (!f_width && !f_height) { |
| 931 | /* |
| 932 | * A parameter string "video=sh_mobile_lcdc:0x0" means |
| 933 | * use the preferred EDID mode. If it is rejected by |
| 934 | * .fb_check_var(), keep looking, until an acceptable |
| 935 | * one is found. |
| 936 | */ |
| 937 | if ((mode->flag & FB_MODE_IS_FIRST) || preferred_bad) |
| 938 | scanning = false; |
| 939 | else |
| 940 | continue; |
| 941 | } else if (f_width != mode->xres || f_height != mode->yres) { |
| 942 | /* No interest in unmatching modes */ |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 943 | continue; |
Guennadi Liakhovetski | c7321d6 | 2011-01-07 11:57:55 +0000 | [diff] [blame] | 944 | } |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 945 | |
| 946 | rate_error = sh_hdmi_rate_error(hdmi, mode, hdmi_rate, parent_rate); |
| 947 | |
Guennadi Liakhovetski | c7321d6 | 2011-01-07 11:57:55 +0000 | [diff] [blame] | 948 | if (scanning) { |
| 949 | if (f_refresh == mode->refresh || (!f_refresh && !rate_error)) |
| 950 | /* |
| 951 | * Exact match if either the refresh rate |
| 952 | * matches or it hasn't been specified and we've |
| 953 | * found a mode, for which we can configure the |
| 954 | * clock precisely |
| 955 | */ |
| 956 | scanning = false; |
| 957 | else if (found && found_rate_error <= rate_error) |
| 958 | /* |
| 959 | * We otherwise search for the closest matching |
| 960 | * clock rate - either if no refresh rate has |
| 961 | * been specified or we cannot find an exactly |
| 962 | * matching one |
| 963 | */ |
| 964 | continue; |
| 965 | } |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 966 | |
| 967 | /* Check if supported: sufficient fb memory, supported clock-rate */ |
Laurent Pinchart | 7295752 | 2011-09-18 14:18:28 +0200 | [diff] [blame] | 968 | if (ch && ch->notify && |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 969 | ch->notify(ch, SH_MOBILE_LCDC_EVENT_DISPLAY_MODE, mode, |
| 970 | NULL)) { |
Guennadi Liakhovetski | c7321d6 | 2011-01-07 11:57:55 +0000 | [diff] [blame] | 971 | scanning = true; |
| 972 | preferred_bad = true; |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 973 | continue; |
| 974 | } |
| 975 | |
| 976 | found = mode; |
| 977 | found_rate_error = rate_error; |
Laurent Pinchart | 13f80ee | 2011-11-29 01:46:12 +0100 | [diff] [blame] | 978 | use_edid_mode = true; |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 979 | } |
| 980 | |
| 981 | /* |
Laurent Pinchart | 13f80ee | 2011-11-29 01:46:12 +0100 | [diff] [blame] | 982 | * TODO 1: if no default mode is present, postpone running the config |
| 983 | * until after the LCDC channel is initialized. |
Guennadi Liakhovetski | f1198d1 | 2010-10-15 07:54:04 +0000 | [diff] [blame] | 984 | * TODO 2: consider registering the HDMI platform device from the LCDC |
Laurent Pinchart | 13f80ee | 2011-11-29 01:46:12 +0100 | [diff] [blame] | 985 | * driver. |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 986 | */ |
Laurent Pinchart | 13f80ee | 2011-11-29 01:46:12 +0100 | [diff] [blame] | 987 | if (!found && hdmi->entity.def_mode.xres != 0) { |
| 988 | found = &hdmi->entity.def_mode; |
| 989 | found_rate_error = sh_hdmi_rate_error(hdmi, found, hdmi_rate, |
| 990 | parent_rate); |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 991 | } |
| 992 | |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 993 | /* No cookie today */ |
| 994 | if (!found) |
| 995 | return -ENXIO; |
| 996 | |
Guennadi Liakhovetski | 0ea2af1 | 2010-11-04 11:06:17 +0000 | [diff] [blame] | 997 | if (found->xres == 640 && found->yres == 480 && found->refresh == 60) |
| 998 | hdmi->preprogrammed_vic = 1; |
| 999 | else if (found->xres == 720 && found->yres == 480 && found->refresh == 60) |
| 1000 | hdmi->preprogrammed_vic = 2; |
| 1001 | else if (found->xres == 720 && found->yres == 576 && found->refresh == 50) |
| 1002 | hdmi->preprogrammed_vic = 17; |
| 1003 | else if (found->xres == 1280 && found->yres == 720 && found->refresh == 60) |
| 1004 | hdmi->preprogrammed_vic = 4; |
| 1005 | else if (found->xres == 1920 && found->yres == 1080 && found->refresh == 24) |
| 1006 | hdmi->preprogrammed_vic = 32; |
| 1007 | else if (found->xres == 1920 && found->yres == 1080 && found->refresh == 50) |
| 1008 | hdmi->preprogrammed_vic = 31; |
| 1009 | else if (found->xres == 1920 && found->yres == 1080 && found->refresh == 60) |
| 1010 | hdmi->preprogrammed_vic = 16; |
Guennadi Liakhovetski | 8971269 | 2010-09-03 07:20:20 +0000 | [diff] [blame] | 1011 | else |
Guennadi Liakhovetski | 0ea2af1 | 2010-11-04 11:06:17 +0000 | [diff] [blame] | 1012 | hdmi->preprogrammed_vic = 0; |
Guennadi Liakhovetski | 8971269 | 2010-09-03 07:20:20 +0000 | [diff] [blame] | 1013 | |
Laurent Pinchart | 13f80ee | 2011-11-29 01:46:12 +0100 | [diff] [blame] | 1014 | dev_dbg(hdmi->dev, "Using %s %s mode %ux%u@%uHz (%luHz), " |
| 1015 | "clock error %luHz\n", use_edid_mode ? "EDID" : "default", |
| 1016 | hdmi->preprogrammed_vic ? "VIC" : "external", found->xres, |
| 1017 | found->yres, found->refresh, PICOS2KHZ(found->pixclock) * 1000, |
| 1018 | found_rate_error); |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1019 | |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 1020 | hdmi->mode = *found; |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 1021 | sh_hdmi_external_video_param(hdmi); |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1022 | |
| 1023 | return 0; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1024 | } |
| 1025 | |
| 1026 | static irqreturn_t sh_hdmi_hotplug(int irq, void *dev_id) |
| 1027 | { |
| 1028 | struct sh_hdmi *hdmi = dev_id; |
| 1029 | u8 status1, status2, mask1, mask2; |
| 1030 | |
| 1031 | /* mode_b and PLLA and PLLB reset */ |
Kuninori Morimoto | 3f521ab | 2012-05-07 21:06:54 -0700 | [diff] [blame] | 1032 | hdmi_bit_set(hdmi, 0xFC, 0x2C, HDMI_SYSTEM_CTRL); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1033 | |
| 1034 | /* How long shall reset be held? */ |
| 1035 | udelay(10); |
| 1036 | |
| 1037 | /* mode_b and PLLA and PLLB reset release */ |
Kuninori Morimoto | 3f521ab | 2012-05-07 21:06:54 -0700 | [diff] [blame] | 1038 | hdmi_bit_set(hdmi, 0xFC, 0x20, HDMI_SYSTEM_CTRL); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1039 | |
| 1040 | status1 = hdmi_read(hdmi, HDMI_INTERRUPT_STATUS_1); |
| 1041 | status2 = hdmi_read(hdmi, HDMI_INTERRUPT_STATUS_2); |
| 1042 | |
| 1043 | mask1 = hdmi_read(hdmi, HDMI_INTERRUPT_MASK_1); |
| 1044 | mask2 = hdmi_read(hdmi, HDMI_INTERRUPT_MASK_2); |
| 1045 | |
| 1046 | /* Correct would be to ack only set bits, but the datasheet requires 0xff */ |
| 1047 | hdmi_write(hdmi, 0xFF, HDMI_INTERRUPT_STATUS_1); |
| 1048 | hdmi_write(hdmi, 0xFF, HDMI_INTERRUPT_STATUS_2); |
| 1049 | |
| 1050 | if (printk_ratelimit()) |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 1051 | dev_dbg(hdmi->dev, "IRQ #%d: Status #1: 0x%x & 0x%x, #2: 0x%x & 0x%x\n", |
| 1052 | irq, status1, mask1, status2, mask2); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1053 | |
| 1054 | if (!((status1 & mask1) | (status2 & mask2))) { |
| 1055 | return IRQ_NONE; |
| 1056 | } else if (status1 & 0xc0) { |
| 1057 | u8 msens; |
| 1058 | |
| 1059 | /* Datasheet specifies 10ms... */ |
| 1060 | udelay(500); |
| 1061 | |
| 1062 | msens = hdmi_read(hdmi, HDMI_HOT_PLUG_MSENS_STATUS); |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 1063 | dev_dbg(hdmi->dev, "MSENS 0x%x\n", msens); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1064 | /* Check, if hot plug & MSENS pin status are both high */ |
| 1065 | if ((msens & 0xC0) == 0xC0) { |
| 1066 | /* Display plug in */ |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1067 | hdmi->edid_segment_nr = 0; |
| 1068 | hdmi->edid_block_addr = 0; |
| 1069 | hdmi->edid_blocks = 0; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1070 | hdmi->hp_state = HDMI_HOTPLUG_CONNECTED; |
| 1071 | |
| 1072 | /* Set EDID word address */ |
| 1073 | hdmi_write(hdmi, 0x00, HDMI_EDID_WORD_ADDRESS); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1074 | /* Enable EDID interrupt */ |
| 1075 | hdmi_write(hdmi, 0xC6, HDMI_INTERRUPT_MASK_1); |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1076 | /* Set EDID segment pointer - starts reading EDID */ |
| 1077 | hdmi_write(hdmi, 0x00, HDMI_EDID_SEGMENT_POINTER); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1078 | } else if (!(status1 & 0x80)) { |
| 1079 | /* Display unplug, beware multiple interrupts */ |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1080 | if (hdmi->hp_state != HDMI_HOTPLUG_DISCONNECTED) { |
| 1081 | hdmi->hp_state = HDMI_HOTPLUG_DISCONNECTED; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1082 | schedule_delayed_work(&hdmi->edid_work, 0); |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1083 | } |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1084 | /* display_off will switch back to mode_a */ |
| 1085 | } |
| 1086 | } else if (status1 & 2) { |
| 1087 | /* EDID error interrupt: retry */ |
| 1088 | /* Set EDID word address */ |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1089 | hdmi_write(hdmi, hdmi->edid_block_addr, HDMI_EDID_WORD_ADDRESS); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1090 | /* Set EDID segment pointer */ |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1091 | hdmi_write(hdmi, hdmi->edid_segment_nr, HDMI_EDID_SEGMENT_POINTER); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1092 | } else if (status1 & 4) { |
| 1093 | /* Disable EDID interrupt */ |
| 1094 | hdmi_write(hdmi, 0xC0, HDMI_INTERRUPT_MASK_1); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1095 | schedule_delayed_work(&hdmi->edid_work, msecs_to_jiffies(10)); |
| 1096 | } |
| 1097 | |
| 1098 | return IRQ_HANDLED; |
| 1099 | } |
| 1100 | |
Laurent Pinchart | 5864ace | 2011-09-18 12:26:50 +0200 | [diff] [blame] | 1101 | static int sh_hdmi_display_on(struct sh_mobile_lcdc_entity *entity) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1102 | { |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1103 | struct sh_hdmi *hdmi = entity_to_sh_hdmi(entity); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1104 | |
Laurent Pinchart | 458981c | 2011-11-28 23:19:59 +0100 | [diff] [blame] | 1105 | dev_dbg(hdmi->dev, "%s(%p): state %x\n", __func__, hdmi, |
| 1106 | hdmi->hp_state); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1107 | |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 1108 | /* |
| 1109 | * hp_state can be set to |
| 1110 | * HDMI_HOTPLUG_DISCONNECTED: on monitor unplug |
| 1111 | * HDMI_HOTPLUG_CONNECTED: on monitor plug-in |
| 1112 | * HDMI_HOTPLUG_EDID_DONE: on EDID read completion |
| 1113 | */ |
Laurent Pinchart | d30555d | 2011-11-29 01:07:50 +0100 | [diff] [blame] | 1114 | if (hdmi->hp_state == HDMI_HOTPLUG_EDID_DONE) { |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1115 | /* PS mode d->e. All functions are active */ |
Kuninori Morimoto | 3f521ab | 2012-05-07 21:06:54 -0700 | [diff] [blame] | 1116 | hdmi_bit_set(hdmi, 0xFC, 0x80, HDMI_SYSTEM_CTRL); |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 1117 | dev_dbg(hdmi->dev, "HDMI running\n"); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1118 | } |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1119 | |
Laurent Pinchart | 458981c | 2011-11-28 23:19:59 +0100 | [diff] [blame] | 1120 | return hdmi->hp_state == HDMI_HOTPLUG_DISCONNECTED |
| 1121 | ? SH_MOBILE_LCDC_DISPLAY_DISCONNECTED |
| 1122 | : SH_MOBILE_LCDC_DISPLAY_CONNECTED; |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1123 | } |
| 1124 | |
Laurent Pinchart | db85905 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1125 | static void sh_hdmi_display_off(struct sh_mobile_lcdc_entity *entity) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1126 | { |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1127 | struct sh_hdmi *hdmi = entity_to_sh_hdmi(entity); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1128 | |
Laurent Pinchart | 134d22e | 2011-09-09 16:08:02 +0200 | [diff] [blame] | 1129 | dev_dbg(hdmi->dev, "%s(%p)\n", __func__, hdmi); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1130 | /* PS mode e->a */ |
Kuninori Morimoto | 3f521ab | 2012-05-07 21:06:54 -0700 | [diff] [blame] | 1131 | hdmi_bit_set(hdmi, 0xFC, 0x10, HDMI_SYSTEM_CTRL); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1132 | } |
| 1133 | |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1134 | static const struct sh_mobile_lcdc_entity_ops sh_hdmi_ops = { |
Laurent Pinchart | db85905 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1135 | .display_on = sh_hdmi_display_on, |
| 1136 | .display_off = sh_hdmi_display_off, |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1137 | }; |
| 1138 | |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1139 | /** |
| 1140 | * sh_hdmi_clk_configure() - set HDMI clock frequency and enable the clock |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1141 | * @hdmi: driver context |
| 1142 | * @hdmi_rate: HDMI clock frequency in Hz |
| 1143 | * @parent_rate: if != 0 - set parent clock rate for optimal precision |
| 1144 | * return: configured positive rate if successful |
| 1145 | * 0 if couldn't set the rate, but managed to enable the |
| 1146 | * clock, negative error, if couldn't enable the clock |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1147 | */ |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1148 | static long sh_hdmi_clk_configure(struct sh_hdmi *hdmi, unsigned long hdmi_rate, |
| 1149 | unsigned long parent_rate) |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1150 | { |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1151 | int ret; |
| 1152 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1153 | if (parent_rate && clk_get_parent(hdmi->hdmi_clk)) { |
| 1154 | ret = clk_set_rate(clk_get_parent(hdmi->hdmi_clk), parent_rate); |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1155 | if (ret < 0) { |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1156 | dev_warn(hdmi->dev, "Cannot set parent rate %ld: %d\n", parent_rate, ret); |
| 1157 | hdmi_rate = clk_round_rate(hdmi->hdmi_clk, hdmi_rate); |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1158 | } else { |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1159 | dev_dbg(hdmi->dev, "HDMI set parent frequency %lu\n", parent_rate); |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1160 | } |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1161 | } |
| 1162 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1163 | ret = clk_set_rate(hdmi->hdmi_clk, hdmi_rate); |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1164 | if (ret < 0) { |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1165 | dev_warn(hdmi->dev, "Cannot set rate %ld: %d\n", hdmi_rate, ret); |
| 1166 | hdmi_rate = 0; |
| 1167 | } else { |
| 1168 | dev_dbg(hdmi->dev, "HDMI set frequency %lu\n", hdmi_rate); |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1169 | } |
| 1170 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1171 | return hdmi_rate; |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1172 | } |
| 1173 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1174 | /* Hotplug interrupt occurred, read EDID */ |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 1175 | static void sh_hdmi_edid_work_fn(struct work_struct *work) |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1176 | { |
| 1177 | struct sh_hdmi *hdmi = container_of(work, struct sh_hdmi, edid_work.work); |
Laurent Pinchart | bce95fe | 2011-09-18 12:25:21 +0200 | [diff] [blame] | 1178 | struct sh_mobile_lcdc_chan *ch = hdmi->entity.lcdc; |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1179 | int ret; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1180 | |
Laurent Pinchart | 134d22e | 2011-09-09 16:08:02 +0200 | [diff] [blame] | 1181 | dev_dbg(hdmi->dev, "%s(%p): begin, hotplug status %d\n", __func__, hdmi, |
| 1182 | hdmi->hp_state); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1183 | |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1184 | if (hdmi->hp_state == HDMI_HOTPLUG_CONNECTED) { |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1185 | unsigned long parent_rate = 0, hdmi_rate; |
| 1186 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1187 | ret = sh_hdmi_read_edid(hdmi, &hdmi_rate, &parent_rate); |
Guennadi Liakhovetski | d521dd9 | 2011-06-14 14:27:22 +0000 | [diff] [blame] | 1188 | if (ret < 0) |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1189 | goto out; |
| 1190 | |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1191 | hdmi->hp_state = HDMI_HOTPLUG_EDID_DONE; |
| 1192 | |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1193 | /* Reconfigure the clock */ |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1194 | ret = sh_hdmi_clk_configure(hdmi, hdmi_rate, parent_rate); |
Guennadi Liakhovetski | d521dd9 | 2011-06-14 14:27:22 +0000 | [diff] [blame] | 1195 | if (ret < 0) |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1196 | goto out; |
| 1197 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1198 | msleep(10); |
| 1199 | sh_hdmi_configure(hdmi); |
| 1200 | /* Switched to another (d) power-save mode */ |
| 1201 | msleep(10); |
| 1202 | |
Laurent Pinchart | 7295752 | 2011-09-18 14:18:28 +0200 | [diff] [blame] | 1203 | if (ch && ch->notify) |
| 1204 | ch->notify(ch, SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT, |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 1205 | &hdmi->mode, &hdmi->monspec); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1206 | } else { |
Guennadi Liakhovetski | 91d63f8 | 2010-11-04 11:05:55 +0000 | [diff] [blame] | 1207 | hdmi->monspec.modedb_len = 0; |
| 1208 | fb_destroy_modedb(hdmi->monspec.modedb); |
| 1209 | hdmi->monspec.modedb = NULL; |
| 1210 | |
Laurent Pinchart | 7295752 | 2011-09-18 14:18:28 +0200 | [diff] [blame] | 1211 | if (ch && ch->notify) |
| 1212 | ch->notify(ch, SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT, |
Laurent Pinchart | e0c8601 | 2011-11-29 01:05:47 +0100 | [diff] [blame] | 1213 | NULL, NULL); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1214 | |
Laurent Pinchart | 7295752 | 2011-09-18 14:18:28 +0200 | [diff] [blame] | 1215 | ret = 0; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1216 | } |
| 1217 | |
Guennadi Liakhovetski | 6de9edd | 2010-09-03 07:20:23 +0000 | [diff] [blame] | 1218 | out: |
Guennadi Liakhovetski | 4232f60 | 2010-11-11 14:45:09 +0000 | [diff] [blame] | 1219 | if (ret < 0 && ret != -EAGAIN) |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1220 | hdmi->hp_state = HDMI_HOTPLUG_DISCONNECTED; |
Guennadi Liakhovetski | 6de9edd | 2010-09-03 07:20:23 +0000 | [diff] [blame] | 1221 | |
Laurent Pinchart | 134d22e | 2011-09-09 16:08:02 +0200 | [diff] [blame] | 1222 | dev_dbg(hdmi->dev, "%s(%p): end\n", __func__, hdmi); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1223 | } |
| 1224 | |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 1225 | static void sh_hdmi_htop1_init(struct sh_hdmi *hdmi) |
| 1226 | { |
| 1227 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_MODE); |
| 1228 | hdmi_htop1_write(hdmi, 0x0000000b, 0x0010); |
| 1229 | hdmi_htop1_write(hdmi, 0x00006710, HDMI_HTOP1_HTOP_DCL_FRC_MODE); |
| 1230 | hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_1); |
| 1231 | hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_2); |
| 1232 | hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_1); |
| 1233 | hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_2); |
| 1234 | hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_1); |
| 1235 | hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_2); |
| 1236 | hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_1); |
| 1237 | hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_2); |
| 1238 | hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_1); |
| 1239 | hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_2); |
| 1240 | hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_1); |
| 1241 | hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_2); |
| 1242 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_Y1); |
| 1243 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CB1); |
| 1244 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CR1); |
| 1245 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_Y2); |
| 1246 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CB2); |
| 1247 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CR2); |
| 1248 | hdmi_htop1_write(hdmi, 0x00000008, HDMI_HTOP1_CURRENT); |
| 1249 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_TISEMP0_1); |
| 1250 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_TISEMP2_C); |
| 1251 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_PHY_TEST_MODE); |
| 1252 | hdmi_htop1_write(hdmi, 0x00000081, HDMI_HTOP1_TISIDRV); |
| 1253 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_PLLBW); |
| 1254 | hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISEN); |
| 1255 | hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISDREN); |
| 1256 | hdmi_htop1_write(hdmi, 0x00000003, HDMI_HTOP1_ENABLE_SELECTOR); |
| 1257 | hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_MACRO_RESET); |
| 1258 | hdmi_htop1_write(hdmi, 0x00000016, HDMI_HTOP1_CISRANGE); |
| 1259 | msleep(100); |
| 1260 | hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_ENABLE_SELECTOR); |
| 1261 | msleep(100); |
| 1262 | hdmi_htop1_write(hdmi, 0x00000003, HDMI_HTOP1_ENABLE_SELECTOR); |
| 1263 | hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_MACRO_RESET); |
| 1264 | hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISEN); |
| 1265 | hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISDREN); |
| 1266 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_VIDEO_INPUT); |
| 1267 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_CLK_TO_PHY); |
| 1268 | hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_VIDEO_INPUT2); |
| 1269 | hdmi_htop1_write(hdmi, 0x0000000a, HDMI_HTOP1_CLK_SET); |
| 1270 | } |
| 1271 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1272 | static int __init sh_hdmi_probe(struct platform_device *pdev) |
| 1273 | { |
| 1274 | struct sh_mobile_hdmi_info *pdata = pdev->dev.platform_data; |
| 1275 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 1276 | struct resource *htop1_res; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1277 | int irq = platform_get_irq(pdev, 0), ret; |
| 1278 | struct sh_hdmi *hdmi; |
| 1279 | long rate; |
| 1280 | |
| 1281 | if (!res || !pdata || irq < 0) |
| 1282 | return -ENODEV; |
| 1283 | |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 1284 | htop1_res = NULL; |
| 1285 | if (pdata->flags & HDMI_HAS_HTOP1) { |
| 1286 | htop1_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 1287 | if (!htop1_res) { |
| 1288 | dev_err(&pdev->dev, "htop1 needs register base\n"); |
| 1289 | return -EINVAL; |
| 1290 | } |
| 1291 | } |
| 1292 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1293 | hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL); |
| 1294 | if (!hdmi) { |
| 1295 | dev_err(&pdev->dev, "Cannot allocate device data\n"); |
| 1296 | return -ENOMEM; |
| 1297 | } |
| 1298 | |
| 1299 | hdmi->dev = &pdev->dev; |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1300 | hdmi->entity.owner = THIS_MODULE; |
| 1301 | hdmi->entity.ops = &sh_hdmi_ops; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1302 | |
| 1303 | hdmi->hdmi_clk = clk_get(&pdev->dev, "ick"); |
| 1304 | if (IS_ERR(hdmi->hdmi_clk)) { |
| 1305 | ret = PTR_ERR(hdmi->hdmi_clk); |
| 1306 | dev_err(&pdev->dev, "Unable to get clock: %d\n", ret); |
| 1307 | goto egetclk; |
| 1308 | } |
| 1309 | |
Kuninori Morimoto | db6668d | 2012-05-07 21:07:49 -0700 | [diff] [blame] | 1310 | /* select register access functions */ |
| 1311 | if (pdata->flags & HDMI_32BIT_REG) { |
| 1312 | hdmi->write = __hdmi_write32; |
| 1313 | hdmi->read = __hdmi_read32; |
| 1314 | } else { |
| 1315 | hdmi->write = __hdmi_write8; |
| 1316 | hdmi->read = __hdmi_read8; |
| 1317 | } |
| 1318 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1319 | /* An arbitrary relaxed pixclock just to get things started: from standard 480p */ |
| 1320 | rate = clk_round_rate(hdmi->hdmi_clk, PICOS2KHZ(37037)); |
| 1321 | if (rate > 0) |
| 1322 | rate = sh_hdmi_clk_configure(hdmi, rate, 0); |
| 1323 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1324 | if (rate < 0) { |
| 1325 | ret = rate; |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1326 | goto erate; |
| 1327 | } |
| 1328 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1329 | ret = clk_enable(hdmi->hdmi_clk); |
| 1330 | if (ret < 0) { |
| 1331 | dev_err(hdmi->dev, "Cannot enable clock: %d\n", ret); |
| 1332 | goto erate; |
| 1333 | } |
| 1334 | |
Guennadi Liakhovetski | afe417c | 2010-09-03 07:20:39 +0000 | [diff] [blame] | 1335 | dev_dbg(&pdev->dev, "Enabled HDMI clock at %luHz\n", rate); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1336 | |
| 1337 | if (!request_mem_region(res->start, resource_size(res), dev_name(&pdev->dev))) { |
| 1338 | dev_err(&pdev->dev, "HDMI register region already claimed\n"); |
| 1339 | ret = -EBUSY; |
| 1340 | goto ereqreg; |
| 1341 | } |
| 1342 | |
| 1343 | hdmi->base = ioremap(res->start, resource_size(res)); |
| 1344 | if (!hdmi->base) { |
| 1345 | dev_err(&pdev->dev, "HDMI register region already claimed\n"); |
| 1346 | ret = -ENOMEM; |
| 1347 | goto emap; |
| 1348 | } |
| 1349 | |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1350 | platform_set_drvdata(pdev, &hdmi->entity); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1351 | |
Guennadi Liakhovetski | 6aa966e | 2010-09-03 07:20:31 +0000 | [diff] [blame] | 1352 | INIT_DELAYED_WORK(&hdmi->edid_work, sh_hdmi_edid_work_fn); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1353 | |
| 1354 | pm_runtime_enable(&pdev->dev); |
Guennadi Liakhovetski | d521dd9 | 2011-06-14 14:27:22 +0000 | [diff] [blame] | 1355 | pm_runtime_get_sync(&pdev->dev); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1356 | |
Kuninori Morimoto | e0defc8 | 2012-05-07 21:07:20 -0700 | [diff] [blame] | 1357 | /* init interrupt polarity */ |
| 1358 | if (pdata->flags & HDMI_OUTPUT_PUSH_PULL) |
| 1359 | hdmi_bit_set(hdmi, 0x02, 0x02, HDMI_SYSTEM_CTRL); |
| 1360 | |
| 1361 | if (pdata->flags & HDMI_OUTPUT_POLARITY_HI) |
| 1362 | hdmi_bit_set(hdmi, 0x01, 0x01, HDMI_SYSTEM_CTRL); |
| 1363 | |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 1364 | /* enable htop1 register if needed */ |
| 1365 | if (htop1_res) { |
| 1366 | hdmi->htop1 = ioremap(htop1_res->start, resource_size(htop1_res)); |
| 1367 | if (!hdmi->htop1) { |
| 1368 | dev_err(&pdev->dev, "control register region already claimed\n"); |
| 1369 | ret = -ENOMEM; |
| 1370 | goto emap_htop1; |
| 1371 | } |
| 1372 | sh_hdmi_htop1_init(hdmi); |
| 1373 | } |
| 1374 | |
Guennadi Liakhovetski | c36940e | 2010-11-02 11:27:16 +0000 | [diff] [blame] | 1375 | /* Product and revision IDs are 0 in sh-mobile version */ |
| 1376 | dev_info(&pdev->dev, "Detected HDMI controller 0x%x:0x%x\n", |
| 1377 | hdmi_read(hdmi, HDMI_PRODUCT_ID), hdmi_read(hdmi, HDMI_REVISION_ID)); |
| 1378 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1379 | ret = request_irq(irq, sh_hdmi_hotplug, 0, |
| 1380 | dev_name(&pdev->dev), hdmi); |
| 1381 | if (ret < 0) { |
| 1382 | dev_err(&pdev->dev, "Unable to request irq: %d\n", ret); |
| 1383 | goto ereqirq; |
| 1384 | } |
| 1385 | |
Russell King | b377330 | 2010-10-28 20:14:38 +0100 | [diff] [blame] | 1386 | ret = snd_soc_register_codec(&pdev->dev, |
| 1387 | &soc_codec_dev_sh_hdmi, &sh_hdmi_dai, 1); |
| 1388 | if (ret < 0) { |
| 1389 | dev_err(&pdev->dev, "codec registration failed\n"); |
| 1390 | goto ecodec; |
| 1391 | } |
| 1392 | |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1393 | return 0; |
| 1394 | |
Russell King | b377330 | 2010-10-28 20:14:38 +0100 | [diff] [blame] | 1395 | ecodec: |
| 1396 | free_irq(irq, hdmi); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1397 | ereqirq: |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 1398 | if (hdmi->htop1) |
| 1399 | iounmap(hdmi->htop1); |
| 1400 | emap_htop1: |
Guennadi Liakhovetski | d521dd9 | 2011-06-14 14:27:22 +0000 | [diff] [blame] | 1401 | pm_runtime_put(&pdev->dev); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1402 | pm_runtime_disable(&pdev->dev); |
| 1403 | iounmap(hdmi->base); |
| 1404 | emap: |
| 1405 | release_mem_region(res->start, resource_size(res)); |
| 1406 | ereqreg: |
| 1407 | clk_disable(hdmi->hdmi_clk); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1408 | erate: |
| 1409 | clk_put(hdmi->hdmi_clk); |
| 1410 | egetclk: |
| 1411 | kfree(hdmi); |
| 1412 | |
| 1413 | return ret; |
| 1414 | } |
| 1415 | |
| 1416 | static int __exit sh_hdmi_remove(struct platform_device *pdev) |
| 1417 | { |
Laurent Pinchart | 8511ea4 | 2011-09-11 18:27:50 +0200 | [diff] [blame] | 1418 | struct sh_hdmi *hdmi = entity_to_sh_hdmi(platform_get_drvdata(pdev)); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1419 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1420 | int irq = platform_get_irq(pdev, 0); |
| 1421 | |
Kuninori Morimoto | 1d6be33 | 2010-08-31 14:47:07 +0900 | [diff] [blame] | 1422 | snd_soc_unregister_codec(&pdev->dev); |
| 1423 | |
Guennadi Liakhovetski | 6de9edd | 2010-09-03 07:20:23 +0000 | [diff] [blame] | 1424 | /* No new work will be scheduled, wait for running ISR */ |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1425 | free_irq(irq, hdmi); |
Guennadi Liakhovetski | 6de9edd | 2010-09-03 07:20:23 +0000 | [diff] [blame] | 1426 | /* Wait for already scheduled work */ |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1427 | cancel_delayed_work_sync(&hdmi->edid_work); |
Guennadi Liakhovetski | d521dd9 | 2011-06-14 14:27:22 +0000 | [diff] [blame] | 1428 | pm_runtime_put(&pdev->dev); |
Guennadi Liakhovetski | 6de9edd | 2010-09-03 07:20:23 +0000 | [diff] [blame] | 1429 | pm_runtime_disable(&pdev->dev); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1430 | clk_disable(hdmi->hdmi_clk); |
| 1431 | clk_put(hdmi->hdmi_clk); |
Kuninori Morimoto | c932b27 | 2012-05-07 21:08:17 -0700 | [diff] [blame] | 1432 | if (hdmi->htop1) |
| 1433 | iounmap(hdmi->htop1); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1434 | iounmap(hdmi->base); |
| 1435 | release_mem_region(res->start, resource_size(res)); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1436 | kfree(hdmi); |
| 1437 | |
| 1438 | return 0; |
| 1439 | } |
| 1440 | |
| 1441 | static struct platform_driver sh_hdmi_driver = { |
| 1442 | .remove = __exit_p(sh_hdmi_remove), |
| 1443 | .driver = { |
| 1444 | .name = "sh-mobile-hdmi", |
| 1445 | }, |
| 1446 | }; |
| 1447 | |
Fabio Porcedda | 3ccbf89 | 2013-03-15 14:02:38 +0100 | [diff] [blame^] | 1448 | module_platform_driver_probe(sh_hdmi_driver, sh_hdmi_probe); |
Guennadi Liakhovetski | 6011bde | 2010-07-21 10:13:21 +0000 | [diff] [blame] | 1449 | |
| 1450 | MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>"); |
| 1451 | MODULE_DESCRIPTION("SuperH / ARM-shmobile HDMI driver"); |
| 1452 | MODULE_LICENSE("GPL v2"); |