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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/pci/setup-res.c
3 *
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
8 *
9 * Support routines for initializing a PCI subsystem.
10 */
11
12/* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
13
14/*
15 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
16 * Resource sorting
17 */
18
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/kernel.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040020#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/pci.h>
22#include <linux/errno.h>
23#include <linux/ioport.h>
24#include <linux/cache.h>
25#include <linux/slab.h>
26#include "pci.h"
27
Bjorn Helgaas6a5f3e62017-03-17 00:48:22 +000028static void pci_std_update_resource(struct pci_dev *dev, int resno)
Linus Torvalds1da177e2005-04-16 15:20:36 -070029{
30 struct pci_bus_region region;
Bjorn Helgaas9aac5372012-07-09 19:49:37 -060031 bool disable;
32 u16 cmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -070033 u32 new, check, mask;
34 int reg;
Yu Zhao14add802008-11-22 02:38:52 +080035 struct resource *res = dev->resource + resno;
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Bjorn Helgaas3d584442017-03-17 00:48:24 +000037 /* Per SR-IOV spec 3.4.1.11, VF BARs are RO zero */
38 if (dev->is_virtfn)
Wei Yang70675e02015-07-29 16:52:58 +080039 return;
Wei Yang70675e02015-07-29 16:52:58 +080040
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080041 /*
42 * Ignore resources for unimplemented BARs and unused resource slots
43 * for 64 bit BARs.
44 */
Ivan Kokshayskycf7bee52005-08-07 13:49:59 +040045 if (!res->flags)
46 return;
47
Bjorn Helgaascd8a4d32014-02-26 11:25:59 -070048 if (res->flags & IORESOURCE_UNSET)
49 return;
50
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080051 /*
52 * Ignore non-moveable resources. This might be legacy resources for
53 * which no functional BAR register exists or another important
Bjorn Helgaas80ccba12008-06-13 10:52:11 -060054 * system resource we shouldn't move around.
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080055 */
56 if (res->flags & IORESOURCE_PCI_FIXED)
57 return;
58
Yinghai Lufc279852013-12-09 22:54:40 -080059 pcibios_resource_to_bus(dev->bus, &region, res);
Bjorn Helgaas74cce812017-03-17 00:48:24 +000060 new = region.start;
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
Bjorn Helgaas74cce812017-03-17 00:48:24 +000062 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070063 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
Bjorn Helgaas74cce812017-03-17 00:48:24 +000064 new |= res->flags & ~PCI_BASE_ADDRESS_IO_MASK;
65 } else if (resno == PCI_ROM_RESOURCE) {
66 mask = (u32)PCI_ROM_ADDRESS_MASK;
67 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -070068 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
Bjorn Helgaas74cce812017-03-17 00:48:24 +000069 new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
70 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070071
Bjorn Helgaas7b65c3a2017-03-17 00:48:23 +000072 if (resno < PCI_ROM_RESOURCE) {
73 reg = PCI_BASE_ADDRESS_0 + 4 * resno;
74 } else if (resno == PCI_ROM_RESOURCE) {
Bjorn Helgaased09d212017-03-17 00:48:23 +000075
76 /*
77 * Apparently some Matrox devices have ROM BARs that read
78 * as zero when disabled, so don't update ROM BARs unless
79 * they're enabled. See https://lkml.org/lkml/2005/8/30/138.
80 */
Linus Torvalds755528c2005-08-26 10:49:22 -070081 if (!(res->flags & IORESOURCE_ROM_ENABLE))
82 return;
Bjorn Helgaas7b65c3a2017-03-17 00:48:23 +000083
84 reg = dev->rom_base_reg;
Linus Torvalds755528c2005-08-26 10:49:22 -070085 new |= PCI_ROM_ADDRESS_ENABLE;
Bjorn Helgaas7b65c3a2017-03-17 00:48:23 +000086 } else
87 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
Bjorn Helgaas9aac5372012-07-09 19:49:37 -060089 /*
90 * We can't update a 64-bit BAR atomically, so when possible,
91 * disable decoding so that a half-updated BAR won't conflict
92 * with another device.
93 */
94 disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on;
95 if (disable) {
96 pci_read_config_word(dev, PCI_COMMAND, &cmd);
97 pci_write_config_word(dev, PCI_COMMAND,
98 cmd & ~PCI_COMMAND_MEMORY);
99 }
100
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 pci_write_config_dword(dev, reg, new);
102 pci_read_config_dword(dev, reg, &check);
103
104 if ((new ^ check) & mask) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600105 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
106 resno, new, check);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107 }
108
Bjorn Helgaas28c68212011-06-14 13:04:35 -0600109 if (res->flags & IORESOURCE_MEM_64) {
Ivan Kokshayskycf7bee52005-08-07 13:49:59 +0400110 new = region.start >> 16 >> 16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 pci_write_config_dword(dev, reg + 4, new);
112 pci_read_config_dword(dev, reg + 4, &check);
113 if (check != new) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400114 dev_err(&dev->dev, "BAR %d: error updating (high %#08x != %#08x)\n",
115 resno, new, check);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116 }
117 }
Bjorn Helgaas9aac5372012-07-09 19:49:37 -0600118
119 if (disable)
120 pci_write_config_word(dev, PCI_COMMAND, cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121}
122
Bjorn Helgaas6a5f3e62017-03-17 00:48:22 +0000123void pci_update_resource(struct pci_dev *dev, int resno)
124{
125 if (resno <= PCI_ROM_RESOURCE)
126 pci_std_update_resource(dev, resno);
127#ifdef CONFIG_PCI_IOV
128 else if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
129 pci_iov_update_resource(dev, resno);
130#endif
131}
132
Sam Ravnborg96bde062007-03-26 21:53:30 -0800133int pci_claim_resource(struct pci_dev *dev, int resource)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134{
135 struct resource *res = &dev->resource[resource];
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700136 struct resource *root, *conflict;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137
Bjorn Helgaas29003be2014-02-26 11:25:59 -0700138 if (res->flags & IORESOURCE_UNSET) {
139 dev_info(&dev->dev, "can't claim BAR %d %pR: no address assigned\n",
140 resource, res);
141 return -EINVAL;
142 }
143
Bjorn Helgaas16d917b2016-11-08 14:25:24 -0600144 /*
145 * If we have a shadow copy in RAM, the PCI device doesn't respond
146 * to the shadow range, so we don't need to claim it, and upstream
147 * bridges don't need to route the range to the device.
148 */
149 if (res->flags & IORESOURCE_ROM_SHADOW)
150 return 0;
151
Matthew Wilcoxcebd78a2009-06-17 16:33:33 -0400152 root = pci_find_parent_resource(dev, res);
Bjorn Helgaas865df572009-11-04 10:32:57 -0700153 if (!root) {
Bjorn Helgaas29003be2014-02-26 11:25:59 -0700154 dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",
155 resource, res);
Bjorn Helgaasc770cb42015-03-12 12:30:06 -0500156 res->flags |= IORESOURCE_UNSET;
Bjorn Helgaas865df572009-11-04 10:32:57 -0700157 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 }
159
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700160 conflict = request_resource_conflict(root, res);
161 if (conflict) {
Bjorn Helgaas29003be2014-02-26 11:25:59 -0700162 dev_info(&dev->dev, "can't claim BAR %d %pR: address conflict with %s %pR\n",
163 resource, res, conflict->name, conflict);
Bjorn Helgaasc770cb42015-03-12 12:30:06 -0500164 res->flags |= IORESOURCE_UNSET;
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700165 return -EBUSY;
166 }
Bjorn Helgaas865df572009-11-04 10:32:57 -0700167
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700168 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169}
Jesse Barneseaa959d2009-06-30 21:45:44 -0700170EXPORT_SYMBOL(pci_claim_resource);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171
Yuji Shimada32a9a6822009-03-16 17:13:39 +0900172void pci_disable_bridge_window(struct pci_dev *dev)
173{
Bjorn Helgaas865df572009-11-04 10:32:57 -0700174 dev_info(&dev->dev, "disabling bridge mem windows\n");
Yuji Shimada32a9a6822009-03-16 17:13:39 +0900175
176 /* MMIO Base/Limit */
177 pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
178
179 /* Prefetchable MMIO Base/Limit */
180 pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
181 pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
182 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
183}
Ram Pai2bbc6942011-07-25 13:08:39 -0700184
Myron Stowe6535943f2011-11-21 11:54:19 -0700185/*
186 * Generic function that returns a value indicating that the device's
187 * original BIOS BAR address was not saved and so is not available for
188 * reinstatement.
189 *
190 * Can be over-ridden by architecture specific code that implements
191 * reinstatement functionality rather than leaving it disabled when
192 * normal allocation attempts fail.
193 */
194resource_size_t __weak pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
195{
196 return 0;
197}
198
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700199static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
Ram Pai2bbc6942011-07-25 13:08:39 -0700200 int resno, resource_size_t size)
201{
202 struct resource *root, *conflict;
Myron Stowe6535943f2011-11-21 11:54:19 -0700203 resource_size_t fw_addr, start, end;
Ram Pai2bbc6942011-07-25 13:08:39 -0700204
Myron Stowe6535943f2011-11-21 11:54:19 -0700205 fw_addr = pcibios_retrieve_fw_addr(dev, resno);
206 if (!fw_addr)
Bjorn Helgaas94778832014-07-08 16:00:42 -0600207 return -ENOMEM;
Myron Stowe6535943f2011-11-21 11:54:19 -0700208
Ram Pai2bbc6942011-07-25 13:08:39 -0700209 start = res->start;
210 end = res->end;
Myron Stowe6535943f2011-11-21 11:54:19 -0700211 res->start = fw_addr;
Ram Pai2bbc6942011-07-25 13:08:39 -0700212 res->end = res->start + size - 1;
Bjorn Helgaas0b26cd62015-09-21 18:26:45 -0500213 res->flags &= ~IORESOURCE_UNSET;
Myron Stowe351fc6d2011-11-21 11:54:07 -0700214
215 root = pci_find_parent_resource(dev, res);
216 if (!root) {
217 if (res->flags & IORESOURCE_IO)
218 root = &ioport_resource;
219 else
220 root = &iomem_resource;
221 }
222
Ram Pai2bbc6942011-07-25 13:08:39 -0700223 dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
224 resno, res);
225 conflict = request_resource_conflict(root, res);
226 if (conflict) {
Bjorn Helgaas94778832014-07-08 16:00:42 -0600227 dev_info(&dev->dev, "BAR %d: %pR conflicts with %s %pR\n",
228 resno, res, conflict->name, conflict);
Ram Pai2bbc6942011-07-25 13:08:39 -0700229 res->start = start;
230 res->end = end;
Bjorn Helgaas0b26cd62015-09-21 18:26:45 -0500231 res->flags |= IORESOURCE_UNSET;
Bjorn Helgaas94778832014-07-08 16:00:42 -0600232 return -EBUSY;
Ram Pai2bbc6942011-07-25 13:08:39 -0700233 }
Bjorn Helgaas94778832014-07-08 16:00:42 -0600234 return 0;
Ram Pai2bbc6942011-07-25 13:08:39 -0700235}
236
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600237static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
238 int resno, resource_size_t size, resource_size_t align)
239{
240 struct resource *res = dev->resource + resno;
241 resource_size_t min;
242 int ret;
243
244 min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
245
Bjorn Helgaas67d29b52014-05-19 18:32:18 -0600246 /*
247 * First, try exact prefetching match. Even if a 64-bit
248 * prefetchable bridge window is below 4GB, we can't put a 32-bit
249 * prefetchable resource in it because pbus_size_mem() assumes a
250 * 64-bit window will contain no 32-bit resources. If we assign
251 * things differently than they were sized, not everything will fit.
252 */
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600253 ret = pci_bus_alloc_resource(bus, res, size, align, min,
Yinghai Lu5b285412014-05-19 17:01:55 -0600254 IORESOURCE_PREFETCH | IORESOURCE_MEM_64,
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600255 pcibios_align_resource, dev);
Bjorn Helgaasd3689df2014-05-19 18:39:07 -0600256 if (ret == 0)
257 return 0;
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600258
Bjorn Helgaas67d29b52014-05-19 18:32:18 -0600259 /*
260 * If the prefetchable window is only 32 bits wide, we can put
261 * 64-bit prefetchable resources in it.
262 */
Bjorn Helgaasd3689df2014-05-19 18:39:07 -0600263 if ((res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) ==
Yinghai Lu5b285412014-05-19 17:01:55 -0600264 (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) {
Yinghai Lu5b285412014-05-19 17:01:55 -0600265 ret = pci_bus_alloc_resource(bus, res, size, align, min,
266 IORESOURCE_PREFETCH,
267 pcibios_align_resource, dev);
Bjorn Helgaasd3689df2014-05-19 18:39:07 -0600268 if (ret == 0)
269 return 0;
Yinghai Lu5b285412014-05-19 17:01:55 -0600270 }
271
Bjorn Helgaas67d29b52014-05-19 18:32:18 -0600272 /*
273 * If we didn't find a better match, we can put any memory resource
274 * in a non-prefetchable window. If this resource is 32 bits and
275 * non-prefetchable, the first call already tried the only possibility
276 * so we don't need to try again.
277 */
278 if (res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64))
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600279 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
280 pcibios_align_resource, dev);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -0600281
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600282 return ret;
283}
284
Nikhil P Raod6776e62012-06-20 12:56:00 -0700285static int _pci_assign_resource(struct pci_dev *dev, int resno,
286 resource_size_t size, resource_size_t min_align)
Yinghai Lud09ee962009-04-23 20:49:25 -0700287{
Yinghai Lud09ee962009-04-23 20:49:25 -0700288 struct pci_bus *bus;
289 int ret;
290
Yinghai Lud09ee962009-04-23 20:49:25 -0700291 bus = dev->bus;
Ram Pai2bbc6942011-07-25 13:08:39 -0700292 while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
293 if (!bus->parent || !bus->self->transparent)
294 break;
295 bus = bus->parent;
Yinghai Lud09ee962009-04-23 20:49:25 -0700296 }
297
Yinghai Lud09ee962009-04-23 20:49:25 -0700298 return ret;
299}
300
Ram Pai2bbc6942011-07-25 13:08:39 -0700301int pci_assign_resource(struct pci_dev *dev, int resno)
302{
303 struct resource *res = dev->resource + resno;
304 resource_size_t align, size;
Ram Pai2bbc6942011-07-25 13:08:39 -0700305 int ret;
306
Bjorn Helgaas2ea4adf2016-03-01 10:58:04 -0600307 if (res->flags & IORESOURCE_PCI_FIXED)
308 return 0;
309
Bjorn Helgaasbd064f02014-02-26 11:25:58 -0700310 res->flags |= IORESOURCE_UNSET;
Ram Pai2bbc6942011-07-25 13:08:39 -0700311 align = pci_resource_alignment(dev, res);
312 if (!align) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400313 dev_info(&dev->dev, "BAR %d: can't assign %pR (bogus alignment)\n",
314 resno, res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700315 return -EINVAL;
316 }
317
Ram Pai2bbc6942011-07-25 13:08:39 -0700318 size = resource_size(res);
319 ret = _pci_assign_resource(dev, resno, size, align);
320
321 /*
322 * If we failed to assign anything, let's try the address
323 * where firmware left it. That at least has a chance of
324 * working, which is better than just leaving it disabled.
325 */
Bjorn Helgaas64da4652014-07-08 16:04:22 -0600326 if (ret < 0) {
327 dev_info(&dev->dev, "BAR %d: no space for %pR\n", resno, res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700328 ret = pci_revert_fw_address(res, dev, resno, size);
Bjorn Helgaas64da4652014-07-08 16:04:22 -0600329 }
Ram Pai2bbc6942011-07-25 13:08:39 -0700330
Bjorn Helgaas64da4652014-07-08 16:04:22 -0600331 if (ret < 0) {
332 dev_info(&dev->dev, "BAR %d: failed to assign %pR\n", resno,
333 res);
Bjorn Helgaas28f6dbe2014-07-04 15:58:15 -0600334 return ret;
Bjorn Helgaas64da4652014-07-08 16:04:22 -0600335 }
Bjorn Helgaas28f6dbe2014-07-04 15:58:15 -0600336
337 res->flags &= ~IORESOURCE_UNSET;
338 res->flags &= ~IORESOURCE_STARTALIGN;
339 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
340 if (resno < PCI_BRIDGE_RESOURCES)
341 pci_update_resource(dev, resno);
342
343 return 0;
Ram Pai2bbc6942011-07-25 13:08:39 -0700344}
Ryan Desfossesb7fe9432014-04-25 14:32:25 -0600345EXPORT_SYMBOL(pci_assign_resource);
Ram Pai2bbc6942011-07-25 13:08:39 -0700346
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600347int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize,
348 resource_size_t min_align)
349{
350 struct resource *res = dev->resource + resno;
Guo Chaoc3337702014-07-03 18:30:29 -0600351 unsigned long flags;
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600352 resource_size_t new_size;
353 int ret;
354
Bjorn Helgaas2ea4adf2016-03-01 10:58:04 -0600355 if (res->flags & IORESOURCE_PCI_FIXED)
356 return 0;
357
Guo Chaoc3337702014-07-03 18:30:29 -0600358 flags = res->flags;
Bjorn Helgaasbd064f02014-02-26 11:25:58 -0700359 res->flags |= IORESOURCE_UNSET;
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600360 if (!res->parent) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400361 dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR\n",
362 resno, res);
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600363 return -EINVAL;
364 }
365
366 /* already aligned with min_align */
367 new_size = resource_size(res) + addsize;
368 ret = _pci_assign_resource(dev, resno, new_size, min_align);
Bjorn Helgaas28f6dbe2014-07-04 15:58:15 -0600369 if (ret) {
Guo Chaoc3337702014-07-03 18:30:29 -0600370 res->flags = flags;
371 dev_info(&dev->dev, "BAR %d: %pR (failed to expand by %#llx)\n",
372 resno, res, (unsigned long long) addsize);
Bjorn Helgaas28f6dbe2014-07-04 15:58:15 -0600373 return ret;
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600374 }
Guo Chaoc3337702014-07-03 18:30:29 -0600375
Bjorn Helgaas28f6dbe2014-07-04 15:58:15 -0600376 res->flags &= ~IORESOURCE_UNSET;
377 res->flags &= ~IORESOURCE_STARTALIGN;
Bjorn Helgaas64da4652014-07-08 16:04:22 -0600378 dev_info(&dev->dev, "BAR %d: reassigned %pR (expanded by %#llx)\n",
379 resno, res, (unsigned long long) addsize);
Bjorn Helgaas28f6dbe2014-07-04 15:58:15 -0600380 if (resno < PCI_BRIDGE_RESOURCES)
381 pci_update_resource(dev, resno);
382
383 return 0;
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600384}
385
Bjorn Helgaas842de402008-03-04 11:56:47 -0700386int pci_enable_resources(struct pci_dev *dev, int mask)
387{
388 u16 cmd, old_cmd;
389 int i;
390 struct resource *r;
391
392 pci_read_config_word(dev, PCI_COMMAND, &cmd);
393 old_cmd = cmd;
394
395 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
396 if (!(mask & (1 << i)))
397 continue;
398
399 r = &dev->resource[i];
400
401 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
402 continue;
403 if ((i == PCI_ROM_RESOURCE) &&
404 (!(r->flags & IORESOURCE_ROM_ENABLE)))
405 continue;
406
Bjorn Helgaas3cedcc32014-02-26 11:26:00 -0700407 if (r->flags & IORESOURCE_UNSET) {
408 dev_err(&dev->dev, "can't enable device: BAR %d %pR not assigned\n",
409 i, r);
410 return -EINVAL;
411 }
412
Bjorn Helgaas842de402008-03-04 11:56:47 -0700413 if (!r->parent) {
Bjorn Helgaas3cedcc32014-02-26 11:26:00 -0700414 dev_err(&dev->dev, "can't enable device: BAR %d %pR not claimed\n",
415 i, r);
Bjorn Helgaas842de402008-03-04 11:56:47 -0700416 return -EINVAL;
417 }
418
419 if (r->flags & IORESOURCE_IO)
420 cmd |= PCI_COMMAND_IO;
421 if (r->flags & IORESOURCE_MEM)
422 cmd |= PCI_COMMAND_MEMORY;
423 }
424
425 if (cmd != old_cmd) {
426 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
427 old_cmd, cmd);
428 pci_write_config_word(dev, PCI_COMMAND, cmd);
429 }
430 return 0;
431}