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Russell Kinga09e64f2008-08-05 16:14:15 +01001/*
2 * arch/arm/mach-at91/include/mach/at91_wdt.h
3 *
Andrew Victor3d73e892008-09-18 21:44:20 +01004 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
Russell Kinga09e64f2008-08-05 16:14:15 +01007 * Watchdog Timer (WDT) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_WDT_H
17#define AT91_WDT_H
18
19#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */
20#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
21#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
22
23#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */
24#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
25#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */
26#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */
27#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */
28#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */
29#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */
30#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */
31#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */
32
33#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */
34#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */
35#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */
36
37#endif