| Thierry Reding | 8918465 | 2014-04-16 09:24:44 +0200 | [diff] [blame] | 1 | #ifndef DT_BINDINGS_MEMORY_TEGRA30_MC_H |
| 2 | #define DT_BINDINGS_MEMORY_TEGRA30_MC_H |
| 3 | |
| 4 | #define TEGRA_SWGROUP_PTC 0 |
| 5 | #define TEGRA_SWGROUP_DC 1 |
| 6 | #define TEGRA_SWGROUP_DCB 2 |
| 7 | #define TEGRA_SWGROUP_EPP 3 |
| 8 | #define TEGRA_SWGROUP_G2 4 |
| 9 | #define TEGRA_SWGROUP_MPE 5 |
| 10 | #define TEGRA_SWGROUP_VI 6 |
| 11 | #define TEGRA_SWGROUP_AFI 7 |
| 12 | #define TEGRA_SWGROUP_AVPC 8 |
| 13 | #define TEGRA_SWGROUP_NV 9 |
| 14 | #define TEGRA_SWGROUP_NV2 10 |
| 15 | #define TEGRA_SWGROUP_HDA 11 |
| 16 | #define TEGRA_SWGROUP_HC 12 |
| 17 | #define TEGRA_SWGROUP_PPCS 13 |
| 18 | #define TEGRA_SWGROUP_SATA 14 |
| 19 | #define TEGRA_SWGROUP_VDE 15 |
| 20 | #define TEGRA_SWGROUP_MPCORELP 16 |
| 21 | #define TEGRA_SWGROUP_MPCORE 17 |
| 22 | #define TEGRA_SWGROUP_ISP 18 |
| 23 | |
| 24 | #endif |