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Paul Walmsley2ace8312010-12-21 21:05:14 -07001/*
2 * OMAP4 CM instance functions
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
12 * or CM2 hardware modules. For example, the EMU_CM CM instance is in
13 * the PRM hardware module. What a mess...
14 */
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/errno.h>
19#include <linux/err.h>
20#include <linux/io.h>
21
22#include <plat/common.h>
23
24#include "cm.h"
25#include "cm1_44xx.h"
26#include "cm2_44xx.h"
27#include "cm44xx.h"
28#include "cminst44xx.h"
Paul Walmsleybd2122c2010-12-21 21:05:15 -070029#include "cm-regbits-34xx.h"
Paul Walmsley2ace8312010-12-21 21:05:14 -070030#include "cm-regbits-44xx.h"
31#include "prcm44xx.h"
32#include "prm44xx.h"
33#include "prcm_mpu44xx.h"
34
35static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
36 [OMAP4430_INVALID_PRCM_PARTITION] = 0,
37 [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
38 [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
39 [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
40 [OMAP4430_SCRM_PARTITION] = 0,
41 [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
42};
43
44/* Read a register in a CM instance */
45u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
46{
47 BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
48 part == OMAP4430_INVALID_PRCM_PARTITION ||
49 !_cm_bases[part]);
50 return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
51}
52
53/* Write into a register in a CM instance */
54void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
55{
56 BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
57 part == OMAP4430_INVALID_PRCM_PARTITION ||
58 !_cm_bases[part]);
59 __raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
60}
61
62/* Read-modify-write a register in CM1. Caller must lock */
63u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
64 s16 idx)
65{
66 u32 v;
67
68 v = omap4_cminst_read_inst_reg(part, inst, idx);
69 v &= ~mask;
70 v |= bits;
71 omap4_cminst_write_inst_reg(v, part, inst, idx);
72
73 return v;
74}
75
Paul Walmsleybd2122c2010-12-21 21:05:15 -070076/*
77 *
78 */
79
80/**
81 * _clktrctrl_write - write @c to a CM_CLKSTCTRL.CLKTRCTRL register bitfield
82 * @c: CLKTRCTRL register bitfield (LSB = bit 0, i.e., unshifted)
83 * @part: PRCM partition ID that the CM_CLKSTCTRL register exists in
84 * @inst: CM instance register offset (*_INST macro)
85 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
86 *
87 * @c must be the unshifted value for CLKTRCTRL - i.e., this function
88 * will handle the shift itself.
89 */
90static void _clktrctrl_write(u8 c, u8 part, s16 inst, u16 cdoffs)
91{
92 u32 v;
93
94 v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
95 v &= ~OMAP4430_CLKTRCTRL_MASK;
96 v |= c << OMAP4430_CLKTRCTRL_SHIFT;
97 omap4_cminst_write_inst_reg(v, part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
98}
99
100/**
101 * omap4_cminst_is_clkdm_in_hwsup - is a clockdomain in hwsup idle mode?
102 * @part: PRCM partition ID that the CM_CLKSTCTRL register exists in
103 * @inst: CM instance register offset (*_INST macro)
104 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
105 *
106 * Returns true if the clockdomain referred to by (@part, @inst, @cdoffs)
107 * is in hardware-supervised idle mode, or 0 otherwise.
108 */
109bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs)
110{
111 u32 v;
112
113 v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
114 v &= OMAP4430_CLKTRCTRL_MASK;
115 v >>= OMAP4430_CLKTRCTRL_SHIFT;
116
117 return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? true : false;
118}
119
120/**
121 * omap4_cminst_clkdm_enable_hwsup - put a clockdomain in hwsup-idle mode
122 * @part: PRCM partition ID that the clockdomain registers exist in
123 * @inst: CM instance register offset (*_INST macro)
124 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
125 *
126 * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
127 * hardware-supervised idle mode. No return value.
128 */
129void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs)
130{
131 _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs);
132}
133
134/**
135 * omap4_cminst_clkdm_disable_hwsup - put a clockdomain in swsup-idle mode
136 * @part: PRCM partition ID that the clockdomain registers exist in
137 * @inst: CM instance register offset (*_INST macro)
138 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
139 *
140 * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
141 * software-supervised idle mode, i.e., controlled manually by the
142 * Linux OMAP clockdomain code. No return value.
143 */
144void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs)
145{
146 _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);
147}
148
149/**
150 * omap4_cminst_clkdm_force_sleep - try to put a clockdomain into idle
151 * @part: PRCM partition ID that the clockdomain registers exist in
152 * @inst: CM instance register offset (*_INST macro)
153 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
154 *
155 * Put a clockdomain referred to by (@part, @inst, @cdoffs) into idle
156 * No return value.
157 */
158void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs)
159{
160 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
161}
162
163/**
164 * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle
165 * @part: PRCM partition ID that the clockdomain registers exist in
166 * @inst: CM instance register offset (*_INST macro)
167 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
168 *
169 * Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle,
170 * waking it up. No return value.
171 */
172void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs)
173{
174 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs);
175}
176
177/*
178 *
179 */
Paul Walmsley2ace8312010-12-21 21:05:14 -0700180
181/**
182 * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
183 * @clkctrl_reg: CLKCTRL module address
184 *
185 * Wait for the module IDLEST to be functional. If the idle state is in any
186 * the non functional state (trans, idle or disabled), module and thus the
187 * sysconfig cannot be accessed and will probably lead to an "imprecise
188 * external abort"
189 *
190 * Module idle state:
191 * 0x0 func: Module is fully functional, including OCP
192 * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
193 * abortion
194 * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
195 * using separate functional clock
196 * 0x3 disabled: Module is disabled and cannot be accessed
197 *
198 */
199int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
200{
201 int i = 0;
202
203 if (!clkctrl_reg)
204 return 0;
205
206 omap_test_timeout((
207 ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) ||
208 (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
209 OMAP4430_IDLEST_SHIFT) == 0x2)),
210 MAX_MODULE_READY_TIME, i);
211
212 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
213}
214