blob: 9fead2e7d4c88363a993d510aaa16225bbd917ef [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Bartlomiej Zolnierkiewicz1c164ac2007-07-20 01:11:56 +02002 * linux/drivers/ide/pci/serverworks.c Version 0.22 Jun 27 2007
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Copyright (C) 1998-2000 Michel Aubry
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz
6 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
Bartlomiej Zolnierkiewicz9445de72007-05-16 00:51:42 +02007 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * Portions copyright (c) 2001 Sun Microsystems
9 *
10 *
11 * RCC/ServerWorks IDE driver for Linux
12 *
13 * OSB4: `Open South Bridge' IDE Interface (fn 1)
14 * supports UDMA mode 2 (33 MB/s)
15 *
16 * CSB5: `Champion South Bridge' IDE Interface (fn 1)
17 * all revisions support UDMA mode 4 (66 MB/s)
18 * revision A2.0 and up support UDMA mode 5 (100 MB/s)
19 *
20 * *** The CSB5 does not provide ANY register ***
21 * *** to detect 80-conductor cable presence. ***
22 *
23 * CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
24 *
Narendra Sankar84f57fb2005-08-18 22:30:35 +020025 * HT1000: AKA BCM5785 - Hypertransport Southbridge for Opteron systems. IDE
26 * controller same as the CSB6. Single channel ATA100 only.
27 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 * Documentation:
29 * Available under NDA only. Errata info very hard to get.
30 *
31 */
32
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/types.h>
34#include <linux/module.h>
35#include <linux/kernel.h>
36#include <linux/ioport.h>
37#include <linux/pci.h>
38#include <linux/hdreg.h>
39#include <linux/ide.h>
40#include <linux/init.h>
41#include <linux/delay.h>
42
43#include <asm/io.h>
44
45#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
46#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
47
48/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
49 * can overrun their FIFOs when used with the CSB5 */
50static const char *svwks_bad_ata100[] = {
51 "ST320011A",
52 "ST340016A",
53 "ST360021A",
54 "ST380021A",
55 NULL
56};
57
Linus Torvalds1da177e2005-04-16 15:20:36 -070058static struct pci_dev *isa_dev;
59
60static int check_in_drive_lists (ide_drive_t *drive, const char **list)
61{
62 while (*list)
63 if (!strcmp(*list++, drive->id->model))
64 return 1;
65 return 0;
66}
67
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020068static u8 svwks_udma_filter(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -070069{
70 struct pci_dev *dev = HWIF(drive)->pci_dev;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020071 u8 mask = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070072
Narendra Sankar84f57fb2005-08-18 22:30:35 +020073 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020074 return 0x1f;
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
76 u32 reg = 0;
77 if (isa_dev)
78 pci_read_config_dword(isa_dev, 0x64, &reg);
79
80 /*
81 * Don't enable UDMA on disk devices for the moment
82 */
83 if(drive->media == ide_disk)
84 return 0;
85 /* Check the OSB4 DMA33 enable bit */
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020086 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0;
Auke Kok44c10132007-06-08 15:46:36 -070087 } else if (dev->revision < SVWKS_CSB5_REVISION_NEW) {
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020088 return 0x07;
Auke Kok44c10132007-06-08 15:46:36 -070089 } else if (dev->revision >= SVWKS_CSB5_REVISION_NEW) {
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020090 u8 btr = 0, mode;
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 pci_read_config_byte(dev, 0x5A, &btr);
92 mode = btr & 0x3;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020093
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 /* If someone decides to do UDMA133 on CSB5 the same
95 issue will bite so be inclusive */
96 if (mode > 2 && check_in_drive_lists(drive, svwks_bad_ata100))
97 mode = 2;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020098
99 switch(mode) {
100 case 2: mask = 0x1f; break;
101 case 1: mask = 0x07; break;
102 default: mask = 0x00; break;
103 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 }
105 if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
106 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) &&
107 (!(PCI_FUNC(dev->devfn) & 1)))
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200108 mask = 0x1f;
109
110 return mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111}
112
113static u8 svwks_csb_check (struct pci_dev *dev)
114{
115 switch (dev->device) {
116 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
117 case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
118 case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200119 case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120 return 1;
121 default:
122 break;
123 }
124 return 0;
125}
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200126
127static void svwks_tune_pio(ide_drive_t *drive, const u8 pio)
128{
129 static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
130 static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 };
131
132 struct pci_dev *dev = drive->hwif->pci_dev;
133
134 pci_write_config_byte(dev, drive_pci[drive->dn], pio_modes[pio]);
135
136 if (svwks_csb_check(dev)) {
137 u16 csb_pio = 0;
138
139 pci_read_config_word(dev, 0x4a, &csb_pio);
140
141 csb_pio &= ~(0x0f << (4 * drive->dn));
142 csb_pio |= (pio << (4 * drive->dn));
143
144 pci_write_config_word(dev, 0x4a, csb_pio);
145 }
146}
147
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
149{
Alan Coxf201f502006-06-28 04:27:02 -0700150 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
151 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
Alan Coxf201f502006-06-28 04:27:02 -0700152 static const u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 };
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153
154 ide_hwif_t *hwif = HWIF(drive);
155 struct pci_dev *dev = hwif->pci_dev;
Bartlomiej Zolnierkiewicz9445de72007-05-16 00:51:42 +0200156 u8 speed = ide_rate_filter(drive, xferspeed);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 u8 unit = (drive->select.b.unit & 0x01);
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200158
159 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
160
161 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
162 svwks_tune_pio(drive, speed - XFER_PIO_0);
163 return ide_config_drive_speed(drive, speed);
164 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 /* If we are about to put a disk into UDMA mode we screwed up.
167 Our code assumes we never _ever_ do this on an OSB4 */
168
169 if(dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4 &&
170 drive->media == ide_disk && speed >= XFER_UDMA_0)
171 BUG();
Bartlomiej Zolnierkiewiczb740d882007-07-09 23:17:53 +0200172
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173 pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174 pci_read_config_byte(dev, 0x54, &ultra_enable);
175
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 ultra_timing &= ~(0x0F << (4*unit));
177 ultra_enable &= ~(0x01 << drive->dn);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178
179 switch(speed) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180 case XFER_MW_DMA_2:
181 case XFER_MW_DMA_1:
182 case XFER_MW_DMA_0:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 dma_timing |= dma_modes[speed - XFER_MW_DMA_0];
184 break;
185
186 case XFER_UDMA_5:
187 case XFER_UDMA_4:
188 case XFER_UDMA_3:
189 case XFER_UDMA_2:
190 case XFER_UDMA_1:
191 case XFER_UDMA_0:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192 dma_timing |= dma_modes[2];
193 ultra_timing |= ((udma_modes[speed - XFER_UDMA_0]) << (4*unit));
194 ultra_enable |= (0x01 << drive->dn);
195 default:
196 break;
197 }
198
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199 pci_write_config_byte(dev, drive_pci2[drive->dn], dma_timing);
200 pci_write_config_byte(dev, (0x56|hwif->channel), ultra_timing);
201 pci_write_config_byte(dev, 0x54, ultra_enable);
202
203 return (ide_config_drive_speed(drive, speed));
204}
205
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206static void svwks_tune_drive (ide_drive_t *drive, u8 pio)
207{
Bartlomiej Zolnierkiewicz21347582007-07-20 01:11:58 +0200208 pio = ide_get_best_pio_mode(drive, pio, 4);
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200209 svwks_tune_pio(drive, pio);
210 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211}
212
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
214{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215 drive->init_speed = 0;
216
Bartlomiej Zolnierkiewiczbd203b52007-05-16 00:51:43 +0200217 if (ide_tune_dma(drive))
Bartlomiej Zolnierkiewicz3608b5d2007-02-17 02:40:26 +0100218 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219
Bartlomiej Zolnierkiewiczd8f44692007-02-17 02:40:25 +0100220 if (ide_use_fast_pio(drive))
Bartlomiej Zolnierkiewicz9445de72007-05-16 00:51:42 +0200221 svwks_tune_drive(drive, 255);
Bartlomiej Zolnierkiewiczd8f44692007-02-17 02:40:25 +0100222
Bartlomiej Zolnierkiewicz3608b5d2007-02-17 02:40:26 +0100223 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224}
225
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const char *name)
227{
228 unsigned int reg;
229 u8 btr;
230
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231 /* force Master Latency Timer value to 64 PCICLKs */
232 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40);
233
234 /* OSB4 : South Bridge and IDE */
235 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
Alan Cox970a6132006-09-30 23:27:29 -0700236 isa_dev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237 PCI_DEVICE_ID_SERVERWORKS_OSB4, NULL);
238 if (isa_dev) {
239 pci_read_config_dword(isa_dev, 0x64, &reg);
240 reg &= ~0x00002000; /* disable 600ns interrupt mask */
241 if(!(reg & 0x00004000))
242 printk(KERN_DEBUG "%s: UDMA not BIOS enabled.\n", name);
243 reg |= 0x00004000; /* enable UDMA/33 support */
244 pci_write_config_dword(isa_dev, 0x64, reg);
245 }
246 }
247
248 /* setup CSB5/CSB6 : South Bridge and IDE option RAID */
249 else if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) ||
250 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
251 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) {
252
253 /* Third Channel Test */
254 if (!(PCI_FUNC(dev->devfn) & 1)) {
255 struct pci_dev * findev = NULL;
256 u32 reg4c = 0;
Alan Cox970a6132006-09-30 23:27:29 -0700257 findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258 PCI_DEVICE_ID_SERVERWORKS_CSB5, NULL);
259 if (findev) {
260 pci_read_config_dword(findev, 0x4C, &reg4c);
261 reg4c &= ~0x000007FF;
262 reg4c |= 0x00000040;
263 reg4c |= 0x00000020;
264 pci_write_config_dword(findev, 0x4C, reg4c);
Alan Cox970a6132006-09-30 23:27:29 -0700265 pci_dev_put(findev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266 }
267 outb_p(0x06, 0x0c00);
268 dev->irq = inb_p(0x0c01);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269 } else {
270 struct pci_dev * findev = NULL;
271 u8 reg41 = 0;
272
Alan Cox970a6132006-09-30 23:27:29 -0700273 findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 PCI_DEVICE_ID_SERVERWORKS_CSB6, NULL);
275 if (findev) {
276 pci_read_config_byte(findev, 0x41, &reg41);
277 reg41 &= ~0x40;
278 pci_write_config_byte(findev, 0x41, reg41);
Alan Cox970a6132006-09-30 23:27:29 -0700279 pci_dev_put(findev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280 }
281 /*
282 * This is a device pin issue on CSB6.
283 * Since there will be a future raid mode,
284 * early versions of the chipset require the
285 * interrupt pin to be set, and it is a compatibility
286 * mode issue.
287 */
288 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)
289 dev->irq = 0;
290 }
291// pci_read_config_dword(dev, 0x40, &pioreg)
292// pci_write_config_dword(dev, 0x40, 0x99999999);
293// pci_read_config_dword(dev, 0x44, &dmareg);
294// pci_write_config_dword(dev, 0x44, 0xFFFFFFFF);
295 /* setup the UDMA Control register
296 *
297 * 1. clear bit 6 to enable DMA
298 * 2. enable DMA modes with bits 0-1
299 * 00 : legacy
300 * 01 : udma2
301 * 10 : udma2/udma4
302 * 11 : udma2/udma4/udma5
303 */
304 pci_read_config_byte(dev, 0x5A, &btr);
305 btr &= ~0x40;
306 if (!(PCI_FUNC(dev->devfn) & 1))
307 btr |= 0x2;
308 else
Auke Kok44c10132007-06-08 15:46:36 -0700309 btr |= (dev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310 pci_write_config_byte(dev, 0x5A, btr);
311 }
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200312 /* Setup HT1000 SouthBridge Controller - Single Channel Only */
313 else if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) {
314 pci_read_config_byte(dev, 0x5A, &btr);
315 btr &= ~0x40;
316 btr |= 0x3;
317 pci_write_config_byte(dev, 0x5A, btr);
318 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319
Alan Coxf201f502006-06-28 04:27:02 -0700320 return dev->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321}
322
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200323static u8 __devinit ata66_svwks_svwks(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324{
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200325 return ATA_CBL_PATA80;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700326}
327
328/* On Dell PowerEdge servers with a CSB5/CSB6, the top two bits
329 * of the subsystem device ID indicate presence of an 80-pin cable.
330 * Bit 15 clear = secondary IDE channel does not have 80-pin cable.
331 * Bit 15 set = secondary IDE channel has 80-pin cable.
332 * Bit 14 clear = primary IDE channel does not have 80-pin cable.
333 * Bit 14 set = primary IDE channel has 80-pin cable.
334 */
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200335static u8 __devinit ata66_svwks_dell(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336{
337 struct pci_dev *dev = hwif->pci_dev;
338 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
339 dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
340 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE ||
341 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE))
342 return ((1 << (hwif->channel + 14)) &
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200343 dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
344 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345}
346
347/* Sun Cobalt Alpine hardware avoids the 80-pin cable
348 * detect issue by attaching the drives directly to the board.
349 * This check follows the Dell precedent (how scary is that?!)
350 *
351 * WARNING: this only works on Alpine hardware!
352 */
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200353static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354{
355 struct pci_dev *dev = hwif->pci_dev;
356 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN &&
357 dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
358 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
359 return ((1 << (hwif->channel + 14)) &
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200360 dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
361 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362}
363
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200364static u8 __devinit ata66_svwks(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365{
366 struct pci_dev *dev = hwif->pci_dev;
367
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368 /* Server Works */
369 if (dev->subsystem_vendor == PCI_VENDOR_ID_SERVERWORKS)
370 return ata66_svwks_svwks (hwif);
371
372 /* Dell PowerEdge */
373 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL)
374 return ata66_svwks_dell (hwif);
375
376 /* Cobalt Alpine */
377 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN)
378 return ata66_svwks_cobalt (hwif);
379
Alan Coxf201f502006-06-28 04:27:02 -0700380 /* Per Specified Design by OEM, and ASIC Architect */
381 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
382 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2))
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200383 return ATA_CBL_PATA80;
Alan Coxf201f502006-06-28 04:27:02 -0700384
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200385 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700386}
387
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
389{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390 if (!hwif->irq)
391 hwif->irq = hwif->channel ? 15 : 14;
392
393 hwif->tuneproc = &svwks_tune_drive;
394 hwif->speedproc = &svwks_tune_chipset;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200395 hwif->udma_filter = &svwks_udma_filter;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396
397 hwif->atapi_dma = 1;
398
399 if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE)
400 hwif->ultra_mask = 0x3f;
401
402 hwif->mwdma_mask = 0x07;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403
404 hwif->autodma = 0;
405
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200406 hwif->drives[0].autotune = 1;
407 hwif->drives[1].autotune = 1;
408
409 if (!hwif->dma_base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
412 hwif->ide_dma_check = &svwks_config_drive_xfer_rate;
Bartlomiej Zolnierkiewicz946f8e42007-02-17 02:40:23 +0100413 if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200414 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
415 hwif->cbl = ata66_svwks(hwif);
Bartlomiej Zolnierkiewicz946f8e42007-02-17 02:40:23 +0100416 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417 if (!noautodma)
418 hwif->autodma = 1;
419
Bartlomiej Zolnierkiewicz1c164ac2007-07-20 01:11:56 +0200420 hwif->drives[0].autodma = hwif->drives[1].autodma = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421}
422
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423static int __devinit init_setup_svwks (struct pci_dev *dev, ide_pci_device_t *d)
424{
425 return ide_setup_pci_device(dev, d);
426}
427
Alan Coxbb732d72005-06-27 15:24:29 -0700428static int __devinit init_setup_csb6 (struct pci_dev *dev, ide_pci_device_t *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429{
430 if (!(PCI_FUNC(dev->devfn) & 1)) {
431 d->bootable = NEVER_BOARD;
432 if (dev->resource[0].start == 0x01f1)
433 d->bootable = ON_BOARD;
434 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435
Bartlomiej Zolnierkiewicza5d8c5c2007-07-20 01:11:55 +0200436 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE ||
437 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) &&
438 (!(PCI_FUNC(dev->devfn) & 1)))
439 d->host_flags |= IDE_HFLAG_SINGLE;
440 else
441 d->host_flags &= ~IDE_HFLAG_SINGLE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442
443 return ide_setup_pci_device(dev, d);
444}
445
446static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
447 { /* 0 */
448 .name = "SvrWks OSB4",
449 .init_setup = init_setup_svwks,
450 .init_chipset = init_chipset_svwks,
451 .init_hwif = init_hwif_svwks,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700452 .autodma = AUTODMA,
453 .bootable = ON_BOARD,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200454 .pio_mask = ATA_PIO4,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455 },{ /* 1 */
456 .name = "SvrWks CSB5",
457 .init_setup = init_setup_svwks,
458 .init_chipset = init_chipset_svwks,
459 .init_hwif = init_hwif_svwks,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460 .autodma = AUTODMA,
461 .bootable = ON_BOARD,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200462 .pio_mask = ATA_PIO4,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 },{ /* 2 */
464 .name = "SvrWks CSB6",
465 .init_setup = init_setup_csb6,
466 .init_chipset = init_chipset_svwks,
467 .init_hwif = init_hwif_svwks,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468 .autodma = AUTODMA,
469 .bootable = ON_BOARD,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200470 .pio_mask = ATA_PIO4,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471 },{ /* 3 */
472 .name = "SvrWks CSB6",
473 .init_setup = init_setup_csb6,
474 .init_chipset = init_chipset_svwks,
475 .init_hwif = init_hwif_svwks,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476 .autodma = AUTODMA,
477 .bootable = ON_BOARD,
Bartlomiej Zolnierkiewicza5d8c5c2007-07-20 01:11:55 +0200478 .host_flags = IDE_HFLAG_SINGLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200479 .pio_mask = ATA_PIO4,
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200480 },{ /* 4 */
481 .name = "SvrWks HT1000",
482 .init_setup = init_setup_svwks,
483 .init_chipset = init_chipset_svwks,
484 .init_hwif = init_hwif_svwks,
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200485 .autodma = AUTODMA,
486 .bootable = ON_BOARD,
Bartlomiej Zolnierkiewicza5d8c5c2007-07-20 01:11:55 +0200487 .host_flags = IDE_HFLAG_SINGLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200488 .pio_mask = ATA_PIO4,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 }
490};
491
492/**
493 * svwks_init_one - called when a OSB/CSB is found
494 * @dev: the svwks device
495 * @id: the matching pci id
496 *
497 * Called when the PCI registration layer (or the IDE initialization)
498 * finds a device matching our IDE device tables.
499 */
500
501static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id)
502{
503 ide_pci_device_t *d = &serverworks_chipsets[id->driver_data];
504
505 return d->init_setup(dev, d);
506}
507
508static struct pci_device_id svwks_pci_tbl[] = {
Alan Cox28a2a3f2006-09-11 14:45:07 +0100509 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
510 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
511 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
512 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
513 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 { 0, },
515};
516MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);
517
518static struct pci_driver driver = {
519 .name = "Serverworks_IDE",
520 .id_table = svwks_pci_tbl,
521 .probe = svwks_init_one,
522};
523
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100524static int __init svwks_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525{
526 return ide_pci_register_driver(&driver);
527}
528
529module_init(svwks_ide_init);
530
531MODULE_AUTHOR("Michael Aubry. Andrzej Krzysztofowicz, Andre Hedrick");
532MODULE_DESCRIPTION("PCI driver module for Serverworks OSB4/CSB5/CSB6 IDE");
533MODULE_LICENSE("GPL");