Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2010 Marvell International Ltd. |
| 3 | * Zhangfei Gao <zhangfei.gao@marvell.com> |
| 4 | * Kevin Wang <dwang4@marvell.com> |
| 5 | * Mingwei Wang <mwwang@marvell.com> |
| 6 | * Philip Rakity <prakity@marvell.com> |
| 7 | * Mark Brown <markb@marvell.com> |
| 8 | * |
| 9 | * This software is licensed under the terms of the GNU General Public |
| 10 | * License version 2, as published by the Free Software Foundation, and |
| 11 | * may be copied, distributed, and modified under those terms. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | */ |
| 19 | #include <linux/err.h> |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/clk.h> |
| 23 | #include <linux/io.h> |
| 24 | #include <linux/gpio.h> |
| 25 | #include <linux/mmc/card.h> |
| 26 | #include <linux/mmc/host.h> |
Chris Ball | 8f63795 | 2012-09-19 16:29:12 +0800 | [diff] [blame] | 27 | #include <linux/mmc/slot-gpio.h> |
Zhangfei Gao | bfed345 | 2011-06-20 22:11:52 +0800 | [diff] [blame] | 28 | #include <linux/platform_data/pxa_sdhci.h> |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 29 | #include <linux/slab.h> |
| 30 | #include <linux/delay.h> |
Paul Gortmaker | 88b4767 | 2011-07-03 15:15:51 -0400 | [diff] [blame] | 31 | #include <linux/module.h> |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 32 | #include <linux/of.h> |
| 33 | #include <linux/of_device.h> |
Chris Ball | 8f63795 | 2012-09-19 16:29:12 +0800 | [diff] [blame] | 34 | #include <linux/of_gpio.h> |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 35 | #include <linux/pm.h> |
| 36 | #include <linux/pm_runtime.h> |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 37 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 38 | #include "sdhci.h" |
| 39 | #include "sdhci-pltfm.h" |
| 40 | |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 41 | #define PXAV3_RPM_DELAY_MS 50 |
| 42 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 43 | #define SD_CLOCK_BURST_SIZE_SETUP 0x10A |
| 44 | #define SDCLK_SEL 0x100 |
| 45 | #define SDCLK_DELAY_SHIFT 9 |
| 46 | #define SDCLK_DELAY_MASK 0x1f |
| 47 | |
| 48 | #define SD_CFG_FIFO_PARAM 0x100 |
| 49 | #define SDCFG_GEN_PAD_CLK_ON (1<<6) |
| 50 | #define SDCFG_GEN_PAD_CLK_CNT_MASK 0xFF |
| 51 | #define SDCFG_GEN_PAD_CLK_CNT_SHIFT 24 |
| 52 | |
| 53 | #define SD_SPI_MODE 0x108 |
| 54 | #define SD_CE_ATA_1 0x10C |
| 55 | |
| 56 | #define SD_CE_ATA_2 0x10E |
| 57 | #define SDCE_MISC_INT (1<<2) |
| 58 | #define SDCE_MISC_INT_EN (1<<1) |
| 59 | |
| 60 | static void pxav3_set_private_registers(struct sdhci_host *host, u8 mask) |
| 61 | { |
| 62 | struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); |
| 63 | struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; |
| 64 | |
| 65 | if (mask == SDHCI_RESET_ALL) { |
| 66 | /* |
| 67 | * tune timing of read data/command when crc error happen |
| 68 | * no performance impact |
| 69 | */ |
| 70 | if (pdata && 0 != pdata->clk_delay_cycles) { |
| 71 | u16 tmp; |
| 72 | |
| 73 | tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); |
| 74 | tmp |= (pdata->clk_delay_cycles & SDCLK_DELAY_MASK) |
| 75 | << SDCLK_DELAY_SHIFT; |
| 76 | tmp |= SDCLK_SEL; |
| 77 | writew(tmp, host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); |
| 78 | } |
| 79 | } |
| 80 | } |
| 81 | |
| 82 | #define MAX_WAIT_COUNT 5 |
| 83 | static void pxav3_gen_init_74_clocks(struct sdhci_host *host, u8 power_mode) |
| 84 | { |
| 85 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 86 | struct sdhci_pxa *pxa = pltfm_host->priv; |
| 87 | u16 tmp; |
| 88 | int count; |
| 89 | |
| 90 | if (pxa->power_mode == MMC_POWER_UP |
| 91 | && power_mode == MMC_POWER_ON) { |
| 92 | |
| 93 | dev_dbg(mmc_dev(host->mmc), |
| 94 | "%s: slot->power_mode = %d," |
| 95 | "ios->power_mode = %d\n", |
| 96 | __func__, |
| 97 | pxa->power_mode, |
| 98 | power_mode); |
| 99 | |
| 100 | /* set we want notice of when 74 clocks are sent */ |
| 101 | tmp = readw(host->ioaddr + SD_CE_ATA_2); |
| 102 | tmp |= SDCE_MISC_INT_EN; |
| 103 | writew(tmp, host->ioaddr + SD_CE_ATA_2); |
| 104 | |
| 105 | /* start sending the 74 clocks */ |
| 106 | tmp = readw(host->ioaddr + SD_CFG_FIFO_PARAM); |
| 107 | tmp |= SDCFG_GEN_PAD_CLK_ON; |
| 108 | writew(tmp, host->ioaddr + SD_CFG_FIFO_PARAM); |
| 109 | |
| 110 | /* slowest speed is about 100KHz or 10usec per clock */ |
| 111 | udelay(740); |
| 112 | count = 0; |
| 113 | |
| 114 | while (count++ < MAX_WAIT_COUNT) { |
| 115 | if ((readw(host->ioaddr + SD_CE_ATA_2) |
| 116 | & SDCE_MISC_INT) == 0) |
| 117 | break; |
| 118 | udelay(10); |
| 119 | } |
| 120 | |
| 121 | if (count == MAX_WAIT_COUNT) |
| 122 | dev_warn(mmc_dev(host->mmc), "74 clock interrupt not cleared\n"); |
| 123 | |
| 124 | /* clear the interrupt bit if posted */ |
| 125 | tmp = readw(host->ioaddr + SD_CE_ATA_2); |
| 126 | tmp |= SDCE_MISC_INT; |
| 127 | writew(tmp, host->ioaddr + SD_CE_ATA_2); |
| 128 | } |
| 129 | pxa->power_mode = power_mode; |
| 130 | } |
| 131 | |
| 132 | static int pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) |
| 133 | { |
| 134 | u16 ctrl_2; |
| 135 | |
| 136 | /* |
| 137 | * Set V18_EN -- UHS modes do not work without this. |
| 138 | * does not change signaling voltage |
| 139 | */ |
| 140 | ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 141 | |
| 142 | /* Select Bus Speed Mode for host */ |
| 143 | ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; |
| 144 | switch (uhs) { |
| 145 | case MMC_TIMING_UHS_SDR12: |
| 146 | ctrl_2 |= SDHCI_CTRL_UHS_SDR12; |
| 147 | break; |
| 148 | case MMC_TIMING_UHS_SDR25: |
| 149 | ctrl_2 |= SDHCI_CTRL_UHS_SDR25; |
| 150 | break; |
| 151 | case MMC_TIMING_UHS_SDR50: |
| 152 | ctrl_2 |= SDHCI_CTRL_UHS_SDR50 | SDHCI_CTRL_VDD_180; |
| 153 | break; |
| 154 | case MMC_TIMING_UHS_SDR104: |
| 155 | ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180; |
| 156 | break; |
| 157 | case MMC_TIMING_UHS_DDR50: |
| 158 | ctrl_2 |= SDHCI_CTRL_UHS_DDR50 | SDHCI_CTRL_VDD_180; |
| 159 | break; |
| 160 | } |
| 161 | |
| 162 | sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); |
| 163 | dev_dbg(mmc_dev(host->mmc), |
| 164 | "%s uhs = %d, ctrl_2 = %04X\n", |
| 165 | __func__, uhs, ctrl_2); |
| 166 | |
| 167 | return 0; |
| 168 | } |
| 169 | |
Lars-Peter Clausen | c915568 | 2013-03-13 19:26:05 +0100 | [diff] [blame] | 170 | static const struct sdhci_ops pxav3_sdhci_ops = { |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 171 | .platform_reset_exit = pxav3_set_private_registers, |
| 172 | .set_uhs_signaling = pxav3_set_uhs_signaling, |
| 173 | .platform_send_init_74_clocks = pxav3_gen_init_74_clocks, |
Lars-Peter Clausen | d005d94 | 2013-01-28 19:27:12 +0100 | [diff] [blame] | 174 | .get_max_clock = sdhci_pltfm_clk_get_max_clock, |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 175 | }; |
| 176 | |
Kevin Liu | 73b7afb | 2013-03-25 17:42:56 +0800 | [diff] [blame] | 177 | static struct sdhci_pltfm_data sdhci_pxav3_pdata = { |
Kevin Liu | e065162 | 2013-03-25 17:42:59 +0800 | [diff] [blame] | 178 | .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
Kevin Liu | 73b7afb | 2013-03-25 17:42:56 +0800 | [diff] [blame] | 179 | | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
| 180 | | SDHCI_QUIRK_32BIT_ADMA_SIZE |
| 181 | | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, |
| 182 | .ops = &pxav3_sdhci_ops, |
| 183 | }; |
| 184 | |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 185 | #ifdef CONFIG_OF |
| 186 | static const struct of_device_id sdhci_pxav3_of_match[] = { |
| 187 | { |
| 188 | .compatible = "mrvl,pxav3-mmc", |
| 189 | }, |
| 190 | {}, |
| 191 | }; |
| 192 | MODULE_DEVICE_TABLE(of, sdhci_pxav3_of_match); |
| 193 | |
| 194 | static struct sdhci_pxa_platdata *pxav3_get_mmc_pdata(struct device *dev) |
| 195 | { |
| 196 | struct sdhci_pxa_platdata *pdata; |
| 197 | struct device_node *np = dev->of_node; |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 198 | u32 clk_delay_cycles; |
| 199 | |
| 200 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
| 201 | if (!pdata) |
| 202 | return NULL; |
| 203 | |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 204 | of_property_read_u32(np, "mrvl,clk-delay-cycles", &clk_delay_cycles); |
| 205 | if (clk_delay_cycles > 0) |
| 206 | pdata->clk_delay_cycles = clk_delay_cycles; |
| 207 | |
| 208 | return pdata; |
| 209 | } |
| 210 | #else |
| 211 | static inline struct sdhci_pxa_platdata *pxav3_get_mmc_pdata(struct device *dev) |
| 212 | { |
| 213 | return NULL; |
| 214 | } |
| 215 | #endif |
| 216 | |
Bill Pemberton | c3be1ef | 2012-11-19 13:23:06 -0500 | [diff] [blame] | 217 | static int sdhci_pxav3_probe(struct platform_device *pdev) |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 218 | { |
| 219 | struct sdhci_pltfm_host *pltfm_host; |
| 220 | struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; |
| 221 | struct device *dev = &pdev->dev; |
| 222 | struct sdhci_host *host = NULL; |
| 223 | struct sdhci_pxa *pxa = NULL; |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 224 | const struct of_device_id *match; |
| 225 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 226 | int ret; |
| 227 | struct clk *clk; |
| 228 | |
| 229 | pxa = kzalloc(sizeof(struct sdhci_pxa), GFP_KERNEL); |
| 230 | if (!pxa) |
| 231 | return -ENOMEM; |
| 232 | |
Christian Daudt | 0e74823 | 2013-05-29 13:50:05 -0700 | [diff] [blame] | 233 | host = sdhci_pltfm_init(pdev, &sdhci_pxav3_pdata, 0); |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 234 | if (IS_ERR(host)) { |
| 235 | kfree(pxa); |
| 236 | return PTR_ERR(host); |
| 237 | } |
| 238 | pltfm_host = sdhci_priv(host); |
| 239 | pltfm_host->priv = pxa; |
| 240 | |
Chao Xie | 164378e | 2012-07-31 14:35:25 +0800 | [diff] [blame] | 241 | clk = clk_get(dev, NULL); |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 242 | if (IS_ERR(clk)) { |
| 243 | dev_err(dev, "failed to get io clock\n"); |
| 244 | ret = PTR_ERR(clk); |
| 245 | goto err_clk_get; |
| 246 | } |
| 247 | pltfm_host->clk = clk; |
Chao Xie | 164378e | 2012-07-31 14:35:25 +0800 | [diff] [blame] | 248 | clk_prepare_enable(clk); |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 249 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 250 | /* enable 1/8V DDR capable */ |
| 251 | host->mmc->caps |= MMC_CAP_1_8V_DDR; |
| 252 | |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 253 | match = of_match_device(of_match_ptr(sdhci_pxav3_of_match), &pdev->dev); |
Kevin Liu | 943647f | 2013-03-25 17:42:58 +0800 | [diff] [blame] | 254 | if (match) { |
Simon Baatz | d2cf607 | 2013-06-09 22:14:15 +0200 | [diff] [blame] | 255 | ret = mmc_of_parse(host->mmc); |
| 256 | if (ret) |
| 257 | goto err_of_parse; |
Kevin Liu | 943647f | 2013-03-25 17:42:58 +0800 | [diff] [blame] | 258 | sdhci_get_of_property(pdev); |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 259 | pdata = pxav3_get_mmc_pdata(dev); |
Kevin Liu | 943647f | 2013-03-25 17:42:58 +0800 | [diff] [blame] | 260 | } else if (pdata) { |
Kevin Liu | c844a46 | 2013-03-25 17:42:57 +0800 | [diff] [blame] | 261 | /* on-chip device */ |
| 262 | if (pdata->flags & PXA_FLAG_CARD_PERMANENT) |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 263 | host->mmc->caps |= MMC_CAP_NONREMOVABLE; |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 264 | |
| 265 | /* If slot design supports 8 bit data, indicate this to MMC. */ |
| 266 | if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT) |
| 267 | host->mmc->caps |= MMC_CAP_8_BIT_DATA; |
| 268 | |
| 269 | if (pdata->quirks) |
| 270 | host->quirks |= pdata->quirks; |
Kevin Liu | 7c52d7bb | 2012-10-17 19:04:48 +0800 | [diff] [blame] | 271 | if (pdata->quirks2) |
| 272 | host->quirks2 |= pdata->quirks2; |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 273 | if (pdata->host_caps) |
| 274 | host->mmc->caps |= pdata->host_caps; |
Chris Ball | 8f63795 | 2012-09-19 16:29:12 +0800 | [diff] [blame] | 275 | if (pdata->host_caps2) |
| 276 | host->mmc->caps2 |= pdata->host_caps2; |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 277 | if (pdata->pm_caps) |
| 278 | host->mmc->pm_caps |= pdata->pm_caps; |
Chris Ball | 8f63795 | 2012-09-19 16:29:12 +0800 | [diff] [blame] | 279 | |
| 280 | if (gpio_is_valid(pdata->ext_cd_gpio)) { |
Laurent Pinchart | 214fc30 | 2013-08-08 12:38:31 +0200 | [diff] [blame] | 281 | ret = mmc_gpio_request_cd(host->mmc, pdata->ext_cd_gpio, |
| 282 | 0); |
Chris Ball | 8f63795 | 2012-09-19 16:29:12 +0800 | [diff] [blame] | 283 | if (ret) { |
| 284 | dev_err(mmc_dev(host->mmc), |
| 285 | "failed to allocate card detect gpio\n"); |
| 286 | goto err_cd_req; |
| 287 | } |
| 288 | } |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 289 | } |
| 290 | |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 291 | pm_runtime_enable(&pdev->dev); |
Daniel Drake | 0dcaa24 | 2013-06-27 11:46:29 -0400 | [diff] [blame] | 292 | pm_runtime_get_sync(&pdev->dev); |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 293 | pm_runtime_set_autosuspend_delay(&pdev->dev, PXAV3_RPM_DELAY_MS); |
| 294 | pm_runtime_use_autosuspend(&pdev->dev); |
| 295 | pm_suspend_ignore_children(&pdev->dev, 1); |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 296 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 297 | ret = sdhci_add_host(host); |
| 298 | if (ret) { |
| 299 | dev_err(&pdev->dev, "failed to add host\n"); |
| 300 | goto err_add_host; |
| 301 | } |
| 302 | |
| 303 | platform_set_drvdata(pdev, host); |
| 304 | |
Kevin Liu | 943647f | 2013-03-25 17:42:58 +0800 | [diff] [blame] | 305 | if (host->mmc->pm_caps & MMC_PM_KEEP_POWER) { |
Kevin Liu | 740b7a4 | 2013-01-14 14:38:53 -0500 | [diff] [blame] | 306 | device_init_wakeup(&pdev->dev, 1); |
| 307 | host->mmc->pm_flags |= MMC_PM_WAKE_SDIO_IRQ; |
| 308 | } else { |
| 309 | device_init_wakeup(&pdev->dev, 0); |
| 310 | } |
| 311 | |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 312 | pm_runtime_put_autosuspend(&pdev->dev); |
| 313 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 314 | return 0; |
| 315 | |
Simon Baatz | d2cf607 | 2013-06-09 22:14:15 +0200 | [diff] [blame] | 316 | err_of_parse: |
| 317 | err_cd_req: |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 318 | err_add_host: |
Daniel Drake | 0dcaa24 | 2013-06-27 11:46:29 -0400 | [diff] [blame] | 319 | pm_runtime_put_sync(&pdev->dev); |
| 320 | pm_runtime_disable(&pdev->dev); |
Chao Xie | 164378e | 2012-07-31 14:35:25 +0800 | [diff] [blame] | 321 | clk_disable_unprepare(clk); |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 322 | clk_put(clk); |
| 323 | err_clk_get: |
| 324 | sdhci_pltfm_free(pdev); |
| 325 | kfree(pxa); |
| 326 | return ret; |
| 327 | } |
| 328 | |
Bill Pemberton | 6e0ee71 | 2012-11-19 13:26:03 -0500 | [diff] [blame] | 329 | static int sdhci_pxav3_remove(struct platform_device *pdev) |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 330 | { |
| 331 | struct sdhci_host *host = platform_get_drvdata(pdev); |
| 332 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 333 | struct sdhci_pxa *pxa = pltfm_host->priv; |
| 334 | |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 335 | pm_runtime_get_sync(&pdev->dev); |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 336 | sdhci_remove_host(host, 1); |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 337 | pm_runtime_disable(&pdev->dev); |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 338 | |
Chao Xie | 164378e | 2012-07-31 14:35:25 +0800 | [diff] [blame] | 339 | clk_disable_unprepare(pltfm_host->clk); |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 340 | clk_put(pltfm_host->clk); |
Chris Ball | 8f63795 | 2012-09-19 16:29:12 +0800 | [diff] [blame] | 341 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 342 | sdhci_pltfm_free(pdev); |
| 343 | kfree(pxa); |
| 344 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 345 | return 0; |
| 346 | } |
| 347 | |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 348 | #ifdef CONFIG_PM_SLEEP |
| 349 | static int sdhci_pxav3_suspend(struct device *dev) |
| 350 | { |
| 351 | int ret; |
| 352 | struct sdhci_host *host = dev_get_drvdata(dev); |
| 353 | |
| 354 | pm_runtime_get_sync(dev); |
| 355 | ret = sdhci_suspend_host(host); |
| 356 | pm_runtime_mark_last_busy(dev); |
| 357 | pm_runtime_put_autosuspend(dev); |
| 358 | |
| 359 | return ret; |
| 360 | } |
| 361 | |
| 362 | static int sdhci_pxav3_resume(struct device *dev) |
| 363 | { |
| 364 | int ret; |
| 365 | struct sdhci_host *host = dev_get_drvdata(dev); |
| 366 | |
| 367 | pm_runtime_get_sync(dev); |
| 368 | ret = sdhci_resume_host(host); |
| 369 | pm_runtime_mark_last_busy(dev); |
| 370 | pm_runtime_put_autosuspend(dev); |
| 371 | |
| 372 | return ret; |
| 373 | } |
| 374 | #endif |
| 375 | |
| 376 | #ifdef CONFIG_PM_RUNTIME |
| 377 | static int sdhci_pxav3_runtime_suspend(struct device *dev) |
| 378 | { |
| 379 | struct sdhci_host *host = dev_get_drvdata(dev); |
| 380 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 381 | unsigned long flags; |
| 382 | |
| 383 | if (pltfm_host->clk) { |
| 384 | spin_lock_irqsave(&host->lock, flags); |
| 385 | host->runtime_suspended = true; |
| 386 | spin_unlock_irqrestore(&host->lock, flags); |
| 387 | |
| 388 | clk_disable_unprepare(pltfm_host->clk); |
| 389 | } |
| 390 | |
| 391 | return 0; |
| 392 | } |
| 393 | |
| 394 | static int sdhci_pxav3_runtime_resume(struct device *dev) |
| 395 | { |
| 396 | struct sdhci_host *host = dev_get_drvdata(dev); |
| 397 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 398 | unsigned long flags; |
| 399 | |
| 400 | if (pltfm_host->clk) { |
| 401 | clk_prepare_enable(pltfm_host->clk); |
| 402 | |
| 403 | spin_lock_irqsave(&host->lock, flags); |
| 404 | host->runtime_suspended = false; |
| 405 | spin_unlock_irqrestore(&host->lock, flags); |
| 406 | } |
| 407 | |
| 408 | return 0; |
| 409 | } |
| 410 | #endif |
| 411 | |
| 412 | #ifdef CONFIG_PM |
| 413 | static const struct dev_pm_ops sdhci_pxav3_pmops = { |
| 414 | SET_SYSTEM_SLEEP_PM_OPS(sdhci_pxav3_suspend, sdhci_pxav3_resume) |
| 415 | SET_RUNTIME_PM_OPS(sdhci_pxav3_runtime_suspend, |
| 416 | sdhci_pxav3_runtime_resume, NULL) |
| 417 | }; |
| 418 | |
| 419 | #define SDHCI_PXAV3_PMOPS (&sdhci_pxav3_pmops) |
| 420 | |
| 421 | #else |
| 422 | #define SDHCI_PXAV3_PMOPS NULL |
| 423 | #endif |
| 424 | |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 425 | static struct platform_driver sdhci_pxav3_driver = { |
| 426 | .driver = { |
| 427 | .name = "sdhci-pxav3", |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 428 | #ifdef CONFIG_OF |
| 429 | .of_match_table = sdhci_pxav3_of_match, |
| 430 | #endif |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 431 | .owner = THIS_MODULE, |
Kevin Liu | bb691ae | 2013-02-01 17:48:30 +0800 | [diff] [blame] | 432 | .pm = SDHCI_PXAV3_PMOPS, |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 433 | }, |
| 434 | .probe = sdhci_pxav3_probe, |
Bill Pemberton | 0433c14 | 2012-11-19 13:20:26 -0500 | [diff] [blame] | 435 | .remove = sdhci_pxav3_remove, |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 436 | }; |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 437 | |
Axel Lin | d1f81a6 | 2011-11-26 12:55:43 +0800 | [diff] [blame] | 438 | module_platform_driver(sdhci_pxav3_driver); |
Zhangfei Gao | a702c8a | 2011-06-08 17:41:57 +0800 | [diff] [blame] | 439 | |
| 440 | MODULE_DESCRIPTION("SDHCI driver for pxav3"); |
| 441 | MODULE_AUTHOR("Marvell International Ltd."); |
| 442 | MODULE_LICENSE("GPL v2"); |
| 443 | |