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Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/mach-s3c2440/mach-osiris.c
Ben Dooks110d3222006-03-20 17:10:02 +00002 *
Ben Dooksccae9412009-11-13 22:54:14 +00003 * Copyright (c) 2005-2008 Simtec Electronics
Ben Dooks110d3222006-03-20 17:10:02 +00004 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
Ben Dooksec976d62009-05-13 22:52:24 +010018#include <linux/gpio.h>
Ben Dooks110d3222006-03-20 17:10:02 +000019#include <linux/device.h>
Ben Dooks5698bd22007-06-06 10:36:09 +010020#include <linux/sysdev.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010021#include <linux/serial_core.h>
Ben Dooksd96a9802008-04-16 00:12:39 +010022#include <linux/clk.h>
Ben Dooksf3374222008-07-03 11:24:40 +010023#include <linux/i2c.h>
Russell Kingfced80c2008-09-06 12:10:45 +010024#include <linux/io.h>
Ben Dooks110d3222006-03-20 17:10:02 +000025
Ben Dooks4fa084a2009-11-13 22:34:21 +000026#include <linux/i2c/tps65010.h>
27
Ben Dooks110d3222006-03-20 17:10:02 +000028#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/irq.h>
31
Russell Kinga09e64f2008-08-05 16:14:15 +010032#include <mach/osiris-map.h>
33#include <mach/osiris-cpld.h>
Ben Dooks110d3222006-03-20 17:10:02 +000034
Russell Kinga09e64f2008-08-05 16:14:15 +010035#include <mach/hardware.h>
Ben Dooks110d3222006-03-20 17:10:02 +000036#include <asm/irq.h>
37#include <asm/mach-types.h>
38
Ben Dooksbaf6b282009-07-30 23:23:32 +010039#include <plat/cpu-freq.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010040#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010041#include <mach/regs-gpio.h>
42#include <mach/regs-mem.h>
43#include <mach/regs-lcd.h>
Ben Dooks7926b5a2008-10-30 10:14:35 +000044#include <plat/nand.h>
Ben Dooks3e1b7762008-10-31 16:14:40 +000045#include <plat/iic.h>
Ben Dooks110d3222006-03-20 17:10:02 +000046
47#include <linux/mtd/mtd.h>
48#include <linux/mtd/nand.h>
49#include <linux/mtd/nand_ecc.h>
50#include <linux/mtd/partitions.h>
51
Ben Dooks40b956f2010-05-04 14:38:49 +090052#include <plat/gpio-cfg.h>
Ben Dooksd5120ae2008-10-07 23:09:51 +010053#include <plat/clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010054#include <plat/devs.h>
55#include <plat/cpu.h>
Ben Dooks110d3222006-03-20 17:10:02 +000056
Simon Arlott6cbdc8c2007-05-11 20:40:30 +010057/* onboard perihperal map */
Ben Dooks110d3222006-03-20 17:10:02 +000058
59static struct map_desc osiris_iodesc[] __initdata = {
60 /* ISA IO areas (may be over-written later) */
61
62 {
63 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
64 .pfn = __phys_to_pfn(S3C2410_CS5),
65 .length = SZ_16M,
66 .type = MT_DEVICE,
67 }, {
68 .virtual = (u32)S3C24XX_VA_ISA_WORD,
69 .pfn = __phys_to_pfn(S3C2410_CS5),
70 .length = SZ_16M,
71 .type = MT_DEVICE,
72 },
73
74 /* CPLD control registers */
75
76 {
Ben Dooksc362aec2007-06-06 09:51:51 +010077 .virtual = (u32)OSIRIS_VA_CTRL0,
78 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL0),
79 .length = SZ_16K,
80 .type = MT_DEVICE,
81 }, {
Ben Dooks110d3222006-03-20 17:10:02 +000082 .virtual = (u32)OSIRIS_VA_CTRL1,
83 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1),
84 .length = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +010085 .type = MT_DEVICE,
Ben Dooks110d3222006-03-20 17:10:02 +000086 }, {
87 .virtual = (u32)OSIRIS_VA_CTRL2,
88 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2),
89 .length = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +010090 .type = MT_DEVICE,
Ben Dooksc362aec2007-06-06 09:51:51 +010091 }, {
92 .virtual = (u32)OSIRIS_VA_IDREG,
93 .pfn = __phys_to_pfn(OSIRIS_PA_IDREG),
94 .length = SZ_16K,
95 .type = MT_DEVICE,
Ben Dooks110d3222006-03-20 17:10:02 +000096 },
97};
98
99#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
100#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
101#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
102
103static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
104 [0] = {
105 .name = "uclk",
106 .divisor = 1,
107 .min_baud = 0,
108 .max_baud = 0,
109 },
110 [1] = {
111 .name = "pclk",
112 .divisor = 1,
113 .min_baud = 0,
Ben Dooks705630d2006-07-26 20:16:39 +0100114 .max_baud = 0,
Ben Dooks110d3222006-03-20 17:10:02 +0000115 }
116};
117
Ben Dooks66a9b492006-06-18 23:04:05 +0100118static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
Ben Dooks110d3222006-03-20 17:10:02 +0000119 [0] = {
120 .hwport = 0,
121 .flags = 0,
122 .ucon = UCON,
123 .ulcon = ULCON,
124 .ufcon = UFCON,
125 .clocks = osiris_serial_clocks,
Ben Dooks705630d2006-07-26 20:16:39 +0100126 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
Ben Dooks110d3222006-03-20 17:10:02 +0000127 },
128 [1] = {
Ben Dookse2e58102006-06-18 16:21:50 +0100129 .hwport = 1,
Ben Dooks110d3222006-03-20 17:10:02 +0000130 .flags = 0,
131 .ucon = UCON,
132 .ulcon = ULCON,
133 .ufcon = UFCON,
134 .clocks = osiris_serial_clocks,
Ben Dooks705630d2006-07-26 20:16:39 +0100135 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
Ben Dooks110d3222006-03-20 17:10:02 +0000136 },
Ben Dooksca7aa4d2006-12-07 20:49:01 +0100137 [2] = {
138 .hwport = 2,
139 .flags = 0,
140 .ucon = UCON,
141 .ulcon = ULCON,
142 .ufcon = UFCON,
143 .clocks = osiris_serial_clocks,
144 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
145 }
Ben Dooks110d3222006-03-20 17:10:02 +0000146};
147
148/* NAND Flash on Osiris board */
149
150static int external_map[] = { 2 };
151static int chip0_map[] = { 0 };
152static int chip1_map[] = { 1 };
153
Ben Dooks2a3a1802009-09-28 13:59:49 +0300154static struct mtd_partition __initdata osiris_default_nand_part[] = {
Ben Dooks110d3222006-03-20 17:10:02 +0000155 [0] = {
156 .name = "Boot Agent",
157 .size = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +0100158 .offset = 0,
Ben Dooks110d3222006-03-20 17:10:02 +0000159 },
160 [1] = {
161 .name = "/boot",
162 .size = SZ_4M - SZ_16K,
163 .offset = SZ_16K,
164 },
165 [2] = {
166 .name = "user1",
167 .offset = SZ_4M,
168 .size = SZ_32M - SZ_4M,
169 },
170 [3] = {
171 .name = "user2",
172 .offset = SZ_32M,
173 .size = MTDPART_SIZ_FULL,
174 }
175};
176
Ben Dooks2a3a1802009-09-28 13:59:49 +0300177static struct mtd_partition __initdata osiris_default_nand_part_large[] = {
Ben Dooks3c3e69c2007-07-12 10:57:37 +0100178 [0] = {
179 .name = "Boot Agent",
180 .size = SZ_128K,
181 .offset = 0,
182 },
183 [1] = {
184 .name = "/boot",
185 .size = SZ_4M - SZ_128K,
186 .offset = SZ_128K,
187 },
188 [2] = {
189 .name = "user1",
190 .offset = SZ_4M,
191 .size = SZ_32M - SZ_4M,
192 },
193 [3] = {
194 .name = "user2",
195 .offset = SZ_32M,
196 .size = MTDPART_SIZ_FULL,
197 }
198};
199
Ben Dooks110d3222006-03-20 17:10:02 +0000200/* the Osiris has 3 selectable slots for nand-flash, the two
201 * on-board chip areas, as well as the external slot.
202 *
203 * Note, there is no current hot-plug support for the External
204 * socket.
205*/
206
Ben Dooks2a3a1802009-09-28 13:59:49 +0300207static struct s3c2410_nand_set __initdata osiris_nand_sets[] = {
Ben Dooks110d3222006-03-20 17:10:02 +0000208 [1] = {
209 .name = "External",
210 .nr_chips = 1,
211 .nr_map = external_map,
Ben Dooksd9237382009-12-23 19:25:01 +0000212 .options = NAND_SCAN_SILENT_NODEV,
Ben Dooks110d3222006-03-20 17:10:02 +0000213 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100214 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000215 },
216 [0] = {
217 .name = "chip0",
218 .nr_chips = 1,
219 .nr_map = chip0_map,
220 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100221 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000222 },
223 [2] = {
224 .name = "chip1",
225 .nr_chips = 1,
226 .nr_map = chip1_map,
Ben Dooksd9237382009-12-23 19:25:01 +0000227 .options = NAND_SCAN_SILENT_NODEV,
Ben Dooks110d3222006-03-20 17:10:02 +0000228 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100229 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000230 },
231};
232
233static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
234{
235 unsigned int tmp;
236
237 slot = set->nr_map[slot] & 3;
238
239 pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
240 slot, set, set->nr_map);
241
Ben Dooksc362aec2007-06-06 09:51:51 +0100242 tmp = __raw_readb(OSIRIS_VA_CTRL0);
243 tmp &= ~OSIRIS_CTRL0_NANDSEL;
Ben Dooks110d3222006-03-20 17:10:02 +0000244 tmp |= slot;
245
Ben Dooksc362aec2007-06-06 09:51:51 +0100246 pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
Ben Dooks110d3222006-03-20 17:10:02 +0000247
Ben Dooksc362aec2007-06-06 09:51:51 +0100248 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
Ben Dooks110d3222006-03-20 17:10:02 +0000249}
250
Ben Dooks2a3a1802009-09-28 13:59:49 +0300251static struct s3c2410_platform_nand __initdata osiris_nand_info = {
Ben Dooks110d3222006-03-20 17:10:02 +0000252 .tacls = 25,
253 .twrph0 = 60,
254 .twrph1 = 60,
255 .nr_sets = ARRAY_SIZE(osiris_nand_sets),
256 .sets = osiris_nand_sets,
257 .select_chip = osiris_nand_select,
258};
259
260/* PCMCIA control and configuration */
261
262static struct resource osiris_pcmcia_resource[] = {
263 [0] = {
264 .start = 0x0f000000,
265 .end = 0x0f100000,
266 .flags = IORESOURCE_MEM,
267 },
268 [1] = {
269 .start = 0x0c000000,
270 .end = 0x0c100000,
271 .flags = IORESOURCE_MEM,
272 }
273};
274
275static struct platform_device osiris_pcmcia = {
276 .name = "osiris-pcmcia",
277 .id = -1,
278 .num_resources = ARRAY_SIZE(osiris_pcmcia_resource),
279 .resource = osiris_pcmcia_resource,
280};
281
Ben Dooks5698bd22007-06-06 10:36:09 +0100282/* Osiris power management device */
283
284#ifdef CONFIG_PM
285static unsigned char pm_osiris_ctrl0;
286
287static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
288{
Ben Dooks28047ec2007-10-04 23:16:42 +0100289 unsigned int tmp;
290
Ben Dooks5698bd22007-06-06 10:36:09 +0100291 pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
Ben Dooks28047ec2007-10-04 23:16:42 +0100292 tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL;
293
294 /* ensure correct NAND slot is selected on resume */
295 if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0)
296 tmp |= 2;
297
298 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
299
Ben Dooks4afcdda2007-10-04 23:18:08 +0100300 /* ensure that an nRESET is not generated on resume. */
Ben Dooks070276d2009-05-17 22:32:23 +0100301 s3c2410_gpio_setpin(S3C2410_GPA(21), 1);
Ben Dooks40b956f2010-05-04 14:38:49 +0900302 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT);
Ben Dooks4afcdda2007-10-04 23:18:08 +0100303
Ben Dooks5698bd22007-06-06 10:36:09 +0100304 return 0;
305}
306
307static int osiris_pm_resume(struct sys_device *sd)
308{
309 if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
310 __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
311
Ben Dooks28047ec2007-10-04 23:16:42 +0100312 __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
313
Ben Dooks40b956f2010-05-04 14:38:49 +0900314 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
Ben Dooks4afcdda2007-10-04 23:18:08 +0100315
Ben Dooks5698bd22007-06-06 10:36:09 +0100316 return 0;
317}
318
319#else
320#define osiris_pm_suspend NULL
321#define osiris_pm_resume NULL
322#endif
323
324static struct sysdev_class osiris_pm_sysclass = {
Kay Sieversaf5ca3f2007-12-20 02:09:39 +0100325 .name = "mach-osiris",
Ben Dooks5698bd22007-06-06 10:36:09 +0100326 .suspend = osiris_pm_suspend,
327 .resume = osiris_pm_resume,
328};
329
330static struct sys_device osiris_pm_sysdev = {
331 .cls = &osiris_pm_sysclass,
332};
333
Ben Dooks4fa084a2009-11-13 22:34:21 +0000334/* Link for DVS driver to TPS65011 */
335
336static void osiris_tps_release(struct device *dev)
337{
338 /* static device, do not need to release anything */
339}
340
341static struct platform_device osiris_tps_device = {
342 .name = "osiris-dvs",
343 .id = -1,
344 .dev.release = osiris_tps_release,
345};
346
347static int osiris_tps_setup(struct i2c_client *client, void *context)
348{
349 osiris_tps_device.dev.parent = &client->dev;
350 return platform_device_register(&osiris_tps_device);
351}
352
353static int osiris_tps_remove(struct i2c_client *client, void *context)
354{
355 platform_device_unregister(&osiris_tps_device);
356 return 0;
357}
358
359static struct tps65010_board osiris_tps_board = {
360 .base = -1, /* GPIO can go anywhere at the moment */
361 .setup = osiris_tps_setup,
362 .teardown = osiris_tps_remove,
363};
364
Ben Dooksf3374222008-07-03 11:24:40 +0100365/* I2C devices fitted. */
366
367static struct i2c_board_info osiris_i2c_devs[] __initdata = {
368 {
369 I2C_BOARD_INFO("tps65011", 0x48),
370 .irq = IRQ_EINT20,
Ben Dooks4fa084a2009-11-13 22:34:21 +0000371 .platform_data = &osiris_tps_board,
Ben Dooksf3374222008-07-03 11:24:40 +0100372 },
373};
374
Ben Dooks110d3222006-03-20 17:10:02 +0000375/* Standard Osiris devices */
376
377static struct platform_device *osiris_devices[] __initdata = {
Ben Dooks3e1b7762008-10-31 16:14:40 +0000378 &s3c_device_i2c0,
Ben Dooks55ba86b2007-06-06 09:53:00 +0100379 &s3c_device_wdt,
Ben Dooks110d3222006-03-20 17:10:02 +0000380 &s3c_device_nand,
381 &osiris_pcmcia,
382};
383
Ben Dooks2bc75092008-07-15 17:17:48 +0100384static struct clk *osiris_clocks[] __initdata = {
Ben Dooks110d3222006-03-20 17:10:02 +0000385 &s3c24xx_dclk0,
386 &s3c24xx_dclk1,
387 &s3c24xx_clkout0,
388 &s3c24xx_clkout1,
389 &s3c24xx_uclk,
390};
391
Ben Dooksbaf6b282009-07-30 23:23:32 +0100392static struct s3c_cpufreq_board __initdata osiris_cpufreq = {
393 .refresh = 7800, /* refresh period is 7.8usec */
394 .auto_io = 1,
395 .need_io = 1,
396};
397
Ben Dooksda956fd2006-03-20 21:02:39 +0000398static void __init osiris_map_io(void)
Ben Dooks110d3222006-03-20 17:10:02 +0000399{
Ben Dooksda956fd2006-03-20 21:02:39 +0000400 unsigned long flags;
401
Ben Dooks110d3222006-03-20 17:10:02 +0000402 /* initialise the clocks */
403
Ben Dooksd96a9802008-04-16 00:12:39 +0100404 s3c24xx_dclk0.parent = &clk_upll;
Ben Dooks110d3222006-03-20 17:10:02 +0000405 s3c24xx_dclk0.rate = 12*1000*1000;
406
Ben Dooksd96a9802008-04-16 00:12:39 +0100407 s3c24xx_dclk1.parent = &clk_upll;
Ben Dooks110d3222006-03-20 17:10:02 +0000408 s3c24xx_dclk1.rate = 24*1000*1000;
409
410 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
411 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
412
413 s3c24xx_uclk.parent = &s3c24xx_clkout1;
414
Ben Dooksce89c202007-04-20 11:15:27 +0100415 s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks));
416
Ben Dooks110d3222006-03-20 17:10:02 +0000417 s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc));
418 s3c24xx_init_clocks(0);
419 s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
Ben Dooks110d3222006-03-20 17:10:02 +0000420
Ben Dooks3c3e69c2007-07-12 10:57:37 +0100421 /* check for the newer revision boards with large page nand */
422
423 if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) {
424 printk(KERN_INFO "OSIRIS-B detected (revision %d)\n",
425 __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK);
426 osiris_nand_sets[0].partitions = osiris_default_nand_part_large;
427 osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large);
428 } else {
429 /* write-protect line to the NAND */
Ben Dooks070276d2009-05-17 22:32:23 +0100430 s3c2410_gpio_setpin(S3C2410_GPA(0), 1);
Ben Dooks3c3e69c2007-07-12 10:57:37 +0100431 }
432
Ben Dooks110d3222006-03-20 17:10:02 +0000433 /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
Ben Dooksda956fd2006-03-20 21:02:39 +0000434
435 local_irq_save(flags);
Ben Dooks110d3222006-03-20 17:10:02 +0000436 __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
Ben Dooksda956fd2006-03-20 21:02:39 +0000437 local_irq_restore(flags);
Ben Dooks110d3222006-03-20 17:10:02 +0000438}
439
Ben Dooks57e51712007-04-20 11:19:16 +0100440static void __init osiris_init(void)
441{
Ben Dooks5698bd22007-06-06 10:36:09 +0100442 sysdev_class_register(&osiris_pm_sysclass);
443 sysdev_register(&osiris_pm_sysdev);
444
Ben Dooks3e1b7762008-10-31 16:14:40 +0000445 s3c_i2c0_set_platdata(NULL);
Ben Dooks2a3a1802009-09-28 13:59:49 +0300446 s3c_nand_set_platdata(&osiris_nand_info);
Ben Dooks3e1b7762008-10-31 16:14:40 +0000447
Ben Dooksbaf6b282009-07-30 23:23:32 +0100448 s3c_cpufreq_setboard(&osiris_cpufreq);
449
Ben Dooksf3374222008-07-03 11:24:40 +0100450 i2c_register_board_info(0, osiris_i2c_devs,
451 ARRAY_SIZE(osiris_i2c_devs));
452
Ben Dooks57e51712007-04-20 11:19:16 +0100453 platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
454};
455
Ben Dooks110d3222006-03-20 17:10:02 +0000456MACHINE_START(OSIRIS, "Simtec-OSIRIS")
457 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
Ben Dooks110d3222006-03-20 17:10:02 +0000458 .phys_io = S3C2410_PA_UART,
459 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
460 .boot_params = S3C2410_SDRAM_PA + 0x100,
461 .map_io = osiris_map_io,
Ben Dooks110d3222006-03-20 17:10:02 +0000462 .init_irq = s3c24xx_init_irq,
Ben Dooks5698bd22007-06-06 10:36:09 +0100463 .init_machine = osiris_init,
Ben Dooks110d3222006-03-20 17:10:02 +0000464 .timer = &s3c24xx_timer,
465MACHINE_END