| Daniel Vetter | 0ade638 | 2010-08-24 22:18:41 +0200 | [diff] [blame] | 1 | /* Common header for intel-gtt.ko and i915.ko */ |
| 2 | |
| 3 | #ifndef _DRM_INTEL_GTT_H |
| 4 | #define _DRM_INTEL_GTT_H |
| Chris Wilson | c64f7ba | 2010-11-23 14:24:24 +0000 | [diff] [blame] | 5 | |
| 6 | const struct intel_gtt { |
| 7 | /* Size of memory reserved for graphics by the BIOS */ |
| 8 | unsigned int stolen_size; |
| Daniel Vetter | 0ade638 | 2010-08-24 22:18:41 +0200 | [diff] [blame] | 9 | /* Total number of gtt entries. */ |
| 10 | unsigned int gtt_total_entries; |
| 11 | /* Part of the gtt that is mappable by the cpu, for those chips where |
| 12 | * this is not the full gtt. */ |
| 13 | unsigned int gtt_mappable_entries; |
| Chris Wilson | c64f7ba | 2010-11-23 14:24:24 +0000 | [diff] [blame] | 14 | } *intel_gtt_get(void); |
| Daniel Vetter | 1996675 | 2010-09-06 20:08:44 +0200 | [diff] [blame] | 15 | |
| Daniel Vetter | 40ce657 | 2010-11-05 18:12:18 +0100 | [diff] [blame^] | 16 | void intel_gtt_chipset_flush(void); |
| Daniel Vetter | 23ed992 | 2010-11-05 18:04:52 +0100 | [diff] [blame] | 17 | |
| 18 | /* Special gtt memory types */ |
| 19 | #define AGP_DCACHE_MEMORY 1 |
| 20 | #define AGP_PHYS_MEMORY 2 |
| 21 | |
| 22 | /* New caching attributes for gen6/sandybridge */ |
| 23 | #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2) |
| 24 | #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4) |
| 25 | |
| 26 | /* flag for GFDT type */ |
| 27 | #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) |
| 28 | |
| Daniel Vetter | 0ade638 | 2010-08-24 22:18:41 +0200 | [diff] [blame] | 29 | #endif |