Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * *************************************************************************** |
Paul Gortmaker | 89ebc27 | 2016-03-13 19:48:52 -0400 | [diff] [blame] | 3 | * Marvell Armada-3700 Serial Driver |
| 4 | * Author: Wilson Ding <dingwei@marvell.com> |
Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 5 | * Copyright (C) 2015 Marvell International Ltd. |
| 6 | * *************************************************************************** |
| 7 | * This program is free software: you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the Free |
| 9 | * Software Foundation, either version 2 of the License, or any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | * *************************************************************************** |
| 19 | */ |
| 20 | |
| 21 | #include <linux/clk.h> |
| 22 | #include <linux/console.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/device.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/io.h> |
| 27 | #include <linux/iopoll.h> |
Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 28 | #include <linux/of.h> |
| 29 | #include <linux/of_address.h> |
| 30 | #include <linux/of_device.h> |
| 31 | #include <linux/of_irq.h> |
| 32 | #include <linux/of_platform.h> |
| 33 | #include <linux/platform_device.h> |
| 34 | #include <linux/serial.h> |
| 35 | #include <linux/serial_core.h> |
| 36 | #include <linux/slab.h> |
| 37 | #include <linux/tty.h> |
| 38 | #include <linux/tty_flip.h> |
| 39 | |
| 40 | /* Register Map */ |
| 41 | #define UART_RBR 0x00 |
| 42 | #define RBR_BRK_DET BIT(15) |
| 43 | #define RBR_FRM_ERR_DET BIT(14) |
| 44 | #define RBR_PAR_ERR_DET BIT(13) |
| 45 | #define RBR_OVR_ERR_DET BIT(12) |
| 46 | |
| 47 | #define UART_TSH 0x04 |
| 48 | |
| 49 | #define UART_CTRL 0x08 |
| 50 | #define CTRL_SOFT_RST BIT(31) |
| 51 | #define CTRL_TXFIFO_RST BIT(15) |
| 52 | #define CTRL_RXFIFO_RST BIT(14) |
| 53 | #define CTRL_ST_MIRR_EN BIT(13) |
| 54 | #define CTRL_LPBK_EN BIT(12) |
| 55 | #define CTRL_SND_BRK_SEQ BIT(11) |
| 56 | #define CTRL_PAR_EN BIT(10) |
| 57 | #define CTRL_TWO_STOP BIT(9) |
| 58 | #define CTRL_TX_HFL_INT BIT(8) |
| 59 | #define CTRL_RX_HFL_INT BIT(7) |
| 60 | #define CTRL_TX_EMP_INT BIT(6) |
| 61 | #define CTRL_TX_RDY_INT BIT(5) |
| 62 | #define CTRL_RX_RDY_INT BIT(4) |
| 63 | #define CTRL_BRK_DET_INT BIT(3) |
| 64 | #define CTRL_FRM_ERR_INT BIT(2) |
| 65 | #define CTRL_PAR_ERR_INT BIT(1) |
| 66 | #define CTRL_OVR_ERR_INT BIT(0) |
| 67 | #define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\ |
| 68 | CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT) |
| 69 | |
| 70 | #define UART_STAT 0x0c |
| 71 | #define STAT_TX_FIFO_EMP BIT(13) |
| 72 | #define STAT_RX_FIFO_EMP BIT(12) |
| 73 | #define STAT_TX_FIFO_FUL BIT(11) |
| 74 | #define STAT_TX_FIFO_HFL BIT(10) |
| 75 | #define STAT_RX_TOGL BIT(9) |
| 76 | #define STAT_RX_FIFO_FUL BIT(8) |
| 77 | #define STAT_RX_FIFO_HFL BIT(7) |
| 78 | #define STAT_TX_EMP BIT(6) |
| 79 | #define STAT_TX_RDY BIT(5) |
| 80 | #define STAT_RX_RDY BIT(4) |
| 81 | #define STAT_BRK_DET BIT(3) |
| 82 | #define STAT_FRM_ERR BIT(2) |
| 83 | #define STAT_PAR_ERR BIT(1) |
| 84 | #define STAT_OVR_ERR BIT(0) |
| 85 | #define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\ |
| 86 | | STAT_PAR_ERR | STAT_OVR_ERR) |
| 87 | |
| 88 | #define UART_BRDV 0x10 |
| 89 | |
| 90 | #define MVEBU_NR_UARTS 1 |
| 91 | |
| 92 | #define MVEBU_UART_TYPE "mvebu-uart" |
| 93 | |
| 94 | static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS]; |
| 95 | |
| 96 | struct mvebu_uart_data { |
| 97 | struct uart_port *port; |
| 98 | struct clk *clk; |
| 99 | }; |
| 100 | |
| 101 | /* Core UART Driver Operations */ |
| 102 | static unsigned int mvebu_uart_tx_empty(struct uart_port *port) |
| 103 | { |
| 104 | unsigned long flags; |
| 105 | unsigned int st; |
| 106 | |
| 107 | spin_lock_irqsave(&port->lock, flags); |
| 108 | st = readl(port->membase + UART_STAT); |
| 109 | spin_unlock_irqrestore(&port->lock, flags); |
| 110 | |
| 111 | return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0; |
| 112 | } |
| 113 | |
| 114 | static unsigned int mvebu_uart_get_mctrl(struct uart_port *port) |
| 115 | { |
| 116 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; |
| 117 | } |
| 118 | |
| 119 | static void mvebu_uart_set_mctrl(struct uart_port *port, |
| 120 | unsigned int mctrl) |
| 121 | { |
| 122 | /* |
| 123 | * Even if we do not support configuring the modem control lines, this |
| 124 | * function must be proided to the serial core |
| 125 | */ |
| 126 | } |
| 127 | |
| 128 | static void mvebu_uart_stop_tx(struct uart_port *port) |
| 129 | { |
| 130 | unsigned int ctl = readl(port->membase + UART_CTRL); |
| 131 | |
| 132 | ctl &= ~CTRL_TX_RDY_INT; |
| 133 | writel(ctl, port->membase + UART_CTRL); |
| 134 | } |
| 135 | |
| 136 | static void mvebu_uart_start_tx(struct uart_port *port) |
| 137 | { |
| 138 | unsigned int ctl = readl(port->membase + UART_CTRL); |
| 139 | |
| 140 | ctl |= CTRL_TX_RDY_INT; |
| 141 | writel(ctl, port->membase + UART_CTRL); |
| 142 | } |
| 143 | |
| 144 | static void mvebu_uart_stop_rx(struct uart_port *port) |
| 145 | { |
| 146 | unsigned int ctl = readl(port->membase + UART_CTRL); |
| 147 | |
| 148 | ctl &= ~CTRL_RX_INT; |
| 149 | writel(ctl, port->membase + UART_CTRL); |
| 150 | } |
| 151 | |
| 152 | static void mvebu_uart_break_ctl(struct uart_port *port, int brk) |
| 153 | { |
| 154 | unsigned int ctl; |
| 155 | unsigned long flags; |
| 156 | |
| 157 | spin_lock_irqsave(&port->lock, flags); |
| 158 | ctl = readl(port->membase + UART_CTRL); |
| 159 | if (brk == -1) |
| 160 | ctl |= CTRL_SND_BRK_SEQ; |
| 161 | else |
| 162 | ctl &= ~CTRL_SND_BRK_SEQ; |
| 163 | writel(ctl, port->membase + UART_CTRL); |
| 164 | spin_unlock_irqrestore(&port->lock, flags); |
| 165 | } |
| 166 | |
| 167 | static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status) |
| 168 | { |
| 169 | struct tty_port *tport = &port->state->port; |
| 170 | unsigned char ch = 0; |
| 171 | char flag = 0; |
| 172 | |
| 173 | do { |
| 174 | if (status & STAT_RX_RDY) { |
| 175 | ch = readl(port->membase + UART_RBR); |
| 176 | ch &= 0xff; |
| 177 | flag = TTY_NORMAL; |
| 178 | port->icount.rx++; |
| 179 | |
| 180 | if (status & STAT_PAR_ERR) |
| 181 | port->icount.parity++; |
| 182 | } |
| 183 | |
| 184 | if (status & STAT_BRK_DET) { |
| 185 | port->icount.brk++; |
| 186 | status &= ~(STAT_FRM_ERR | STAT_PAR_ERR); |
| 187 | if (uart_handle_break(port)) |
| 188 | goto ignore_char; |
| 189 | } |
| 190 | |
| 191 | if (status & STAT_OVR_ERR) |
| 192 | port->icount.overrun++; |
| 193 | |
| 194 | if (status & STAT_FRM_ERR) |
| 195 | port->icount.frame++; |
| 196 | |
| 197 | if (uart_handle_sysrq_char(port, ch)) |
| 198 | goto ignore_char; |
| 199 | |
| 200 | if (status & port->ignore_status_mask & STAT_PAR_ERR) |
| 201 | status &= ~STAT_RX_RDY; |
| 202 | |
| 203 | status &= port->read_status_mask; |
| 204 | |
| 205 | if (status & STAT_PAR_ERR) |
| 206 | flag = TTY_PARITY; |
| 207 | |
| 208 | status &= ~port->ignore_status_mask; |
| 209 | |
| 210 | if (status & STAT_RX_RDY) |
| 211 | tty_insert_flip_char(tport, ch, flag); |
| 212 | |
| 213 | if (status & STAT_BRK_DET) |
| 214 | tty_insert_flip_char(tport, 0, TTY_BREAK); |
| 215 | |
| 216 | if (status & STAT_FRM_ERR) |
| 217 | tty_insert_flip_char(tport, 0, TTY_FRAME); |
| 218 | |
| 219 | if (status & STAT_OVR_ERR) |
| 220 | tty_insert_flip_char(tport, 0, TTY_OVERRUN); |
| 221 | |
| 222 | ignore_char: |
| 223 | status = readl(port->membase + UART_STAT); |
| 224 | } while (status & (STAT_RX_RDY | STAT_BRK_DET)); |
| 225 | |
| 226 | tty_flip_buffer_push(tport); |
| 227 | } |
| 228 | |
| 229 | static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status) |
| 230 | { |
| 231 | struct circ_buf *xmit = &port->state->xmit; |
| 232 | unsigned int count; |
| 233 | unsigned int st; |
| 234 | |
| 235 | if (port->x_char) { |
| 236 | writel(port->x_char, port->membase + UART_TSH); |
| 237 | port->icount.tx++; |
| 238 | port->x_char = 0; |
| 239 | return; |
| 240 | } |
| 241 | |
| 242 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
| 243 | mvebu_uart_stop_tx(port); |
| 244 | return; |
| 245 | } |
| 246 | |
| 247 | for (count = 0; count < port->fifosize; count++) { |
| 248 | writel(xmit->buf[xmit->tail], port->membase + UART_TSH); |
| 249 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 250 | port->icount.tx++; |
| 251 | |
| 252 | if (uart_circ_empty(xmit)) |
| 253 | break; |
| 254 | |
| 255 | st = readl(port->membase + UART_STAT); |
| 256 | if (st & STAT_TX_FIFO_FUL) |
| 257 | break; |
| 258 | } |
| 259 | |
| 260 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 261 | uart_write_wakeup(port); |
| 262 | |
| 263 | if (uart_circ_empty(xmit)) |
| 264 | mvebu_uart_stop_tx(port); |
| 265 | } |
| 266 | |
| 267 | static irqreturn_t mvebu_uart_isr(int irq, void *dev_id) |
| 268 | { |
| 269 | struct uart_port *port = (struct uart_port *)dev_id; |
| 270 | unsigned int st = readl(port->membase + UART_STAT); |
| 271 | |
| 272 | if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET)) |
| 273 | mvebu_uart_rx_chars(port, st); |
| 274 | |
| 275 | if (st & STAT_TX_RDY) |
| 276 | mvebu_uart_tx_chars(port, st); |
| 277 | |
| 278 | return IRQ_HANDLED; |
| 279 | } |
| 280 | |
| 281 | static int mvebu_uart_startup(struct uart_port *port) |
| 282 | { |
| 283 | int ret; |
| 284 | |
| 285 | writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST, |
| 286 | port->membase + UART_CTRL); |
| 287 | udelay(1); |
| 288 | writel(CTRL_RX_INT, port->membase + UART_CTRL); |
| 289 | |
| 290 | ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial", |
| 291 | port); |
| 292 | if (ret) { |
| 293 | dev_err(port->dev, "failed to request irq\n"); |
| 294 | return ret; |
| 295 | } |
| 296 | |
| 297 | return 0; |
| 298 | } |
| 299 | |
| 300 | static void mvebu_uart_shutdown(struct uart_port *port) |
| 301 | { |
| 302 | writel(0, port->membase + UART_CTRL); |
| 303 | } |
| 304 | |
| 305 | static void mvebu_uart_set_termios(struct uart_port *port, |
| 306 | struct ktermios *termios, |
| 307 | struct ktermios *old) |
| 308 | { |
| 309 | unsigned long flags; |
| 310 | unsigned int baud; |
| 311 | |
| 312 | spin_lock_irqsave(&port->lock, flags); |
| 313 | |
| 314 | port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR | |
| 315 | STAT_TX_RDY | STAT_TX_FIFO_FUL; |
| 316 | |
| 317 | if (termios->c_iflag & INPCK) |
| 318 | port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR; |
| 319 | |
| 320 | port->ignore_status_mask = 0; |
| 321 | if (termios->c_iflag & IGNPAR) |
| 322 | port->ignore_status_mask |= |
| 323 | STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR; |
| 324 | |
| 325 | if ((termios->c_cflag & CREAD) == 0) |
| 326 | port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR; |
| 327 | |
| 328 | if (old) |
| 329 | tty_termios_copy_hw(termios, old); |
| 330 | |
| 331 | baud = uart_get_baud_rate(port, termios, old, 0, 460800); |
| 332 | uart_update_timeout(port, termios->c_cflag, baud); |
| 333 | |
| 334 | spin_unlock_irqrestore(&port->lock, flags); |
| 335 | } |
| 336 | |
| 337 | static const char *mvebu_uart_type(struct uart_port *port) |
| 338 | { |
| 339 | return MVEBU_UART_TYPE; |
| 340 | } |
| 341 | |
| 342 | static void mvebu_uart_release_port(struct uart_port *port) |
| 343 | { |
| 344 | /* Nothing to do here */ |
| 345 | } |
| 346 | |
| 347 | static int mvebu_uart_request_port(struct uart_port *port) |
| 348 | { |
| 349 | return 0; |
| 350 | } |
| 351 | |
| 352 | #ifdef CONFIG_CONSOLE_POLL |
| 353 | static int mvebu_uart_get_poll_char(struct uart_port *port) |
| 354 | { |
| 355 | unsigned int st = readl(port->membase + UART_STAT); |
| 356 | |
| 357 | if (!(st & STAT_RX_RDY)) |
| 358 | return NO_POLL_CHAR; |
| 359 | |
| 360 | return readl(port->membase + UART_RBR); |
| 361 | } |
| 362 | |
| 363 | static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c) |
| 364 | { |
| 365 | unsigned int st; |
| 366 | |
| 367 | for (;;) { |
| 368 | st = readl(port->membase + UART_STAT); |
| 369 | |
| 370 | if (!(st & STAT_TX_FIFO_FUL)) |
| 371 | break; |
| 372 | |
| 373 | udelay(1); |
| 374 | } |
| 375 | |
| 376 | writel(c, port->membase + UART_TSH); |
| 377 | } |
| 378 | #endif |
| 379 | |
| 380 | static const struct uart_ops mvebu_uart_ops = { |
| 381 | .tx_empty = mvebu_uart_tx_empty, |
| 382 | .set_mctrl = mvebu_uart_set_mctrl, |
| 383 | .get_mctrl = mvebu_uart_get_mctrl, |
| 384 | .stop_tx = mvebu_uart_stop_tx, |
| 385 | .start_tx = mvebu_uart_start_tx, |
| 386 | .stop_rx = mvebu_uart_stop_rx, |
| 387 | .break_ctl = mvebu_uart_break_ctl, |
| 388 | .startup = mvebu_uart_startup, |
| 389 | .shutdown = mvebu_uart_shutdown, |
| 390 | .set_termios = mvebu_uart_set_termios, |
| 391 | .type = mvebu_uart_type, |
| 392 | .release_port = mvebu_uart_release_port, |
| 393 | .request_port = mvebu_uart_request_port, |
| 394 | #ifdef CONFIG_CONSOLE_POLL |
| 395 | .poll_get_char = mvebu_uart_get_poll_char, |
| 396 | .poll_put_char = mvebu_uart_put_poll_char, |
| 397 | #endif |
| 398 | }; |
| 399 | |
| 400 | /* Console Driver Operations */ |
| 401 | |
| 402 | #ifdef CONFIG_SERIAL_MVEBU_CONSOLE |
| 403 | /* Early Console */ |
| 404 | static void mvebu_uart_putc(struct uart_port *port, int c) |
| 405 | { |
| 406 | unsigned int st; |
| 407 | |
| 408 | for (;;) { |
| 409 | st = readl(port->membase + UART_STAT); |
| 410 | if (!(st & STAT_TX_FIFO_FUL)) |
| 411 | break; |
| 412 | } |
| 413 | |
| 414 | writel(c, port->membase + UART_TSH); |
| 415 | |
| 416 | for (;;) { |
| 417 | st = readl(port->membase + UART_STAT); |
| 418 | if (st & STAT_TX_FIFO_EMP) |
| 419 | break; |
| 420 | } |
| 421 | } |
| 422 | |
| 423 | static void mvebu_uart_putc_early_write(struct console *con, |
| 424 | const char *s, |
| 425 | unsigned n) |
| 426 | { |
| 427 | struct earlycon_device *dev = con->data; |
| 428 | |
| 429 | uart_console_write(&dev->port, s, n, mvebu_uart_putc); |
| 430 | } |
| 431 | |
| 432 | static int __init |
| 433 | mvebu_uart_early_console_setup(struct earlycon_device *device, |
| 434 | const char *opt) |
| 435 | { |
| 436 | if (!device->port.membase) |
| 437 | return -ENODEV; |
| 438 | |
| 439 | device->con->write = mvebu_uart_putc_early_write; |
| 440 | |
| 441 | return 0; |
| 442 | } |
| 443 | |
| 444 | EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup); |
| 445 | OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart", |
| 446 | mvebu_uart_early_console_setup); |
| 447 | |
| 448 | static void wait_for_xmitr(struct uart_port *port) |
| 449 | { |
| 450 | u32 val; |
| 451 | |
| 452 | readl_poll_timeout_atomic(port->membase + UART_STAT, val, |
| 453 | (val & STAT_TX_EMP), 1, 10000); |
| 454 | } |
| 455 | |
| 456 | static void mvebu_uart_console_putchar(struct uart_port *port, int ch) |
| 457 | { |
| 458 | wait_for_xmitr(port); |
| 459 | writel(ch, port->membase + UART_TSH); |
| 460 | } |
| 461 | |
| 462 | static void mvebu_uart_console_write(struct console *co, const char *s, |
| 463 | unsigned int count) |
| 464 | { |
| 465 | struct uart_port *port = &mvebu_uart_ports[co->index]; |
| 466 | unsigned long flags; |
| 467 | unsigned int ier; |
| 468 | int locked = 1; |
| 469 | |
| 470 | if (oops_in_progress) |
| 471 | locked = spin_trylock_irqsave(&port->lock, flags); |
| 472 | else |
| 473 | spin_lock_irqsave(&port->lock, flags); |
| 474 | |
| 475 | ier = readl(port->membase + UART_CTRL) & |
| 476 | (CTRL_RX_INT | CTRL_TX_RDY_INT); |
| 477 | writel(0, port->membase + UART_CTRL); |
| 478 | |
| 479 | uart_console_write(port, s, count, mvebu_uart_console_putchar); |
| 480 | |
| 481 | wait_for_xmitr(port); |
| 482 | |
| 483 | if (ier) |
| 484 | writel(ier, port->membase + UART_CTRL); |
| 485 | |
| 486 | if (locked) |
| 487 | spin_unlock_irqrestore(&port->lock, flags); |
| 488 | } |
| 489 | |
| 490 | static int mvebu_uart_console_setup(struct console *co, char *options) |
| 491 | { |
| 492 | struct uart_port *port; |
| 493 | int baud = 9600; |
| 494 | int bits = 8; |
| 495 | int parity = 'n'; |
| 496 | int flow = 'n'; |
| 497 | |
| 498 | if (co->index < 0 || co->index >= MVEBU_NR_UARTS) |
| 499 | return -EINVAL; |
| 500 | |
| 501 | port = &mvebu_uart_ports[co->index]; |
| 502 | |
| 503 | if (!port->mapbase || !port->membase) { |
| 504 | pr_debug("console on ttyMV%i not present\n", co->index); |
| 505 | return -ENODEV; |
| 506 | } |
| 507 | |
| 508 | if (options) |
| 509 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 510 | |
| 511 | return uart_set_options(port, co, baud, parity, bits, flow); |
| 512 | } |
| 513 | |
| 514 | static struct uart_driver mvebu_uart_driver; |
| 515 | |
| 516 | static struct console mvebu_uart_console = { |
| 517 | .name = "ttyMV", |
| 518 | .write = mvebu_uart_console_write, |
| 519 | .device = uart_console_device, |
| 520 | .setup = mvebu_uart_console_setup, |
| 521 | .flags = CON_PRINTBUFFER, |
| 522 | .index = -1, |
| 523 | .data = &mvebu_uart_driver, |
| 524 | }; |
| 525 | |
| 526 | static int __init mvebu_uart_console_init(void) |
| 527 | { |
| 528 | register_console(&mvebu_uart_console); |
| 529 | return 0; |
| 530 | } |
| 531 | |
| 532 | console_initcall(mvebu_uart_console_init); |
| 533 | |
| 534 | |
| 535 | #endif /* CONFIG_SERIAL_MVEBU_CONSOLE */ |
| 536 | |
| 537 | static struct uart_driver mvebu_uart_driver = { |
| 538 | .owner = THIS_MODULE, |
| 539 | .driver_name = "mvebu_serial", |
| 540 | .dev_name = "ttyMV", |
| 541 | .nr = MVEBU_NR_UARTS, |
| 542 | #ifdef CONFIG_SERIAL_MVEBU_CONSOLE |
| 543 | .cons = &mvebu_uart_console, |
| 544 | #endif |
| 545 | }; |
| 546 | |
| 547 | static int mvebu_uart_probe(struct platform_device *pdev) |
| 548 | { |
| 549 | struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 550 | struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 551 | struct uart_port *port; |
| 552 | struct mvebu_uart_data *data; |
| 553 | int ret; |
| 554 | |
| 555 | if (!reg || !irq) { |
| 556 | dev_err(&pdev->dev, "no registers/irq defined\n"); |
| 557 | return -EINVAL; |
| 558 | } |
| 559 | |
| 560 | port = &mvebu_uart_ports[0]; |
| 561 | |
| 562 | spin_lock_init(&port->lock); |
| 563 | |
| 564 | port->dev = &pdev->dev; |
| 565 | port->type = PORT_MVEBU; |
| 566 | port->ops = &mvebu_uart_ops; |
| 567 | port->regshift = 0; |
| 568 | |
| 569 | port->fifosize = 32; |
| 570 | port->iotype = UPIO_MEM32; |
| 571 | port->flags = UPF_FIXED_PORT; |
| 572 | port->line = 0; /* single port: force line number to 0 */ |
| 573 | |
| 574 | port->irq = irq->start; |
| 575 | port->irqflags = 0; |
| 576 | port->mapbase = reg->start; |
| 577 | |
| 578 | port->membase = devm_ioremap_resource(&pdev->dev, reg); |
| 579 | if (IS_ERR(port->membase)) |
| 580 | return -PTR_ERR(port->membase); |
| 581 | |
| 582 | data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data), |
| 583 | GFP_KERNEL); |
| 584 | if (!data) |
| 585 | return -ENOMEM; |
| 586 | |
| 587 | data->port = port; |
| 588 | |
| 589 | port->private_data = data; |
| 590 | platform_set_drvdata(pdev, data); |
| 591 | |
| 592 | ret = uart_add_one_port(&mvebu_uart_driver, port); |
| 593 | if (ret) |
| 594 | return ret; |
| 595 | return 0; |
| 596 | } |
| 597 | |
Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 598 | /* Match table for of_platform binding */ |
| 599 | static const struct of_device_id mvebu_uart_of_match[] = { |
| 600 | { .compatible = "marvell,armada-3700-uart", }, |
| 601 | {} |
| 602 | }; |
Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 603 | |
| 604 | static struct platform_driver mvebu_uart_platform_driver = { |
| 605 | .probe = mvebu_uart_probe, |
Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 606 | .driver = { |
Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 607 | .name = "mvebu-uart", |
| 608 | .of_match_table = of_match_ptr(mvebu_uart_of_match), |
Paul Gortmaker | 89ebc27 | 2016-03-13 19:48:52 -0400 | [diff] [blame] | 609 | .suppress_bind_attrs = true, |
Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 610 | }, |
| 611 | }; |
| 612 | |
| 613 | static int __init mvebu_uart_init(void) |
| 614 | { |
| 615 | int ret; |
| 616 | |
| 617 | ret = uart_register_driver(&mvebu_uart_driver); |
| 618 | if (ret) |
| 619 | return ret; |
| 620 | |
| 621 | ret = platform_driver_register(&mvebu_uart_platform_driver); |
| 622 | if (ret) |
| 623 | uart_unregister_driver(&mvebu_uart_driver); |
| 624 | |
| 625 | return ret; |
| 626 | } |
Wilson Ding | 3053079 | 2016-02-16 19:14:53 +0100 | [diff] [blame] | 627 | arch_initcall(mvebu_uart_init); |