Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SMP initialisation and IPI support |
| 3 | * Based on arch/arm/kernel/smp.c |
| 4 | * |
| 5 | * Copyright (C) 2012 ARM Ltd. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 20 | #include <linux/acpi.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 21 | #include <linux/delay.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/spinlock.h> |
| 24 | #include <linux/sched.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/cache.h> |
| 27 | #include <linux/profile.h> |
| 28 | #include <linux/errno.h> |
| 29 | #include <linux/mm.h> |
| 30 | #include <linux/err.h> |
| 31 | #include <linux/cpu.h> |
| 32 | #include <linux/smp.h> |
| 33 | #include <linux/seq_file.h> |
| 34 | #include <linux/irq.h> |
| 35 | #include <linux/percpu.h> |
| 36 | #include <linux/clockchips.h> |
| 37 | #include <linux/completion.h> |
| 38 | #include <linux/of.h> |
Larry Bassel | eb631bb | 2014-05-12 16:48:51 +0100 | [diff] [blame] | 39 | #include <linux/irq_work.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 40 | |
Andre Przywara | e039ee4 | 2014-11-14 15:54:08 +0000 | [diff] [blame] | 41 | #include <asm/alternative.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 42 | #include <asm/atomic.h> |
| 43 | #include <asm/cacheflush.h> |
Mark Rutland | df85741 | 2014-07-16 16:32:44 +0100 | [diff] [blame] | 44 | #include <asm/cpu.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 45 | #include <asm/cputype.h> |
Mark Rutland | cd1aebf | 2013-10-24 20:30:15 +0100 | [diff] [blame] | 46 | #include <asm/cpu_ops.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 47 | #include <asm/mmu_context.h> |
Ganapatrao Kulkarni | 1a2db30 | 2016-04-08 15:50:27 -0700 | [diff] [blame] | 48 | #include <asm/numa.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 49 | #include <asm/pgtable.h> |
| 50 | #include <asm/pgalloc.h> |
| 51 | #include <asm/processor.h> |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 52 | #include <asm/smp_plat.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 53 | #include <asm/sections.h> |
| 54 | #include <asm/tlbflush.h> |
| 55 | #include <asm/ptrace.h> |
Jonas Rabenstein | 377bcff | 2015-07-29 12:07:57 +0100 | [diff] [blame] | 56 | #include <asm/virt.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 57 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 58 | #define CREATE_TRACE_POINTS |
| 59 | #include <trace/events/ipi.h> |
| 60 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 61 | /* |
| 62 | * as from 2.5, kernels no longer have an init_tasks structure |
| 63 | * so we need some other way of telling a new secondary core |
| 64 | * where to place its SVC stack |
| 65 | */ |
| 66 | struct secondary_data secondary_data; |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 67 | /* Number of CPUs which aren't online, but looping in kernel text. */ |
| 68 | int cpus_stuck_in_kernel; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 69 | |
| 70 | enum ipi_msg_type { |
| 71 | IPI_RESCHEDULE, |
| 72 | IPI_CALL_FUNC, |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 73 | IPI_CPU_STOP, |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 74 | IPI_TIMER, |
Larry Bassel | eb631bb | 2014-05-12 16:48:51 +0100 | [diff] [blame] | 75 | IPI_IRQ_WORK, |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 76 | IPI_WAKEUP |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 77 | }; |
| 78 | |
Suzuki K Poulose | ac1ad20 | 2016-04-13 14:41:33 +0100 | [diff] [blame] | 79 | #ifdef CONFIG_ARM64_VHE |
| 80 | |
| 81 | /* Whether the boot CPU is running in HYP mode or not*/ |
| 82 | static bool boot_cpu_hyp_mode; |
| 83 | |
| 84 | static inline void save_boot_cpu_run_el(void) |
| 85 | { |
| 86 | boot_cpu_hyp_mode = is_kernel_in_hyp_mode(); |
| 87 | } |
| 88 | |
| 89 | static inline bool is_boot_cpu_in_hyp_mode(void) |
| 90 | { |
| 91 | return boot_cpu_hyp_mode; |
| 92 | } |
| 93 | |
| 94 | /* |
| 95 | * Verify that a secondary CPU is running the kernel at the same |
| 96 | * EL as that of the boot CPU. |
| 97 | */ |
| 98 | void verify_cpu_run_el(void) |
| 99 | { |
| 100 | bool in_el2 = is_kernel_in_hyp_mode(); |
| 101 | bool boot_cpu_el2 = is_boot_cpu_in_hyp_mode(); |
| 102 | |
| 103 | if (in_el2 ^ boot_cpu_el2) { |
| 104 | pr_crit("CPU%d: mismatched Exception Level(EL%d) with boot CPU(EL%d)\n", |
| 105 | smp_processor_id(), |
| 106 | in_el2 ? 2 : 1, |
| 107 | boot_cpu_el2 ? 2 : 1); |
| 108 | cpu_panic_kernel(); |
| 109 | } |
| 110 | } |
| 111 | |
| 112 | #else |
| 113 | static inline void save_boot_cpu_run_el(void) {} |
| 114 | #endif |
| 115 | |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 116 | #ifdef CONFIG_HOTPLUG_CPU |
| 117 | static int op_cpu_kill(unsigned int cpu); |
| 118 | #else |
| 119 | static inline int op_cpu_kill(unsigned int cpu) |
| 120 | { |
| 121 | return -ENOSYS; |
| 122 | } |
| 123 | #endif |
| 124 | |
| 125 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 126 | /* |
| 127 | * Boot a secondary CPU, and assign it the specified idle task. |
| 128 | * This also gives us the initial stack to use for this CPU. |
| 129 | */ |
Paul Gortmaker | b8c6453 | 2013-06-18 10:18:31 -0400 | [diff] [blame] | 130 | static int boot_secondary(unsigned int cpu, struct task_struct *idle) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 131 | { |
Mark Rutland | 652af89 | 2013-10-24 20:30:16 +0100 | [diff] [blame] | 132 | if (cpu_ops[cpu]->cpu_boot) |
| 133 | return cpu_ops[cpu]->cpu_boot(cpu); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 134 | |
Mark Rutland | 652af89 | 2013-10-24 20:30:16 +0100 | [diff] [blame] | 135 | return -EOPNOTSUPP; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | static DECLARE_COMPLETION(cpu_running); |
| 139 | |
Paul Gortmaker | b8c6453 | 2013-06-18 10:18:31 -0400 | [diff] [blame] | 140 | int __cpu_up(unsigned int cpu, struct task_struct *idle) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 141 | { |
| 142 | int ret; |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 143 | long status; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 144 | |
| 145 | /* |
| 146 | * We need to tell the secondary core where to find its stack and the |
| 147 | * page tables. |
| 148 | */ |
| 149 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 150 | update_cpu_boot_status(CPU_MMU_OFF); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 151 | __flush_dcache_area(&secondary_data, sizeof(secondary_data)); |
| 152 | |
| 153 | /* |
| 154 | * Now bring the CPU into our world. |
| 155 | */ |
| 156 | ret = boot_secondary(cpu, idle); |
| 157 | if (ret == 0) { |
| 158 | /* |
| 159 | * CPU was successfully started, wait for it to come online or |
| 160 | * time out. |
| 161 | */ |
| 162 | wait_for_completion_timeout(&cpu_running, |
| 163 | msecs_to_jiffies(1000)); |
| 164 | |
| 165 | if (!cpu_online(cpu)) { |
| 166 | pr_crit("CPU%u: failed to come online\n", cpu); |
| 167 | ret = -EIO; |
| 168 | } |
| 169 | } else { |
| 170 | pr_err("CPU%u: failed to boot: %d\n", cpu, ret); |
| 171 | } |
| 172 | |
| 173 | secondary_data.stack = NULL; |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 174 | status = READ_ONCE(secondary_data.status); |
| 175 | if (ret && status) { |
| 176 | |
| 177 | if (status == CPU_MMU_OFF) |
| 178 | status = READ_ONCE(__early_cpu_boot_status); |
| 179 | |
| 180 | switch (status) { |
| 181 | default: |
| 182 | pr_err("CPU%u: failed in unknown state : 0x%lx\n", |
| 183 | cpu, status); |
| 184 | break; |
| 185 | case CPU_KILL_ME: |
| 186 | if (!op_cpu_kill(cpu)) { |
| 187 | pr_crit("CPU%u: died during early boot\n", cpu); |
| 188 | break; |
| 189 | } |
| 190 | /* Fall through */ |
| 191 | pr_crit("CPU%u: may not have shut down cleanly\n", cpu); |
| 192 | case CPU_STUCK_IN_KERNEL: |
| 193 | pr_crit("CPU%u: is stuck in kernel\n", cpu); |
| 194 | cpus_stuck_in_kernel++; |
| 195 | break; |
| 196 | case CPU_PANIC_KERNEL: |
| 197 | panic("CPU%u detected unsupported configuration\n", cpu); |
| 198 | } |
| 199 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 200 | |
| 201 | return ret; |
| 202 | } |
| 203 | |
| 204 | /* |
| 205 | * This is the secondary CPU boot entry. We're using this CPUs |
| 206 | * idle thread stack, but a set of temporary page tables. |
| 207 | */ |
Paul Gortmaker | b8c6453 | 2013-06-18 10:18:31 -0400 | [diff] [blame] | 208 | asmlinkage void secondary_start_kernel(void) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 209 | { |
| 210 | struct mm_struct *mm = &init_mm; |
| 211 | unsigned int cpu = smp_processor_id(); |
| 212 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 213 | /* |
| 214 | * All kernel threads share the same mm context; grab a |
| 215 | * reference and switch to it. |
| 216 | */ |
| 217 | atomic_inc(&mm->mm_count); |
| 218 | current->active_mm = mm; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 219 | |
Will Deacon | 7158627 | 2013-11-05 18:10:47 +0000 | [diff] [blame] | 220 | set_my_cpu_offset(per_cpu_offset(smp_processor_id())); |
Will Deacon | 7158627 | 2013-11-05 18:10:47 +0000 | [diff] [blame] | 221 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 222 | /* |
| 223 | * TTBR0 is only used for the identity mapping at this stage. Make it |
| 224 | * point to zero page to avoid speculatively fetching new entries. |
| 225 | */ |
Mark Rutland | 9e8e865 | 2016-01-25 11:44:58 +0000 | [diff] [blame] | 226 | cpu_uninstall_idmap(); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 227 | |
| 228 | preempt_disable(); |
| 229 | trace_hardirqs_off(); |
| 230 | |
Suzuki K. Poulose | dbb4e15 | 2015-10-19 14:24:50 +0100 | [diff] [blame] | 231 | /* |
| 232 | * If the system has established the capabilities, make sure |
| 233 | * this CPU ticks all of those. If it doesn't, the CPU will |
| 234 | * fail to come online. |
| 235 | */ |
Suzuki K Poulose | c47a190 | 2016-09-09 14:07:10 +0100 | [diff] [blame] | 236 | check_local_cpu_capabilities(); |
Suzuki K. Poulose | dbb4e15 | 2015-10-19 14:24:50 +0100 | [diff] [blame] | 237 | |
Mark Rutland | 652af89 | 2013-10-24 20:30:16 +0100 | [diff] [blame] | 238 | if (cpu_ops[cpu]->cpu_postboot) |
| 239 | cpu_ops[cpu]->cpu_postboot(); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 240 | |
| 241 | /* |
Mark Rutland | df85741 | 2014-07-16 16:32:44 +0100 | [diff] [blame] | 242 | * Log the CPU info before it is marked online and might get read. |
| 243 | */ |
| 244 | cpuinfo_store_cpu(); |
| 245 | |
| 246 | /* |
Marc Zyngier | 7ade67b | 2013-11-04 16:55:22 +0000 | [diff] [blame] | 247 | * Enable GIC and timers. |
| 248 | */ |
| 249 | notify_cpu_starting(cpu); |
| 250 | |
David Daney | c18df0a | 2016-09-20 11:46:35 -0700 | [diff] [blame] | 251 | store_cpu_topology(cpu); |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 252 | |
Marc Zyngier | 7ade67b | 2013-11-04 16:55:22 +0000 | [diff] [blame] | 253 | /* |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 254 | * OK, now it's safe to let the boot CPU continue. Wait for |
| 255 | * the CPU migration code to notice that the CPU is online |
| 256 | * before we continue. |
| 257 | */ |
Suzuki K. Poulose | 64f1781 | 2015-10-19 14:24:38 +0100 | [diff] [blame] | 258 | pr_info("CPU%u: Booted secondary processor [%08x]\n", |
| 259 | cpu, read_cpuid_id()); |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 260 | update_cpu_boot_status(CPU_BOOT_SUCCESS); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 261 | set_cpu_online(cpu, true); |
Will Deacon | b3770b3 | 2012-11-07 17:00:05 +0000 | [diff] [blame] | 262 | complete(&cpu_running); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 263 | |
Catalin Marinas | 53ae3ac | 2013-07-19 15:08:15 +0100 | [diff] [blame] | 264 | local_irq_enable(); |
Catalin Marinas | b3bf6aa | 2013-11-21 14:46:17 +0000 | [diff] [blame] | 265 | local_async_enable(); |
Catalin Marinas | 53ae3ac | 2013-07-19 15:08:15 +0100 | [diff] [blame] | 266 | |
| 267 | /* |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 268 | * OK, it's off to the idle thread for us |
| 269 | */ |
Thomas Gleixner | fc6d73d | 2016-02-26 18:43:40 +0000 | [diff] [blame] | 270 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 271 | } |
| 272 | |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 273 | #ifdef CONFIG_HOTPLUG_CPU |
| 274 | static int op_cpu_disable(unsigned int cpu) |
| 275 | { |
| 276 | /* |
| 277 | * If we don't have a cpu_die method, abort before we reach the point |
| 278 | * of no return. CPU0 may not have an cpu_ops, so test for it. |
| 279 | */ |
| 280 | if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die) |
| 281 | return -EOPNOTSUPP; |
| 282 | |
| 283 | /* |
| 284 | * We may need to abort a hot unplug for some other mechanism-specific |
| 285 | * reason. |
| 286 | */ |
| 287 | if (cpu_ops[cpu]->cpu_disable) |
| 288 | return cpu_ops[cpu]->cpu_disable(cpu); |
| 289 | |
| 290 | return 0; |
| 291 | } |
| 292 | |
| 293 | /* |
| 294 | * __cpu_disable runs on the processor to be shutdown. |
| 295 | */ |
| 296 | int __cpu_disable(void) |
| 297 | { |
| 298 | unsigned int cpu = smp_processor_id(); |
| 299 | int ret; |
| 300 | |
| 301 | ret = op_cpu_disable(cpu); |
| 302 | if (ret) |
| 303 | return ret; |
| 304 | |
| 305 | /* |
| 306 | * Take this CPU offline. Once we clear this, we can't return, |
| 307 | * and we must not schedule until we're ready to give up the cpu. |
| 308 | */ |
| 309 | set_cpu_online(cpu, false); |
| 310 | |
| 311 | /* |
| 312 | * OK - migrate IRQs away from this CPU |
| 313 | */ |
Yang Yingliang | 217d453 | 2015-09-24 17:32:14 +0800 | [diff] [blame] | 314 | irq_migrate_all_off_this_cpu(); |
| 315 | |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 316 | return 0; |
| 317 | } |
| 318 | |
Ashwin Chaugule | c814ca0 | 2014-05-07 10:18:36 -0400 | [diff] [blame] | 319 | static int op_cpu_kill(unsigned int cpu) |
| 320 | { |
| 321 | /* |
| 322 | * If we have no means of synchronising with the dying CPU, then assume |
| 323 | * that it is really dead. We can only wait for an arbitrary length of |
| 324 | * time and hope that it's dead, so let's skip the wait and just hope. |
| 325 | */ |
| 326 | if (!cpu_ops[cpu]->cpu_kill) |
Mark Rutland | 6b99c68c | 2015-04-20 17:55:30 +0100 | [diff] [blame] | 327 | return 0; |
Ashwin Chaugule | c814ca0 | 2014-05-07 10:18:36 -0400 | [diff] [blame] | 328 | |
| 329 | return cpu_ops[cpu]->cpu_kill(cpu); |
| 330 | } |
| 331 | |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 332 | /* |
| 333 | * called on the thread which is asking for a CPU to be shutdown - |
| 334 | * waits until shutdown has completed, or it is timed out. |
| 335 | */ |
| 336 | void __cpu_die(unsigned int cpu) |
| 337 | { |
Mark Rutland | 6b99c68c | 2015-04-20 17:55:30 +0100 | [diff] [blame] | 338 | int err; |
| 339 | |
Paul E. McKenney | 0598127 | 2015-05-12 14:50:05 -0700 | [diff] [blame] | 340 | if (!cpu_wait_death(cpu, 5)) { |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 341 | pr_crit("CPU%u: cpu didn't die\n", cpu); |
| 342 | return; |
| 343 | } |
| 344 | pr_notice("CPU%u: shutdown\n", cpu); |
Ashwin Chaugule | c814ca0 | 2014-05-07 10:18:36 -0400 | [diff] [blame] | 345 | |
| 346 | /* |
| 347 | * Now that the dying CPU is beyond the point of no return w.r.t. |
| 348 | * in-kernel synchronisation, try to get the firwmare to help us to |
| 349 | * verify that it has really left the kernel before we consider |
| 350 | * clobbering anything it might still be using. |
| 351 | */ |
Mark Rutland | 6b99c68c | 2015-04-20 17:55:30 +0100 | [diff] [blame] | 352 | err = op_cpu_kill(cpu); |
| 353 | if (err) |
| 354 | pr_warn("CPU%d may not have shut down cleanly: %d\n", |
| 355 | cpu, err); |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 356 | } |
| 357 | |
| 358 | /* |
| 359 | * Called from the idle thread for the CPU which has been shutdown. |
| 360 | * |
| 361 | * Note that we disable IRQs here, but do not re-enable them |
| 362 | * before returning to the caller. This is also the behaviour |
| 363 | * of the other hotplug-cpu capable cores, so presumably coming |
| 364 | * out of idle fixes this. |
| 365 | */ |
| 366 | void cpu_die(void) |
| 367 | { |
| 368 | unsigned int cpu = smp_processor_id(); |
| 369 | |
| 370 | idle_task_exit(); |
| 371 | |
| 372 | local_irq_disable(); |
| 373 | |
| 374 | /* Tell __cpu_die() that this CPU is now safe to dispose of */ |
Paul E. McKenney | 0598127 | 2015-05-12 14:50:05 -0700 | [diff] [blame] | 375 | (void)cpu_report_death(); |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 376 | |
| 377 | /* |
| 378 | * Actually shutdown the CPU. This must never fail. The specific hotplug |
| 379 | * mechanism must perform all required cache maintenance to ensure that |
| 380 | * no dirty lines are lost in the process of shutting down the CPU. |
| 381 | */ |
| 382 | cpu_ops[cpu]->cpu_die(cpu); |
| 383 | |
| 384 | BUG(); |
| 385 | } |
| 386 | #endif |
| 387 | |
Suzuki K Poulose | fce6361 | 2016-02-23 10:31:41 +0000 | [diff] [blame] | 388 | /* |
| 389 | * Kill the calling secondary CPU, early in bringup before it is turned |
| 390 | * online. |
| 391 | */ |
| 392 | void cpu_die_early(void) |
| 393 | { |
| 394 | int cpu = smp_processor_id(); |
| 395 | |
| 396 | pr_crit("CPU%d: will not boot\n", cpu); |
| 397 | |
| 398 | /* Mark this CPU absent */ |
| 399 | set_cpu_present(cpu, 0); |
| 400 | |
| 401 | #ifdef CONFIG_HOTPLUG_CPU |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 402 | update_cpu_boot_status(CPU_KILL_ME); |
Suzuki K Poulose | fce6361 | 2016-02-23 10:31:41 +0000 | [diff] [blame] | 403 | /* Check if we can park ourselves */ |
| 404 | if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die) |
| 405 | cpu_ops[cpu]->cpu_die(cpu); |
| 406 | #endif |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 407 | update_cpu_boot_status(CPU_STUCK_IN_KERNEL); |
Suzuki K Poulose | fce6361 | 2016-02-23 10:31:41 +0000 | [diff] [blame] | 408 | |
| 409 | cpu_park_loop(); |
| 410 | } |
| 411 | |
Jonas Rabenstein | 377bcff | 2015-07-29 12:07:57 +0100 | [diff] [blame] | 412 | static void __init hyp_mode_check(void) |
| 413 | { |
| 414 | if (is_hyp_mode_available()) |
| 415 | pr_info("CPU: All CPU(s) started at EL2\n"); |
| 416 | else if (is_hyp_mode_mismatched()) |
| 417 | WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC, |
| 418 | "CPU: CPUs started in inconsistent modes"); |
| 419 | else |
| 420 | pr_info("CPU: All CPU(s) started at EL1\n"); |
| 421 | } |
| 422 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 423 | void __init smp_cpus_done(unsigned int max_cpus) |
| 424 | { |
Will Deacon | 326b16d | 2013-08-30 18:06:48 +0100 | [diff] [blame] | 425 | pr_info("SMP: Total of %d processors activated.\n", num_online_cpus()); |
Suzuki K. Poulose | 3a75578 | 2015-10-19 14:24:39 +0100 | [diff] [blame] | 426 | setup_cpu_features(); |
Jonas Rabenstein | 377bcff | 2015-07-29 12:07:57 +0100 | [diff] [blame] | 427 | hyp_mode_check(); |
| 428 | apply_alternatives_all(); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 429 | } |
| 430 | |
| 431 | void __init smp_prepare_boot_cpu(void) |
| 432 | { |
Suzuki K Poulose | 9113c2a | 2016-07-21 11:12:55 +0100 | [diff] [blame] | 433 | set_my_cpu_offset(per_cpu_offset(smp_processor_id())); |
Catalin Marinas | efd9e03 | 2016-09-05 18:25:48 +0100 | [diff] [blame] | 434 | /* |
| 435 | * Initialise the static keys early as they may be enabled by the |
| 436 | * cpufeature code. |
| 437 | */ |
| 438 | jump_label_init(); |
Suzuki K. Poulose | 4b998ff | 2015-10-19 14:24:40 +0100 | [diff] [blame] | 439 | cpuinfo_store_boot_cpu(); |
Suzuki K Poulose | ac1ad20 | 2016-04-13 14:41:33 +0100 | [diff] [blame] | 440 | save_boot_cpu_run_el(); |
Suzuki K Poulose | c47a190 | 2016-09-09 14:07:10 +0100 | [diff] [blame] | 441 | /* |
| 442 | * Run the errata work around checks on the boot CPU, once we have |
| 443 | * initialised the cpu feature infrastructure from |
| 444 | * cpuinfo_store_boot_cpu() above. |
| 445 | */ |
| 446 | update_cpu_errata_workarounds(); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 447 | } |
| 448 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 449 | static u64 __init of_get_cpu_mpidr(struct device_node *dn) |
| 450 | { |
| 451 | const __be32 *cell; |
| 452 | u64 hwid; |
| 453 | |
| 454 | /* |
| 455 | * A cpu node with missing "reg" property is |
| 456 | * considered invalid to build a cpu_logical_map |
| 457 | * entry. |
| 458 | */ |
| 459 | cell = of_get_property(dn, "reg", NULL); |
| 460 | if (!cell) { |
| 461 | pr_err("%s: missing reg property\n", dn->full_name); |
| 462 | return INVALID_HWID; |
| 463 | } |
| 464 | |
| 465 | hwid = of_read_number(cell, of_n_addr_cells(dn)); |
| 466 | /* |
| 467 | * Non affinity bits must be set to 0 in the DT |
| 468 | */ |
| 469 | if (hwid & ~MPIDR_HWID_BITMASK) { |
| 470 | pr_err("%s: invalid reg property\n", dn->full_name); |
| 471 | return INVALID_HWID; |
| 472 | } |
| 473 | return hwid; |
| 474 | } |
| 475 | |
| 476 | /* |
| 477 | * Duplicate MPIDRs are a recipe for disaster. Scan all initialized |
| 478 | * entries and check for duplicates. If any is found just ignore the |
| 479 | * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid |
| 480 | * matching valid MPIDR values. |
| 481 | */ |
| 482 | static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid) |
| 483 | { |
| 484 | unsigned int i; |
| 485 | |
| 486 | for (i = 1; (i < cpu) && (i < NR_CPUS); i++) |
| 487 | if (cpu_logical_map(i) == hwid) |
| 488 | return true; |
| 489 | return false; |
| 490 | } |
| 491 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 492 | /* |
Lorenzo Pieralisi | 819a882 | 2015-05-13 14:12:46 +0100 | [diff] [blame] | 493 | * Initialize cpu operations for a logical cpu and |
| 494 | * set it in the possible mask on success |
| 495 | */ |
| 496 | static int __init smp_cpu_setup(int cpu) |
| 497 | { |
| 498 | if (cpu_read_ops(cpu)) |
| 499 | return -ENODEV; |
| 500 | |
| 501 | if (cpu_ops[cpu]->cpu_init(cpu)) |
| 502 | return -ENODEV; |
| 503 | |
| 504 | set_cpu_possible(cpu, true); |
| 505 | |
| 506 | return 0; |
| 507 | } |
| 508 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 509 | static bool bootcpu_valid __initdata; |
| 510 | static unsigned int cpu_count = 1; |
| 511 | |
| 512 | #ifdef CONFIG_ACPI |
| 513 | /* |
| 514 | * acpi_map_gic_cpu_interface - parse processor MADT entry |
| 515 | * |
| 516 | * Carry out sanity checks on MADT processor entry and initialize |
| 517 | * cpu_logical_map on success |
| 518 | */ |
| 519 | static void __init |
| 520 | acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) |
| 521 | { |
| 522 | u64 hwid = processor->arm_mpidr; |
| 523 | |
Hanjun Guo | f905892 | 2015-07-03 15:29:06 +0800 | [diff] [blame] | 524 | if (!(processor->flags & ACPI_MADT_ENABLED)) { |
| 525 | pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid); |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 526 | return; |
| 527 | } |
| 528 | |
Hanjun Guo | f905892 | 2015-07-03 15:29:06 +0800 | [diff] [blame] | 529 | if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) { |
| 530 | pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid); |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 531 | return; |
| 532 | } |
| 533 | |
| 534 | if (is_mpidr_duplicate(cpu_count, hwid)) { |
| 535 | pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid); |
| 536 | return; |
| 537 | } |
| 538 | |
| 539 | /* Check if GICC structure of boot CPU is available in the MADT */ |
| 540 | if (cpu_logical_map(0) == hwid) { |
| 541 | if (bootcpu_valid) { |
| 542 | pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n", |
| 543 | hwid); |
| 544 | return; |
| 545 | } |
| 546 | bootcpu_valid = true; |
| 547 | return; |
| 548 | } |
| 549 | |
| 550 | if (cpu_count >= NR_CPUS) |
| 551 | return; |
| 552 | |
| 553 | /* map the logical cpu id to cpu MPIDR */ |
| 554 | cpu_logical_map(cpu_count) = hwid; |
| 555 | |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 556 | /* |
| 557 | * Set-up the ACPI parking protocol cpu entries |
| 558 | * while initializing the cpu_logical_map to |
| 559 | * avoid parsing MADT entries multiple times for |
| 560 | * nothing (ie a valid cpu_logical_map entry should |
| 561 | * contain a valid parking protocol data set to |
| 562 | * initialize the cpu if the parking protocol is |
| 563 | * the only available enable method). |
| 564 | */ |
| 565 | acpi_set_mailbox_entry(cpu_count, processor); |
| 566 | |
Hanjun Guo | d8b47fc | 2016-05-24 15:35:44 -0700 | [diff] [blame] | 567 | early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid)); |
| 568 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 569 | cpu_count++; |
| 570 | } |
| 571 | |
| 572 | static int __init |
| 573 | acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header, |
| 574 | const unsigned long end) |
| 575 | { |
| 576 | struct acpi_madt_generic_interrupt *processor; |
| 577 | |
| 578 | processor = (struct acpi_madt_generic_interrupt *)header; |
Al Stone | 99e3e3a | 2015-07-06 17:16:48 -0600 | [diff] [blame] | 579 | if (BAD_MADT_GICC_ENTRY(processor, end)) |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 580 | return -EINVAL; |
| 581 | |
| 582 | acpi_table_print_madt_entry(header); |
| 583 | |
| 584 | acpi_map_gic_cpu_interface(processor); |
| 585 | |
| 586 | return 0; |
| 587 | } |
| 588 | #else |
| 589 | #define acpi_table_parse_madt(...) do { } while (0) |
| 590 | #endif |
| 591 | |
Lorenzo Pieralisi | 819a882 | 2015-05-13 14:12:46 +0100 | [diff] [blame] | 592 | /* |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 593 | * Enumerate the possible CPU set from the device tree and build the |
| 594 | * cpu logical map array containing MPIDR values related to logical |
| 595 | * cpus. Assumes that cpu_logical_map(0) has already been initialized. |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 596 | */ |
Jisheng Zhang | 29b8302 | 2015-11-12 20:04:42 +0800 | [diff] [blame] | 597 | static void __init of_parse_and_init_cpus(void) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 598 | { |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 599 | struct device_node *dn = NULL; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 600 | |
| 601 | while ((dn = of_find_node_by_type(dn, "cpu"))) { |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 602 | u64 hwid = of_get_cpu_mpidr(dn); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 603 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 604 | if (hwid == INVALID_HWID) |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 605 | goto next; |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 606 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 607 | if (is_mpidr_duplicate(cpu_count, hwid)) { |
| 608 | pr_err("%s: duplicate cpu reg properties in the DT\n", |
| 609 | dn->full_name); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 610 | goto next; |
| 611 | } |
| 612 | |
| 613 | /* |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 614 | * The numbering scheme requires that the boot CPU |
| 615 | * must be assigned logical id 0. Record it so that |
| 616 | * the logical map built from DT is validated and can |
| 617 | * be used. |
| 618 | */ |
| 619 | if (hwid == cpu_logical_map(0)) { |
| 620 | if (bootcpu_valid) { |
| 621 | pr_err("%s: duplicate boot cpu reg property in DT\n", |
| 622 | dn->full_name); |
| 623 | goto next; |
| 624 | } |
| 625 | |
| 626 | bootcpu_valid = true; |
Zhen Lei | 7ba5f60 | 2016-09-01 14:55:04 +0800 | [diff] [blame] | 627 | early_map_cpu_to_node(0, of_node_to_nid(dn)); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 628 | |
| 629 | /* |
| 630 | * cpu_logical_map has already been |
| 631 | * initialized and the boot cpu doesn't need |
| 632 | * the enable-method so continue without |
| 633 | * incrementing cpu. |
| 634 | */ |
| 635 | continue; |
| 636 | } |
| 637 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 638 | if (cpu_count >= NR_CPUS) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 639 | goto next; |
| 640 | |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 641 | pr_debug("cpu logical map 0x%llx\n", hwid); |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 642 | cpu_logical_map(cpu_count) = hwid; |
Ganapatrao Kulkarni | 1a2db30 | 2016-04-08 15:50:27 -0700 | [diff] [blame] | 643 | |
| 644 | early_map_cpu_to_node(cpu_count, of_node_to_nid(dn)); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 645 | next: |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 646 | cpu_count++; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 647 | } |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 648 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 649 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 650 | /* |
| 651 | * Enumerate the possible CPU set from the device tree or ACPI and build the |
| 652 | * cpu logical map array containing MPIDR values related to logical |
| 653 | * cpus. Assumes that cpu_logical_map(0) has already been initialized. |
| 654 | */ |
| 655 | void __init smp_init_cpus(void) |
| 656 | { |
| 657 | int i; |
| 658 | |
| 659 | if (acpi_disabled) |
| 660 | of_parse_and_init_cpus(); |
| 661 | else |
| 662 | /* |
| 663 | * do a walk of MADT to determine how many CPUs |
| 664 | * we have including disabled CPUs, and get information |
| 665 | * we need for SMP init |
| 666 | */ |
| 667 | acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, |
| 668 | acpi_parse_gic_cpu_interface, 0); |
| 669 | |
Kefeng Wang | 50ee91b | 2016-08-09 10:30:49 +0800 | [diff] [blame] | 670 | if (cpu_count > nr_cpu_ids) |
| 671 | pr_warn("Number of cores (%d) exceeds configured maximum of %d - clipping\n", |
| 672 | cpu_count, nr_cpu_ids); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 673 | |
| 674 | if (!bootcpu_valid) { |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 675 | pr_err("missing boot CPU MPIDR, not enabling secondaries\n"); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 676 | return; |
| 677 | } |
| 678 | |
| 679 | /* |
Lorenzo Pieralisi | 819a882 | 2015-05-13 14:12:46 +0100 | [diff] [blame] | 680 | * We need to set the cpu_logical_map entries before enabling |
| 681 | * the cpus so that cpu processor description entries (DT cpu nodes |
| 682 | * and ACPI MADT entries) can be retrieved by matching the cpu hwid |
| 683 | * with entries in cpu_logical_map while initializing the cpus. |
| 684 | * If the cpu set-up fails, invalidate the cpu_logical_map entry. |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 685 | */ |
Kefeng Wang | 50ee91b | 2016-08-09 10:30:49 +0800 | [diff] [blame] | 686 | for (i = 1; i < nr_cpu_ids; i++) { |
Lorenzo Pieralisi | 819a882 | 2015-05-13 14:12:46 +0100 | [diff] [blame] | 687 | if (cpu_logical_map(i) != INVALID_HWID) { |
| 688 | if (smp_cpu_setup(i)) |
| 689 | cpu_logical_map(i) = INVALID_HWID; |
| 690 | } |
| 691 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 692 | } |
| 693 | |
| 694 | void __init smp_prepare_cpus(unsigned int max_cpus) |
| 695 | { |
Mark Rutland | cd1aebf | 2013-10-24 20:30:15 +0100 | [diff] [blame] | 696 | int err; |
Suzuki K Poulose | 44dbcc9 | 2016-04-22 12:25:35 +0100 | [diff] [blame] | 697 | unsigned int cpu; |
David Daney | c18df0a | 2016-09-20 11:46:35 -0700 | [diff] [blame] | 698 | unsigned int this_cpu; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 699 | |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 700 | init_cpu_topology(); |
| 701 | |
David Daney | c18df0a | 2016-09-20 11:46:35 -0700 | [diff] [blame] | 702 | this_cpu = smp_processor_id(); |
| 703 | store_cpu_topology(this_cpu); |
| 704 | numa_store_cpu_info(this_cpu); |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 705 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 706 | /* |
Suzuki K Poulose | e75118a | 2016-07-21 11:15:27 +0100 | [diff] [blame] | 707 | * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set |
| 708 | * secondary CPUs present. |
| 709 | */ |
| 710 | if (max_cpus == 0) |
| 711 | return; |
| 712 | |
| 713 | /* |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 714 | * Initialise the present map (which describes the set of CPUs |
| 715 | * actually populated at the present time) and release the |
| 716 | * secondaries from the bootloader. |
| 717 | */ |
| 718 | for_each_possible_cpu(cpu) { |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 719 | |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 720 | if (cpu == smp_processor_id()) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 721 | continue; |
| 722 | |
Mark Rutland | cd1aebf | 2013-10-24 20:30:15 +0100 | [diff] [blame] | 723 | if (!cpu_ops[cpu]) |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 724 | continue; |
| 725 | |
Mark Rutland | cd1aebf | 2013-10-24 20:30:15 +0100 | [diff] [blame] | 726 | err = cpu_ops[cpu]->cpu_prepare(cpu); |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 727 | if (err) |
| 728 | continue; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 729 | |
| 730 | set_cpu_present(cpu, true); |
David Daney | c18df0a | 2016-09-20 11:46:35 -0700 | [diff] [blame] | 731 | numa_store_cpu_info(cpu); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 732 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 733 | } |
| 734 | |
Frederic Weisbecker | 3631073 | 2014-08-16 18:48:05 +0200 | [diff] [blame] | 735 | void (*__smp_cross_call)(const struct cpumask *, unsigned int); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 736 | |
| 737 | void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) |
| 738 | { |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 739 | __smp_cross_call = fn; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 740 | } |
| 741 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 742 | static const char *ipi_types[NR_IPI] __tracepoint_string = { |
| 743 | #define S(x,s) [x] = s |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 744 | S(IPI_RESCHEDULE, "Rescheduling interrupts"), |
| 745 | S(IPI_CALL_FUNC, "Function call interrupts"), |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 746 | S(IPI_CPU_STOP, "CPU stop interrupts"), |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 747 | S(IPI_TIMER, "Timer broadcast interrupts"), |
Larry Bassel | eb631bb | 2014-05-12 16:48:51 +0100 | [diff] [blame] | 748 | S(IPI_IRQ_WORK, "IRQ work interrupts"), |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 749 | S(IPI_WAKEUP, "CPU wake-up interrupts"), |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 750 | }; |
| 751 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 752 | static void smp_cross_call(const struct cpumask *target, unsigned int ipinr) |
| 753 | { |
| 754 | trace_ipi_raise(target, ipi_types[ipinr]); |
| 755 | __smp_cross_call(target, ipinr); |
| 756 | } |
| 757 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 758 | void show_ipi_list(struct seq_file *p, int prec) |
| 759 | { |
| 760 | unsigned int cpu, i; |
| 761 | |
| 762 | for (i = 0; i < NR_IPI; i++) { |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 763 | seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 764 | prec >= 4 ? " " : ""); |
Sudeep KarkadaNagesha | 67317c2 | 2013-11-07 15:25:44 +0000 | [diff] [blame] | 765 | for_each_online_cpu(cpu) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 766 | seq_printf(p, "%10u ", |
| 767 | __get_irq_stat(cpu, ipi_irqs[i])); |
| 768 | seq_printf(p, " %s\n", ipi_types[i]); |
| 769 | } |
| 770 | } |
| 771 | |
| 772 | u64 smp_irq_stat_cpu(unsigned int cpu) |
| 773 | { |
| 774 | u64 sum = 0; |
| 775 | int i; |
| 776 | |
| 777 | for (i = 0; i < NR_IPI; i++) |
| 778 | sum += __get_irq_stat(cpu, ipi_irqs[i]); |
| 779 | |
| 780 | return sum; |
| 781 | } |
| 782 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 783 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
| 784 | { |
| 785 | smp_cross_call(mask, IPI_CALL_FUNC); |
| 786 | } |
| 787 | |
| 788 | void arch_send_call_function_single_ipi(int cpu) |
| 789 | { |
Jiang Liu | 0aaf0da | 2015-01-23 05:36:42 +0000 | [diff] [blame] | 790 | smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC); |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 791 | } |
| 792 | |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 793 | #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL |
| 794 | void arch_send_wakeup_ipi_mask(const struct cpumask *mask) |
| 795 | { |
| 796 | smp_cross_call(mask, IPI_WAKEUP); |
| 797 | } |
| 798 | #endif |
| 799 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 800 | #ifdef CONFIG_IRQ_WORK |
| 801 | void arch_irq_work_raise(void) |
| 802 | { |
| 803 | if (__smp_cross_call) |
| 804 | smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK); |
| 805 | } |
| 806 | #endif |
| 807 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 808 | /* |
| 809 | * ipi_cpu_stop - handle IPI from smp_send_stop() |
| 810 | */ |
| 811 | static void ipi_cpu_stop(unsigned int cpu) |
| 812 | { |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 813 | set_cpu_online(cpu, false); |
| 814 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 815 | local_irq_disable(); |
| 816 | |
| 817 | while (1) |
| 818 | cpu_relax(); |
| 819 | } |
| 820 | |
| 821 | /* |
| 822 | * Main handler for inter-processor interrupts |
| 823 | */ |
| 824 | void handle_IPI(int ipinr, struct pt_regs *regs) |
| 825 | { |
| 826 | unsigned int cpu = smp_processor_id(); |
| 827 | struct pt_regs *old_regs = set_irq_regs(regs); |
| 828 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 829 | if ((unsigned)ipinr < NR_IPI) { |
Stephen Boyd | be081d9 | 2015-06-24 13:14:18 -0700 | [diff] [blame] | 830 | trace_ipi_entry_rcuidle(ipi_types[ipinr]); |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 831 | __inc_irq_stat(cpu, ipi_irqs[ipinr]); |
| 832 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 833 | |
| 834 | switch (ipinr) { |
| 835 | case IPI_RESCHEDULE: |
| 836 | scheduler_ipi(); |
| 837 | break; |
| 838 | |
| 839 | case IPI_CALL_FUNC: |
| 840 | irq_enter(); |
| 841 | generic_smp_call_function_interrupt(); |
| 842 | irq_exit(); |
| 843 | break; |
| 844 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 845 | case IPI_CPU_STOP: |
| 846 | irq_enter(); |
| 847 | ipi_cpu_stop(cpu); |
| 848 | irq_exit(); |
| 849 | break; |
| 850 | |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 851 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
| 852 | case IPI_TIMER: |
| 853 | irq_enter(); |
| 854 | tick_receive_broadcast(); |
| 855 | irq_exit(); |
| 856 | break; |
| 857 | #endif |
| 858 | |
Larry Bassel | eb631bb | 2014-05-12 16:48:51 +0100 | [diff] [blame] | 859 | #ifdef CONFIG_IRQ_WORK |
| 860 | case IPI_IRQ_WORK: |
| 861 | irq_enter(); |
| 862 | irq_work_run(); |
| 863 | irq_exit(); |
| 864 | break; |
| 865 | #endif |
| 866 | |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 867 | #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL |
| 868 | case IPI_WAKEUP: |
| 869 | WARN_ONCE(!acpi_parking_protocol_valid(cpu), |
| 870 | "CPU%u: Wake-up IPI outside the ACPI parking protocol\n", |
| 871 | cpu); |
| 872 | break; |
| 873 | #endif |
| 874 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 875 | default: |
| 876 | pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr); |
| 877 | break; |
| 878 | } |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 879 | |
| 880 | if ((unsigned)ipinr < NR_IPI) |
Stephen Boyd | be081d9 | 2015-06-24 13:14:18 -0700 | [diff] [blame] | 881 | trace_ipi_exit_rcuidle(ipi_types[ipinr]); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 882 | set_irq_regs(old_regs); |
| 883 | } |
| 884 | |
| 885 | void smp_send_reschedule(int cpu) |
| 886 | { |
| 887 | smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); |
| 888 | } |
| 889 | |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 890 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
| 891 | void tick_broadcast(const struct cpumask *mask) |
| 892 | { |
| 893 | smp_cross_call(mask, IPI_TIMER); |
| 894 | } |
| 895 | #endif |
| 896 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 897 | void smp_send_stop(void) |
| 898 | { |
| 899 | unsigned long timeout; |
| 900 | |
| 901 | if (num_online_cpus() > 1) { |
| 902 | cpumask_t mask; |
| 903 | |
| 904 | cpumask_copy(&mask, cpu_online_mask); |
Rusty Russell | 434ed7f | 2015-03-05 10:49:18 +1030 | [diff] [blame] | 905 | cpumask_clear_cpu(smp_processor_id(), &mask); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 906 | |
Jan Glauber | 82611c1 | 2016-04-18 09:43:33 +0200 | [diff] [blame] | 907 | if (system_state == SYSTEM_BOOTING || |
| 908 | system_state == SYSTEM_RUNNING) |
| 909 | pr_crit("SMP: stopping secondary CPUs\n"); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 910 | smp_cross_call(&mask, IPI_CPU_STOP); |
| 911 | } |
| 912 | |
| 913 | /* Wait up to one second for other CPUs to stop */ |
| 914 | timeout = USEC_PER_SEC; |
| 915 | while (num_online_cpus() > 1 && timeout--) |
| 916 | udelay(1); |
| 917 | |
| 918 | if (num_online_cpus() > 1) |
Jan Glauber | 82611c1 | 2016-04-18 09:43:33 +0200 | [diff] [blame] | 919 | pr_warning("SMP: failed to stop secondary CPUs %*pbl\n", |
| 920 | cpumask_pr_args(cpu_online_mask)); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 921 | } |
| 922 | |
| 923 | /* |
| 924 | * not supported here |
| 925 | */ |
| 926 | int setup_profiling_timer(unsigned int multiplier) |
| 927 | { |
| 928 | return -EINVAL; |
| 929 | } |
James Morse | 5c492c3 | 2016-06-22 10:06:12 +0100 | [diff] [blame] | 930 | |
| 931 | static bool have_cpu_die(void) |
| 932 | { |
| 933 | #ifdef CONFIG_HOTPLUG_CPU |
| 934 | int any_cpu = raw_smp_processor_id(); |
| 935 | |
| 936 | if (cpu_ops[any_cpu]->cpu_die) |
| 937 | return true; |
| 938 | #endif |
| 939 | return false; |
| 940 | } |
| 941 | |
| 942 | bool cpus_are_stuck_in_kernel(void) |
| 943 | { |
| 944 | bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die()); |
| 945 | |
| 946 | return !!cpus_stuck_in_kernel || smp_spin_tables; |
| 947 | } |