Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Avionic Design GmbH |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | */ |
| 9 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 10 | #include <linux/host1x.h> |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 11 | #include <linux/iommu.h> |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 12 | |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 13 | #include <drm/drm_atomic.h> |
Thierry Reding | 0786696 | 2014-11-24 17:08:06 +0100 | [diff] [blame] | 14 | #include <drm/drm_atomic_helper.h> |
| 15 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 16 | #include "drm.h" |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 17 | #include "gem.h" |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 18 | |
| 19 | #define DRIVER_NAME "tegra" |
| 20 | #define DRIVER_DESC "NVIDIA Tegra graphics" |
| 21 | #define DRIVER_DATE "20120330" |
| 22 | #define DRIVER_MAJOR 0 |
| 23 | #define DRIVER_MINOR 0 |
| 24 | #define DRIVER_PATCHLEVEL 0 |
| 25 | |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 26 | struct tegra_drm_file { |
| 27 | struct list_head contexts; |
| 28 | }; |
| 29 | |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 30 | static void tegra_atomic_schedule(struct tegra_drm *tegra, |
| 31 | struct drm_atomic_state *state) |
| 32 | { |
| 33 | tegra->commit.state = state; |
| 34 | schedule_work(&tegra->commit.work); |
| 35 | } |
| 36 | |
| 37 | static void tegra_atomic_complete(struct tegra_drm *tegra, |
| 38 | struct drm_atomic_state *state) |
| 39 | { |
| 40 | struct drm_device *drm = tegra->drm; |
| 41 | |
| 42 | /* |
| 43 | * Everything below can be run asynchronously without the need to grab |
| 44 | * any modeset locks at all under one condition: It must be guaranteed |
| 45 | * that the asynchronous work has either been cancelled (if the driver |
| 46 | * supports it, which at least requires that the framebuffers get |
| 47 | * cleaned up with drm_atomic_helper_cleanup_planes()) or completed |
| 48 | * before the new state gets committed on the software side with |
| 49 | * drm_atomic_helper_swap_state(). |
| 50 | * |
| 51 | * This scheme allows new atomic state updates to be prepared and |
| 52 | * checked in parallel to the asynchronous completion of the previous |
| 53 | * update. Which is important since compositors need to figure out the |
| 54 | * composition of the next frame right after having submitted the |
| 55 | * current layout. |
| 56 | */ |
| 57 | |
Daniel Vetter | 1af434a | 2015-02-22 12:24:19 +0100 | [diff] [blame] | 58 | drm_atomic_helper_commit_modeset_disables(drm, state); |
Daniel Vetter | 1af434a | 2015-02-22 12:24:19 +0100 | [diff] [blame] | 59 | drm_atomic_helper_commit_modeset_enables(drm, state); |
Liu Ying | 2b58e98 | 2016-08-29 17:12:03 +0800 | [diff] [blame] | 60 | drm_atomic_helper_commit_planes(drm, state, |
| 61 | DRM_PLANE_COMMIT_ACTIVE_ONLY); |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 62 | |
| 63 | drm_atomic_helper_wait_for_vblanks(drm, state); |
| 64 | |
| 65 | drm_atomic_helper_cleanup_planes(drm, state); |
| 66 | drm_atomic_state_free(state); |
| 67 | } |
| 68 | |
| 69 | static void tegra_atomic_work(struct work_struct *work) |
| 70 | { |
| 71 | struct tegra_drm *tegra = container_of(work, struct tegra_drm, |
| 72 | commit.work); |
| 73 | |
| 74 | tegra_atomic_complete(tegra, tegra->commit.state); |
| 75 | } |
| 76 | |
| 77 | static int tegra_atomic_commit(struct drm_device *drm, |
Maarten Lankhorst | 2dacdd7 | 2016-04-26 16:11:42 +0200 | [diff] [blame] | 78 | struct drm_atomic_state *state, bool nonblock) |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 79 | { |
| 80 | struct tegra_drm *tegra = drm->dev_private; |
| 81 | int err; |
| 82 | |
| 83 | err = drm_atomic_helper_prepare_planes(drm, state); |
| 84 | if (err) |
| 85 | return err; |
| 86 | |
Maarten Lankhorst | 2dacdd7 | 2016-04-26 16:11:42 +0200 | [diff] [blame] | 87 | /* serialize outstanding nonblocking commits */ |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 88 | mutex_lock(&tegra->commit.lock); |
| 89 | flush_work(&tegra->commit.work); |
| 90 | |
| 91 | /* |
| 92 | * This is the point of no return - everything below never fails except |
| 93 | * when the hw goes bonghits. Which means we can commit the new state on |
| 94 | * the software side now. |
| 95 | */ |
| 96 | |
Daniel Vetter | 5e84c26 | 2016-06-10 00:06:32 +0200 | [diff] [blame] | 97 | drm_atomic_helper_swap_state(state, true); |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 98 | |
Maarten Lankhorst | 2dacdd7 | 2016-04-26 16:11:42 +0200 | [diff] [blame] | 99 | if (nonblock) |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 100 | tegra_atomic_schedule(tegra, state); |
| 101 | else |
| 102 | tegra_atomic_complete(tegra, state); |
| 103 | |
| 104 | mutex_unlock(&tegra->commit.lock); |
| 105 | return 0; |
| 106 | } |
| 107 | |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 108 | static const struct drm_mode_config_funcs tegra_drm_mode_funcs = { |
| 109 | .fb_create = tegra_fb_create, |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 110 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 111 | .output_poll_changed = tegra_fb_output_poll_changed, |
| 112 | #endif |
Thierry Reding | 0786696 | 2014-11-24 17:08:06 +0100 | [diff] [blame] | 113 | .atomic_check = drm_atomic_helper_check, |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 114 | .atomic_commit = tegra_atomic_commit, |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 115 | }; |
| 116 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 117 | static int tegra_drm_load(struct drm_device *drm, unsigned long flags) |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 118 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 119 | struct host1x_device *device = to_host1x_device(drm->dev); |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 120 | struct tegra_drm *tegra; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 121 | int err; |
| 122 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 123 | tegra = kzalloc(sizeof(*tegra), GFP_KERNEL); |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 124 | if (!tegra) |
Terje Bergstrom | 692e6d7 | 2013-03-22 16:34:07 +0200 | [diff] [blame] | 125 | return -ENOMEM; |
| 126 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 127 | if (iommu_present(&platform_bus_type)) { |
Thierry Reding | 4553f73 | 2015-01-19 16:15:04 +0100 | [diff] [blame] | 128 | struct iommu_domain_geometry *geometry; |
| 129 | u64 start, end; |
| 130 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 131 | tegra->domain = iommu_domain_alloc(&platform_bus_type); |
Dan Carpenter | bf19b88 | 2014-12-04 14:00:35 +0300 | [diff] [blame] | 132 | if (!tegra->domain) { |
| 133 | err = -ENOMEM; |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 134 | goto free; |
| 135 | } |
| 136 | |
Thierry Reding | 4553f73 | 2015-01-19 16:15:04 +0100 | [diff] [blame] | 137 | geometry = &tegra->domain->geometry; |
| 138 | start = geometry->aperture_start; |
| 139 | end = geometry->aperture_end; |
| 140 | |
Thierry Reding | d2d8c35 | 2015-11-23 16:46:30 +0100 | [diff] [blame] | 141 | DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n", |
| 142 | start, end); |
Thierry Reding | 4553f73 | 2015-01-19 16:15:04 +0100 | [diff] [blame] | 143 | drm_mm_init(&tegra->mm, start, end - start + 1); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 144 | } |
| 145 | |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 146 | mutex_init(&tegra->clients_lock); |
| 147 | INIT_LIST_HEAD(&tegra->clients); |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 148 | |
| 149 | mutex_init(&tegra->commit.lock); |
| 150 | INIT_WORK(&tegra->commit.work, tegra_atomic_work); |
| 151 | |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 152 | drm->dev_private = tegra; |
| 153 | tegra->drm = drm; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 154 | |
| 155 | drm_mode_config_init(drm); |
| 156 | |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 157 | drm->mode_config.min_width = 0; |
| 158 | drm->mode_config.min_height = 0; |
| 159 | |
| 160 | drm->mode_config.max_width = 4096; |
| 161 | drm->mode_config.max_height = 4096; |
| 162 | |
| 163 | drm->mode_config.funcs = &tegra_drm_mode_funcs; |
| 164 | |
Thierry Reding | e221532 | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 165 | err = tegra_drm_fb_prepare(drm); |
| 166 | if (err < 0) |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 167 | goto config; |
Thierry Reding | e221532 | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 168 | |
| 169 | drm_kms_helper_poll_init(drm); |
| 170 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 171 | err = host1x_device_init(device); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 172 | if (err < 0) |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 173 | goto fbdev; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 174 | |
Thierry Reding | 603f0cc | 2013-04-22 21:22:14 +0200 | [diff] [blame] | 175 | /* |
| 176 | * We don't use the drm_irq_install() helpers provided by the DRM |
| 177 | * core, so we need to set this manually in order to allow the |
| 178 | * DRM_IOCTL_WAIT_VBLANK to operate correctly. |
| 179 | */ |
Ville Syrjälä | 4423843 | 2013-10-04 14:53:37 +0300 | [diff] [blame] | 180 | drm->irq_enabled = true; |
Thierry Reding | 603f0cc | 2013-04-22 21:22:14 +0200 | [diff] [blame] | 181 | |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 182 | /* syncpoints are used for full 32-bit hardware VBLANK counters */ |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 183 | drm->max_vblank_count = 0xffffffff; |
| 184 | |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 185 | err = drm_vblank_init(drm, drm->mode_config.num_crtc); |
| 186 | if (err < 0) |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 187 | goto device; |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 188 | |
Thierry Reding | 31930d4 | 2015-07-02 17:04:06 +0200 | [diff] [blame] | 189 | drm_mode_config_reset(drm); |
| 190 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 191 | err = tegra_drm_fb_init(drm); |
| 192 | if (err < 0) |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 193 | goto vblank; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 194 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 195 | return 0; |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 196 | |
| 197 | vblank: |
| 198 | drm_vblank_cleanup(drm); |
| 199 | device: |
| 200 | host1x_device_exit(device); |
| 201 | fbdev: |
| 202 | drm_kms_helper_poll_fini(drm); |
| 203 | tegra_drm_fb_free(drm); |
| 204 | config: |
| 205 | drm_mode_config_cleanup(drm); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 206 | |
| 207 | if (tegra->domain) { |
| 208 | iommu_domain_free(tegra->domain); |
| 209 | drm_mm_takedown(&tegra->mm); |
| 210 | } |
| 211 | free: |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 212 | kfree(tegra); |
| 213 | return err; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 214 | } |
| 215 | |
| 216 | static int tegra_drm_unload(struct drm_device *drm) |
| 217 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 218 | struct host1x_device *device = to_host1x_device(drm->dev); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 219 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 220 | int err; |
| 221 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 222 | drm_kms_helper_poll_fini(drm); |
| 223 | tegra_drm_fb_exit(drm); |
Thierry Reding | f002abc | 2013-10-14 14:06:02 +0200 | [diff] [blame] | 224 | drm_mode_config_cleanup(drm); |
Thierry Reding | 4aa3df7 | 2014-11-24 16:27:13 +0100 | [diff] [blame] | 225 | drm_vblank_cleanup(drm); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 226 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 227 | err = host1x_device_exit(device); |
| 228 | if (err < 0) |
| 229 | return err; |
| 230 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 231 | if (tegra->domain) { |
| 232 | iommu_domain_free(tegra->domain); |
| 233 | drm_mm_takedown(&tegra->mm); |
| 234 | } |
| 235 | |
Thierry Reding | 1053f4dd | 2014-11-04 16:17:55 +0100 | [diff] [blame] | 236 | kfree(tegra); |
| 237 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 238 | return 0; |
| 239 | } |
| 240 | |
| 241 | static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp) |
| 242 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 243 | struct tegra_drm_file *fpriv; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 244 | |
| 245 | fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL); |
| 246 | if (!fpriv) |
| 247 | return -ENOMEM; |
| 248 | |
| 249 | INIT_LIST_HEAD(&fpriv->contexts); |
| 250 | filp->driver_priv = fpriv; |
| 251 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 252 | return 0; |
| 253 | } |
| 254 | |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 255 | static void tegra_drm_context_free(struct tegra_drm_context *context) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 256 | { |
| 257 | context->client->ops->close_channel(context); |
| 258 | kfree(context); |
| 259 | } |
| 260 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 261 | static void tegra_drm_lastclose(struct drm_device *drm) |
| 262 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 263 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 264 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 265 | |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 266 | tegra_fbdev_restore_mode(tegra->fbdev); |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 267 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 268 | } |
| 269 | |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 270 | static struct host1x_bo * |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 271 | host1x_bo_lookup(struct drm_file *file, u32 handle) |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 272 | { |
| 273 | struct drm_gem_object *gem; |
| 274 | struct tegra_bo *bo; |
| 275 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 276 | gem = drm_gem_object_lookup(file, handle); |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 277 | if (!gem) |
| 278 | return NULL; |
| 279 | |
Daniel Vetter | a07cdfe | 2015-11-23 10:32:48 +0100 | [diff] [blame] | 280 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 281 | |
| 282 | bo = to_tegra_bo(gem); |
| 283 | return &bo->base; |
| 284 | } |
| 285 | |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 286 | static int host1x_reloc_copy_from_user(struct host1x_reloc *dest, |
| 287 | struct drm_tegra_reloc __user *src, |
| 288 | struct drm_device *drm, |
| 289 | struct drm_file *file) |
| 290 | { |
| 291 | u32 cmdbuf, target; |
| 292 | int err; |
| 293 | |
| 294 | err = get_user(cmdbuf, &src->cmdbuf.handle); |
| 295 | if (err < 0) |
| 296 | return err; |
| 297 | |
| 298 | err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset); |
| 299 | if (err < 0) |
| 300 | return err; |
| 301 | |
| 302 | err = get_user(target, &src->target.handle); |
| 303 | if (err < 0) |
| 304 | return err; |
| 305 | |
David Ung | 31f40f8 | 2015-01-20 18:37:35 -0800 | [diff] [blame] | 306 | err = get_user(dest->target.offset, &src->target.offset); |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 307 | if (err < 0) |
| 308 | return err; |
| 309 | |
| 310 | err = get_user(dest->shift, &src->shift); |
| 311 | if (err < 0) |
| 312 | return err; |
| 313 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 314 | dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf); |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 315 | if (!dest->cmdbuf.bo) |
| 316 | return -ENOENT; |
| 317 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 318 | dest->target.bo = host1x_bo_lookup(file, target); |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 319 | if (!dest->target.bo) |
| 320 | return -ENOENT; |
| 321 | |
| 322 | return 0; |
| 323 | } |
| 324 | |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 325 | int tegra_drm_submit(struct tegra_drm_context *context, |
| 326 | struct drm_tegra_submit *args, struct drm_device *drm, |
| 327 | struct drm_file *file) |
| 328 | { |
| 329 | unsigned int num_cmdbufs = args->num_cmdbufs; |
| 330 | unsigned int num_relocs = args->num_relocs; |
| 331 | unsigned int num_waitchks = args->num_waitchks; |
| 332 | struct drm_tegra_cmdbuf __user *cmdbufs = |
Thierry Reding | a7ed68f | 2013-11-08 13:15:43 +0100 | [diff] [blame] | 333 | (void __user *)(uintptr_t)args->cmdbufs; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 334 | struct drm_tegra_reloc __user *relocs = |
Thierry Reding | a7ed68f | 2013-11-08 13:15:43 +0100 | [diff] [blame] | 335 | (void __user *)(uintptr_t)args->relocs; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 336 | struct drm_tegra_waitchk __user *waitchks = |
Thierry Reding | a7ed68f | 2013-11-08 13:15:43 +0100 | [diff] [blame] | 337 | (void __user *)(uintptr_t)args->waitchks; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 338 | struct drm_tegra_syncpt syncpt; |
| 339 | struct host1x_job *job; |
| 340 | int err; |
| 341 | |
| 342 | /* We don't yet support other than one syncpt_incr struct per submit */ |
| 343 | if (args->num_syncpts != 1) |
| 344 | return -EINVAL; |
| 345 | |
| 346 | job = host1x_job_alloc(context->channel, args->num_cmdbufs, |
| 347 | args->num_relocs, args->num_waitchks); |
| 348 | if (!job) |
| 349 | return -ENOMEM; |
| 350 | |
| 351 | job->num_relocs = args->num_relocs; |
| 352 | job->num_waitchk = args->num_waitchks; |
| 353 | job->client = (u32)args->context; |
| 354 | job->class = context->client->base.class; |
| 355 | job->serialize = true; |
| 356 | |
| 357 | while (num_cmdbufs) { |
| 358 | struct drm_tegra_cmdbuf cmdbuf; |
| 359 | struct host1x_bo *bo; |
| 360 | |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 361 | if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) { |
| 362 | err = -EFAULT; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 363 | goto fail; |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 364 | } |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 365 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 366 | bo = host1x_bo_lookup(file, cmdbuf.handle); |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 367 | if (!bo) { |
| 368 | err = -ENOENT; |
| 369 | goto fail; |
| 370 | } |
| 371 | |
| 372 | host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset); |
| 373 | num_cmdbufs--; |
| 374 | cmdbufs++; |
| 375 | } |
| 376 | |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 377 | /* copy and resolve relocations from submit */ |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 378 | while (num_relocs--) { |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 379 | err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs], |
| 380 | &relocs[num_relocs], drm, |
| 381 | file); |
| 382 | if (err < 0) |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 383 | goto fail; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 384 | } |
| 385 | |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 386 | if (copy_from_user(job->waitchk, waitchks, |
| 387 | sizeof(*waitchks) * num_waitchks)) { |
| 388 | err = -EFAULT; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 389 | goto fail; |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 390 | } |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 391 | |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 392 | if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts, |
| 393 | sizeof(syncpt))) { |
| 394 | err = -EFAULT; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 395 | goto fail; |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 396 | } |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 397 | |
| 398 | job->is_addr_reg = context->client->ops->is_addr_reg; |
| 399 | job->syncpt_incrs = syncpt.incrs; |
| 400 | job->syncpt_id = syncpt.id; |
| 401 | job->timeout = 10000; |
| 402 | |
| 403 | if (args->timeout && args->timeout < 10000) |
| 404 | job->timeout = args->timeout; |
| 405 | |
| 406 | err = host1x_job_pin(job, context->client->base.dev); |
| 407 | if (err) |
| 408 | goto fail; |
| 409 | |
| 410 | err = host1x_job_submit(job); |
| 411 | if (err) |
| 412 | goto fail_submit; |
| 413 | |
| 414 | args->fence = job->syncpt_end; |
| 415 | |
| 416 | host1x_job_put(job); |
| 417 | return 0; |
| 418 | |
| 419 | fail_submit: |
| 420 | host1x_job_unpin(job); |
| 421 | fail: |
| 422 | host1x_job_put(job); |
| 423 | return err; |
| 424 | } |
| 425 | |
| 426 | |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 427 | #ifdef CONFIG_DRM_TEGRA_STAGING |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 428 | static struct tegra_drm_context *tegra_drm_get_context(__u64 context) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 429 | { |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 430 | return (struct tegra_drm_context *)(uintptr_t)context; |
| 431 | } |
| 432 | |
| 433 | static bool tegra_drm_file_owns_context(struct tegra_drm_file *file, |
| 434 | struct tegra_drm_context *context) |
| 435 | { |
| 436 | struct tegra_drm_context *ctx; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 437 | |
| 438 | list_for_each_entry(ctx, &file->contexts, list) |
| 439 | if (ctx == context) |
| 440 | return true; |
| 441 | |
| 442 | return false; |
| 443 | } |
| 444 | |
| 445 | static int tegra_gem_create(struct drm_device *drm, void *data, |
| 446 | struct drm_file *file) |
| 447 | { |
| 448 | struct drm_tegra_gem_create *args = data; |
| 449 | struct tegra_bo *bo; |
| 450 | |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 451 | bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags, |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 452 | &args->handle); |
| 453 | if (IS_ERR(bo)) |
| 454 | return PTR_ERR(bo); |
| 455 | |
| 456 | return 0; |
| 457 | } |
| 458 | |
| 459 | static int tegra_gem_mmap(struct drm_device *drm, void *data, |
| 460 | struct drm_file *file) |
| 461 | { |
| 462 | struct drm_tegra_gem_mmap *args = data; |
| 463 | struct drm_gem_object *gem; |
| 464 | struct tegra_bo *bo; |
| 465 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 466 | gem = drm_gem_object_lookup(file, args->handle); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 467 | if (!gem) |
| 468 | return -EINVAL; |
| 469 | |
| 470 | bo = to_tegra_bo(gem); |
| 471 | |
David Herrmann | 2bc7b0c | 2013-08-13 14:19:58 +0200 | [diff] [blame] | 472 | args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 473 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 474 | drm_gem_object_unreference_unlocked(gem); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 475 | |
| 476 | return 0; |
| 477 | } |
| 478 | |
| 479 | static int tegra_syncpt_read(struct drm_device *drm, void *data, |
| 480 | struct drm_file *file) |
| 481 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 482 | struct host1x *host = dev_get_drvdata(drm->dev->parent); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 483 | struct drm_tegra_syncpt_read *args = data; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 484 | struct host1x_syncpt *sp; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 485 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 486 | sp = host1x_syncpt_get(host, args->id); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 487 | if (!sp) |
| 488 | return -EINVAL; |
| 489 | |
| 490 | args->value = host1x_syncpt_read_min(sp); |
| 491 | return 0; |
| 492 | } |
| 493 | |
| 494 | static int tegra_syncpt_incr(struct drm_device *drm, void *data, |
| 495 | struct drm_file *file) |
| 496 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 497 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 498 | struct drm_tegra_syncpt_incr *args = data; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 499 | struct host1x_syncpt *sp; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 500 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 501 | sp = host1x_syncpt_get(host1x, args->id); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 502 | if (!sp) |
| 503 | return -EINVAL; |
| 504 | |
Arto Merilainen | ebae30b | 2013-05-29 13:26:08 +0300 | [diff] [blame] | 505 | return host1x_syncpt_incr(sp); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 506 | } |
| 507 | |
| 508 | static int tegra_syncpt_wait(struct drm_device *drm, void *data, |
| 509 | struct drm_file *file) |
| 510 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 511 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 512 | struct drm_tegra_syncpt_wait *args = data; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 513 | struct host1x_syncpt *sp; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 514 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 515 | sp = host1x_syncpt_get(host1x, args->id); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 516 | if (!sp) |
| 517 | return -EINVAL; |
| 518 | |
| 519 | return host1x_syncpt_wait(sp, args->thresh, args->timeout, |
| 520 | &args->value); |
| 521 | } |
| 522 | |
| 523 | static int tegra_open_channel(struct drm_device *drm, void *data, |
| 524 | struct drm_file *file) |
| 525 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 526 | struct tegra_drm_file *fpriv = file->driver_priv; |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 527 | struct tegra_drm *tegra = drm->dev_private; |
| 528 | struct drm_tegra_open_channel *args = data; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 529 | struct tegra_drm_context *context; |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 530 | struct tegra_drm_client *client; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 531 | int err = -ENODEV; |
| 532 | |
| 533 | context = kzalloc(sizeof(*context), GFP_KERNEL); |
| 534 | if (!context) |
| 535 | return -ENOMEM; |
| 536 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 537 | list_for_each_entry(client, &tegra->clients, list) |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 538 | if (client->base.class == args->client) { |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 539 | err = client->ops->open_channel(client, context); |
| 540 | if (err) |
| 541 | break; |
| 542 | |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 543 | list_add(&context->list, &fpriv->contexts); |
| 544 | args->context = (uintptr_t)context; |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 545 | context->client = client; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 546 | return 0; |
| 547 | } |
| 548 | |
| 549 | kfree(context); |
| 550 | return err; |
| 551 | } |
| 552 | |
| 553 | static int tegra_close_channel(struct drm_device *drm, void *data, |
| 554 | struct drm_file *file) |
| 555 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 556 | struct tegra_drm_file *fpriv = file->driver_priv; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 557 | struct drm_tegra_close_channel *args = data; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 558 | struct tegra_drm_context *context; |
| 559 | |
| 560 | context = tegra_drm_get_context(args->context); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 561 | |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 562 | if (!tegra_drm_file_owns_context(fpriv, context)) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 563 | return -EINVAL; |
| 564 | |
| 565 | list_del(&context->list); |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 566 | tegra_drm_context_free(context); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 567 | |
| 568 | return 0; |
| 569 | } |
| 570 | |
| 571 | static int tegra_get_syncpt(struct drm_device *drm, void *data, |
| 572 | struct drm_file *file) |
| 573 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 574 | struct tegra_drm_file *fpriv = file->driver_priv; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 575 | struct drm_tegra_get_syncpt *args = data; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 576 | struct tegra_drm_context *context; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 577 | struct host1x_syncpt *syncpt; |
| 578 | |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 579 | context = tegra_drm_get_context(args->context); |
| 580 | |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 581 | if (!tegra_drm_file_owns_context(fpriv, context)) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 582 | return -ENODEV; |
| 583 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 584 | if (args->index >= context->client->base.num_syncpts) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 585 | return -EINVAL; |
| 586 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 587 | syncpt = context->client->base.syncpts[args->index]; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 588 | args->id = host1x_syncpt_id(syncpt); |
| 589 | |
| 590 | return 0; |
| 591 | } |
| 592 | |
| 593 | static int tegra_submit(struct drm_device *drm, void *data, |
| 594 | struct drm_file *file) |
| 595 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 596 | struct tegra_drm_file *fpriv = file->driver_priv; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 597 | struct drm_tegra_submit *args = data; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 598 | struct tegra_drm_context *context; |
| 599 | |
| 600 | context = tegra_drm_get_context(args->context); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 601 | |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 602 | if (!tegra_drm_file_owns_context(fpriv, context)) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 603 | return -ENODEV; |
| 604 | |
| 605 | return context->client->ops->submit(context, args, drm, file); |
| 606 | } |
Arto Merilainen | c54a169 | 2013-10-14 15:21:54 +0300 | [diff] [blame] | 607 | |
| 608 | static int tegra_get_syncpt_base(struct drm_device *drm, void *data, |
| 609 | struct drm_file *file) |
| 610 | { |
| 611 | struct tegra_drm_file *fpriv = file->driver_priv; |
| 612 | struct drm_tegra_get_syncpt_base *args = data; |
| 613 | struct tegra_drm_context *context; |
| 614 | struct host1x_syncpt_base *base; |
| 615 | struct host1x_syncpt *syncpt; |
| 616 | |
| 617 | context = tegra_drm_get_context(args->context); |
| 618 | |
| 619 | if (!tegra_drm_file_owns_context(fpriv, context)) |
| 620 | return -ENODEV; |
| 621 | |
| 622 | if (args->syncpt >= context->client->base.num_syncpts) |
| 623 | return -EINVAL; |
| 624 | |
| 625 | syncpt = context->client->base.syncpts[args->syncpt]; |
| 626 | |
| 627 | base = host1x_syncpt_get_base(syncpt); |
| 628 | if (!base) |
| 629 | return -ENXIO; |
| 630 | |
| 631 | args->id = host1x_syncpt_base_id(base); |
| 632 | |
| 633 | return 0; |
| 634 | } |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 635 | |
| 636 | static int tegra_gem_set_tiling(struct drm_device *drm, void *data, |
| 637 | struct drm_file *file) |
| 638 | { |
| 639 | struct drm_tegra_gem_set_tiling *args = data; |
| 640 | enum tegra_bo_tiling_mode mode; |
| 641 | struct drm_gem_object *gem; |
| 642 | unsigned long value = 0; |
| 643 | struct tegra_bo *bo; |
| 644 | |
| 645 | switch (args->mode) { |
| 646 | case DRM_TEGRA_GEM_TILING_MODE_PITCH: |
| 647 | mode = TEGRA_BO_TILING_MODE_PITCH; |
| 648 | |
| 649 | if (args->value != 0) |
| 650 | return -EINVAL; |
| 651 | |
| 652 | break; |
| 653 | |
| 654 | case DRM_TEGRA_GEM_TILING_MODE_TILED: |
| 655 | mode = TEGRA_BO_TILING_MODE_TILED; |
| 656 | |
| 657 | if (args->value != 0) |
| 658 | return -EINVAL; |
| 659 | |
| 660 | break; |
| 661 | |
| 662 | case DRM_TEGRA_GEM_TILING_MODE_BLOCK: |
| 663 | mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 664 | |
| 665 | if (args->value > 5) |
| 666 | return -EINVAL; |
| 667 | |
| 668 | value = args->value; |
| 669 | break; |
| 670 | |
| 671 | default: |
| 672 | return -EINVAL; |
| 673 | } |
| 674 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 675 | gem = drm_gem_object_lookup(file, args->handle); |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 676 | if (!gem) |
| 677 | return -ENOENT; |
| 678 | |
| 679 | bo = to_tegra_bo(gem); |
| 680 | |
| 681 | bo->tiling.mode = mode; |
| 682 | bo->tiling.value = value; |
| 683 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 684 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 685 | |
| 686 | return 0; |
| 687 | } |
| 688 | |
| 689 | static int tegra_gem_get_tiling(struct drm_device *drm, void *data, |
| 690 | struct drm_file *file) |
| 691 | { |
| 692 | struct drm_tegra_gem_get_tiling *args = data; |
| 693 | struct drm_gem_object *gem; |
| 694 | struct tegra_bo *bo; |
| 695 | int err = 0; |
| 696 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 697 | gem = drm_gem_object_lookup(file, args->handle); |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 698 | if (!gem) |
| 699 | return -ENOENT; |
| 700 | |
| 701 | bo = to_tegra_bo(gem); |
| 702 | |
| 703 | switch (bo->tiling.mode) { |
| 704 | case TEGRA_BO_TILING_MODE_PITCH: |
| 705 | args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH; |
| 706 | args->value = 0; |
| 707 | break; |
| 708 | |
| 709 | case TEGRA_BO_TILING_MODE_TILED: |
| 710 | args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED; |
| 711 | args->value = 0; |
| 712 | break; |
| 713 | |
| 714 | case TEGRA_BO_TILING_MODE_BLOCK: |
| 715 | args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK; |
| 716 | args->value = bo->tiling.value; |
| 717 | break; |
| 718 | |
| 719 | default: |
| 720 | err = -EINVAL; |
| 721 | break; |
| 722 | } |
| 723 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 724 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 725 | |
| 726 | return err; |
| 727 | } |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 728 | |
| 729 | static int tegra_gem_set_flags(struct drm_device *drm, void *data, |
| 730 | struct drm_file *file) |
| 731 | { |
| 732 | struct drm_tegra_gem_set_flags *args = data; |
| 733 | struct drm_gem_object *gem; |
| 734 | struct tegra_bo *bo; |
| 735 | |
| 736 | if (args->flags & ~DRM_TEGRA_GEM_FLAGS) |
| 737 | return -EINVAL; |
| 738 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 739 | gem = drm_gem_object_lookup(file, args->handle); |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 740 | if (!gem) |
| 741 | return -ENOENT; |
| 742 | |
| 743 | bo = to_tegra_bo(gem); |
| 744 | bo->flags = 0; |
| 745 | |
| 746 | if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP) |
| 747 | bo->flags |= TEGRA_BO_BOTTOM_UP; |
| 748 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 749 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 750 | |
| 751 | return 0; |
| 752 | } |
| 753 | |
| 754 | static int tegra_gem_get_flags(struct drm_device *drm, void *data, |
| 755 | struct drm_file *file) |
| 756 | { |
| 757 | struct drm_tegra_gem_get_flags *args = data; |
| 758 | struct drm_gem_object *gem; |
| 759 | struct tegra_bo *bo; |
| 760 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 761 | gem = drm_gem_object_lookup(file, args->handle); |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 762 | if (!gem) |
| 763 | return -ENOENT; |
| 764 | |
| 765 | bo = to_tegra_bo(gem); |
| 766 | args->flags = 0; |
| 767 | |
| 768 | if (bo->flags & TEGRA_BO_BOTTOM_UP) |
| 769 | args->flags |= DRM_TEGRA_GEM_BOTTOM_UP; |
| 770 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 771 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 772 | |
| 773 | return 0; |
| 774 | } |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 775 | #endif |
| 776 | |
Rob Clark | baa7094 | 2013-08-02 13:27:49 -0400 | [diff] [blame] | 777 | static const struct drm_ioctl_desc tegra_drm_ioctls[] = { |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 778 | #ifdef CONFIG_DRM_TEGRA_STAGING |
Daniel Vetter | f8c4714 | 2015-09-08 13:56:30 +0200 | [diff] [blame] | 779 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0), |
| 780 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0), |
| 781 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0), |
| 782 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0), |
| 783 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0), |
| 784 | DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0), |
| 785 | DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0), |
| 786 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0), |
| 787 | DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0), |
| 788 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0), |
| 789 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0), |
| 790 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0), |
| 791 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0), |
| 792 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0), |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 793 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 794 | }; |
| 795 | |
| 796 | static const struct file_operations tegra_drm_fops = { |
| 797 | .owner = THIS_MODULE, |
| 798 | .open = drm_open, |
| 799 | .release = drm_release, |
| 800 | .unlocked_ioctl = drm_ioctl, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 801 | .mmap = tegra_drm_mmap, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 802 | .poll = drm_poll, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 803 | .read = drm_read, |
| 804 | #ifdef CONFIG_COMPAT |
| 805 | .compat_ioctl = drm_compat_ioctl, |
| 806 | #endif |
| 807 | .llseek = noop_llseek, |
| 808 | }; |
| 809 | |
Thierry Reding | ed7dae5 | 2014-12-16 16:03:13 +0100 | [diff] [blame] | 810 | static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm, |
| 811 | unsigned int pipe) |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 812 | { |
| 813 | struct drm_crtc *crtc; |
| 814 | |
| 815 | list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) { |
Thierry Reding | ed7dae5 | 2014-12-16 16:03:13 +0100 | [diff] [blame] | 816 | if (pipe == drm_crtc_index(crtc)) |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 817 | return crtc; |
| 818 | } |
| 819 | |
| 820 | return NULL; |
| 821 | } |
| 822 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 823 | static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, |
| 824 | unsigned int pipe) |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 825 | { |
Thierry Reding | ed7dae5 | 2014-12-16 16:03:13 +0100 | [diff] [blame] | 826 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 827 | struct tegra_dc *dc = to_tegra_dc(crtc); |
Thierry Reding | ed7dae5 | 2014-12-16 16:03:13 +0100 | [diff] [blame] | 828 | |
| 829 | if (!crtc) |
| 830 | return 0; |
| 831 | |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 832 | return tegra_dc_get_vblank_counter(dc); |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 833 | } |
| 834 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 835 | static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe) |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 836 | { |
| 837 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); |
| 838 | struct tegra_dc *dc = to_tegra_dc(crtc); |
| 839 | |
| 840 | if (!crtc) |
| 841 | return -ENODEV; |
| 842 | |
| 843 | tegra_dc_enable_vblank(dc); |
| 844 | |
| 845 | return 0; |
| 846 | } |
| 847 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 848 | static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe) |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 849 | { |
| 850 | struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe); |
| 851 | struct tegra_dc *dc = to_tegra_dc(crtc); |
| 852 | |
| 853 | if (crtc) |
| 854 | tegra_dc_disable_vblank(dc); |
| 855 | } |
| 856 | |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 857 | static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file) |
| 858 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 859 | struct tegra_drm_file *fpriv = file->driver_priv; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 860 | struct tegra_drm_context *context, *tmp; |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 861 | |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 862 | list_for_each_entry_safe(context, tmp, &fpriv->contexts, list) |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 863 | tegra_drm_context_free(context); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 864 | |
| 865 | kfree(fpriv); |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 866 | } |
| 867 | |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 868 | #ifdef CONFIG_DEBUG_FS |
| 869 | static int tegra_debugfs_framebuffers(struct seq_file *s, void *data) |
| 870 | { |
| 871 | struct drm_info_node *node = (struct drm_info_node *)s->private; |
| 872 | struct drm_device *drm = node->minor->dev; |
| 873 | struct drm_framebuffer *fb; |
| 874 | |
| 875 | mutex_lock(&drm->mode_config.fb_lock); |
| 876 | |
| 877 | list_for_each_entry(fb, &drm->mode_config.fb_list, head) { |
| 878 | seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n", |
| 879 | fb->base.id, fb->width, fb->height, fb->depth, |
| 880 | fb->bits_per_pixel, |
Dave Airlie | 747a598 | 2016-04-15 15:10:35 +1000 | [diff] [blame] | 881 | drm_framebuffer_read_refcount(fb)); |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 882 | } |
| 883 | |
| 884 | mutex_unlock(&drm->mode_config.fb_lock); |
| 885 | |
| 886 | return 0; |
| 887 | } |
| 888 | |
Thierry Reding | 28c2337 | 2015-01-23 09:16:03 +0100 | [diff] [blame] | 889 | static int tegra_debugfs_iova(struct seq_file *s, void *data) |
| 890 | { |
| 891 | struct drm_info_node *node = (struct drm_info_node *)s->private; |
| 892 | struct drm_device *drm = node->minor->dev; |
| 893 | struct tegra_drm *tegra = drm->dev_private; |
| 894 | |
| 895 | return drm_mm_dump_table(s, &tegra->mm); |
| 896 | } |
| 897 | |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 898 | static struct drm_info_list tegra_debugfs_list[] = { |
| 899 | { "framebuffers", tegra_debugfs_framebuffers, 0 }, |
Thierry Reding | 28c2337 | 2015-01-23 09:16:03 +0100 | [diff] [blame] | 900 | { "iova", tegra_debugfs_iova, 0 }, |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 901 | }; |
| 902 | |
| 903 | static int tegra_debugfs_init(struct drm_minor *minor) |
| 904 | { |
| 905 | return drm_debugfs_create_files(tegra_debugfs_list, |
| 906 | ARRAY_SIZE(tegra_debugfs_list), |
| 907 | minor->debugfs_root, minor); |
| 908 | } |
| 909 | |
| 910 | static void tegra_debugfs_cleanup(struct drm_minor *minor) |
| 911 | { |
| 912 | drm_debugfs_remove_files(tegra_debugfs_list, |
| 913 | ARRAY_SIZE(tegra_debugfs_list), minor); |
| 914 | } |
| 915 | #endif |
| 916 | |
Thierry Reding | 9b57f5f | 2013-11-08 13:17:14 +0100 | [diff] [blame] | 917 | static struct drm_driver tegra_drm_driver = { |
Thierry Reding | ad90659 | 2015-09-24 18:38:09 +0200 | [diff] [blame] | 918 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | |
| 919 | DRIVER_ATOMIC, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 920 | .load = tegra_drm_load, |
| 921 | .unload = tegra_drm_unload, |
| 922 | .open = tegra_drm_open, |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 923 | .preclose = tegra_drm_preclose, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 924 | .lastclose = tegra_drm_lastclose, |
| 925 | |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 926 | .get_vblank_counter = tegra_drm_get_vblank_counter, |
| 927 | .enable_vblank = tegra_drm_enable_vblank, |
| 928 | .disable_vblank = tegra_drm_disable_vblank, |
| 929 | |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 930 | #if defined(CONFIG_DEBUG_FS) |
| 931 | .debugfs_init = tegra_debugfs_init, |
| 932 | .debugfs_cleanup = tegra_debugfs_cleanup, |
| 933 | #endif |
| 934 | |
Daniel Vetter | 1ddbdbd | 2016-04-26 19:30:00 +0200 | [diff] [blame] | 935 | .gem_free_object_unlocked = tegra_bo_free_object, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 936 | .gem_vm_ops = &tegra_bo_vm_ops, |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 937 | |
| 938 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
| 939 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
| 940 | .gem_prime_export = tegra_gem_prime_export, |
| 941 | .gem_prime_import = tegra_gem_prime_import, |
| 942 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 943 | .dumb_create = tegra_bo_dumb_create, |
| 944 | .dumb_map_offset = tegra_bo_dumb_map_offset, |
Daniel Vetter | 43387b3 | 2013-07-16 09:12:04 +0200 | [diff] [blame] | 945 | .dumb_destroy = drm_gem_dumb_destroy, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 946 | |
| 947 | .ioctls = tegra_drm_ioctls, |
| 948 | .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls), |
| 949 | .fops = &tegra_drm_fops, |
| 950 | |
| 951 | .name = DRIVER_NAME, |
| 952 | .desc = DRIVER_DESC, |
| 953 | .date = DRIVER_DATE, |
| 954 | .major = DRIVER_MAJOR, |
| 955 | .minor = DRIVER_MINOR, |
| 956 | .patchlevel = DRIVER_PATCHLEVEL, |
| 957 | }; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 958 | |
| 959 | int tegra_drm_register_client(struct tegra_drm *tegra, |
| 960 | struct tegra_drm_client *client) |
| 961 | { |
| 962 | mutex_lock(&tegra->clients_lock); |
| 963 | list_add_tail(&client->list, &tegra->clients); |
| 964 | mutex_unlock(&tegra->clients_lock); |
| 965 | |
| 966 | return 0; |
| 967 | } |
| 968 | |
| 969 | int tegra_drm_unregister_client(struct tegra_drm *tegra, |
| 970 | struct tegra_drm_client *client) |
| 971 | { |
| 972 | mutex_lock(&tegra->clients_lock); |
| 973 | list_del_init(&client->list); |
| 974 | mutex_unlock(&tegra->clients_lock); |
| 975 | |
| 976 | return 0; |
| 977 | } |
| 978 | |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 979 | static int host1x_drm_probe(struct host1x_device *dev) |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 980 | { |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 981 | struct drm_driver *driver = &tegra_drm_driver; |
| 982 | struct drm_device *drm; |
| 983 | int err; |
| 984 | |
| 985 | drm = drm_dev_alloc(driver, &dev->dev); |
Tom Gundersen | 0f28860 | 2016-09-21 16:59:19 +0200 | [diff] [blame] | 986 | if (IS_ERR(drm)) |
| 987 | return PTR_ERR(drm); |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 988 | |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 989 | dev_set_drvdata(&dev->dev, drm); |
| 990 | |
| 991 | err = drm_dev_register(drm, 0); |
| 992 | if (err < 0) |
| 993 | goto unref; |
| 994 | |
| 995 | DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name, |
| 996 | driver->major, driver->minor, driver->patchlevel, |
| 997 | driver->date, drm->primary->index); |
| 998 | |
| 999 | return 0; |
| 1000 | |
| 1001 | unref: |
| 1002 | drm_dev_unref(drm); |
| 1003 | return err; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1004 | } |
| 1005 | |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1006 | static int host1x_drm_remove(struct host1x_device *dev) |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1007 | { |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1008 | struct drm_device *drm = dev_get_drvdata(&dev->dev); |
| 1009 | |
| 1010 | drm_dev_unregister(drm); |
| 1011 | drm_dev_unref(drm); |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1012 | |
| 1013 | return 0; |
| 1014 | } |
| 1015 | |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1016 | #ifdef CONFIG_PM_SLEEP |
| 1017 | static int host1x_drm_suspend(struct device *dev) |
| 1018 | { |
| 1019 | struct drm_device *drm = dev_get_drvdata(dev); |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 1020 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1021 | |
| 1022 | drm_kms_helper_poll_disable(drm); |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 1023 | tegra_drm_fb_suspend(drm); |
| 1024 | |
| 1025 | tegra->state = drm_atomic_helper_suspend(drm); |
| 1026 | if (IS_ERR(tegra->state)) { |
| 1027 | tegra_drm_fb_resume(drm); |
| 1028 | drm_kms_helper_poll_enable(drm); |
| 1029 | return PTR_ERR(tegra->state); |
| 1030 | } |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1031 | |
| 1032 | return 0; |
| 1033 | } |
| 1034 | |
| 1035 | static int host1x_drm_resume(struct device *dev) |
| 1036 | { |
| 1037 | struct drm_device *drm = dev_get_drvdata(dev); |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 1038 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1039 | |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 1040 | drm_atomic_helper_resume(drm, tegra->state); |
| 1041 | tegra_drm_fb_resume(drm); |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1042 | drm_kms_helper_poll_enable(drm); |
| 1043 | |
| 1044 | return 0; |
| 1045 | } |
| 1046 | #endif |
| 1047 | |
Thierry Reding | a13f1dc | 2015-08-11 13:22:44 +0200 | [diff] [blame] | 1048 | static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend, |
| 1049 | host1x_drm_resume); |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1050 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1051 | static const struct of_device_id host1x_drm_subdevs[] = { |
| 1052 | { .compatible = "nvidia,tegra20-dc", }, |
| 1053 | { .compatible = "nvidia,tegra20-hdmi", }, |
| 1054 | { .compatible = "nvidia,tegra20-gr2d", }, |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 1055 | { .compatible = "nvidia,tegra20-gr3d", }, |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1056 | { .compatible = "nvidia,tegra30-dc", }, |
| 1057 | { .compatible = "nvidia,tegra30-hdmi", }, |
| 1058 | { .compatible = "nvidia,tegra30-gr2d", }, |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 1059 | { .compatible = "nvidia,tegra30-gr3d", }, |
Thierry Reding | dec7273 | 2013-09-03 08:45:46 +0200 | [diff] [blame] | 1060 | { .compatible = "nvidia,tegra114-dsi", }, |
Mikko Perttunen | 7d1d28a | 2013-09-30 16:54:47 +0200 | [diff] [blame] | 1061 | { .compatible = "nvidia,tegra114-hdmi", }, |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 1062 | { .compatible = "nvidia,tegra114-gr3d", }, |
Thierry Reding | 8620fc6 | 2013-12-12 11:03:59 +0100 | [diff] [blame] | 1063 | { .compatible = "nvidia,tegra124-dc", }, |
Thierry Reding | 6b6b604 | 2013-11-15 16:06:05 +0100 | [diff] [blame] | 1064 | { .compatible = "nvidia,tegra124-sor", }, |
Thierry Reding | fb7be70 | 2013-11-15 16:07:32 +0100 | [diff] [blame] | 1065 | { .compatible = "nvidia,tegra124-hdmi", }, |
Thierry Reding | 7d33858 | 2015-04-10 11:35:21 +0200 | [diff] [blame] | 1066 | { .compatible = "nvidia,tegra124-dsi", }, |
Thierry Reding | c06c793 | 2015-04-10 11:35:21 +0200 | [diff] [blame] | 1067 | { .compatible = "nvidia,tegra132-dsi", }, |
Thierry Reding | 5b4f516 | 2015-03-27 10:31:58 +0100 | [diff] [blame] | 1068 | { .compatible = "nvidia,tegra210-dc", }, |
Thierry Reding | ddfb406 | 2015-04-08 16:56:22 +0200 | [diff] [blame] | 1069 | { .compatible = "nvidia,tegra210-dsi", }, |
Thierry Reding | 3309ac8 | 2015-07-30 10:32:46 +0200 | [diff] [blame] | 1070 | { .compatible = "nvidia,tegra210-sor", }, |
Thierry Reding | 459cc2c | 2015-07-30 10:34:24 +0200 | [diff] [blame] | 1071 | { .compatible = "nvidia,tegra210-sor1", }, |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1072 | { /* sentinel */ } |
| 1073 | }; |
| 1074 | |
| 1075 | static struct host1x_driver host1x_drm_driver = { |
Thierry Reding | f4c5cf8 | 2014-12-18 15:29:14 +0100 | [diff] [blame] | 1076 | .driver = { |
| 1077 | .name = "drm", |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1078 | .pm = &host1x_drm_pm_ops, |
Thierry Reding | f4c5cf8 | 2014-12-18 15:29:14 +0100 | [diff] [blame] | 1079 | }, |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1080 | .probe = host1x_drm_probe, |
| 1081 | .remove = host1x_drm_remove, |
| 1082 | .subdevs = host1x_drm_subdevs, |
| 1083 | }; |
| 1084 | |
Thierry Reding | 473112e | 2015-09-10 16:07:14 +0200 | [diff] [blame] | 1085 | static struct platform_driver * const drivers[] = { |
| 1086 | &tegra_dc_driver, |
| 1087 | &tegra_hdmi_driver, |
| 1088 | &tegra_dsi_driver, |
| 1089 | &tegra_dpaux_driver, |
| 1090 | &tegra_sor_driver, |
| 1091 | &tegra_gr2d_driver, |
| 1092 | &tegra_gr3d_driver, |
| 1093 | }; |
| 1094 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1095 | static int __init host1x_drm_init(void) |
| 1096 | { |
| 1097 | int err; |
| 1098 | |
| 1099 | err = host1x_driver_register(&host1x_drm_driver); |
| 1100 | if (err < 0) |
| 1101 | return err; |
| 1102 | |
Thierry Reding | 473112e | 2015-09-10 16:07:14 +0200 | [diff] [blame] | 1103 | err = platform_register_drivers(drivers, ARRAY_SIZE(drivers)); |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1104 | if (err < 0) |
| 1105 | goto unregister_host1x; |
| 1106 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1107 | return 0; |
| 1108 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1109 | unregister_host1x: |
| 1110 | host1x_driver_unregister(&host1x_drm_driver); |
| 1111 | return err; |
| 1112 | } |
| 1113 | module_init(host1x_drm_init); |
| 1114 | |
| 1115 | static void __exit host1x_drm_exit(void) |
| 1116 | { |
Thierry Reding | 473112e | 2015-09-10 16:07:14 +0200 | [diff] [blame] | 1117 | platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1118 | host1x_driver_unregister(&host1x_drm_driver); |
| 1119 | } |
| 1120 | module_exit(host1x_drm_exit); |
| 1121 | |
| 1122 | MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); |
| 1123 | MODULE_DESCRIPTION("NVIDIA Tegra DRM driver"); |
| 1124 | MODULE_LICENSE("GPL v2"); |