blob: 8ed46a9a55c8469e38c0b14f7c5c8c95fb4fe569 [file] [log] [blame]
Bjorn Anderssonda65e362015-08-17 11:43:59 -07001/*
2 * Copyright (c) 2015, Sony Mobile Communications AB.
3 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 and
7 * only version 2 as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/of_device.h>
18#include <linux/platform_device.h>
19#include <linux/regulator/driver.h>
20#include <linux/regulator/machine.h>
21#include <linux/regulator/of_regulator.h>
22#include <linux/soc/qcom/smd-rpm.h>
23
24struct qcom_rpm_reg {
25 struct device *dev;
26
27 struct qcom_smd_rpm *rpm;
28
29 u32 type;
30 u32 id;
31
32 struct regulator_desc desc;
33
34 int is_enabled;
35 int uV;
36};
37
38struct rpm_regulator_req {
Stephen Boyd2c652a92015-09-02 15:46:51 -070039 __le32 key;
40 __le32 nbytes;
41 __le32 value;
Bjorn Anderssonda65e362015-08-17 11:43:59 -070042};
43
44#define RPM_KEY_SWEN 0x6e657773 /* "swen" */
45#define RPM_KEY_UV 0x00007675 /* "uv" */
46#define RPM_KEY_MA 0x0000616d /* "ma" */
47
48static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
49 struct rpm_regulator_req *req,
50 size_t size)
51{
52 return qcom_rpm_smd_write(vreg->rpm,
53 QCOM_SMD_RPM_ACTIVE_STATE,
54 vreg->type,
55 vreg->id,
56 req, size);
57}
58
59static int rpm_reg_enable(struct regulator_dev *rdev)
60{
61 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
62 struct rpm_regulator_req req;
63 int ret;
64
Stephen Boyd2c652a92015-09-02 15:46:51 -070065 req.key = cpu_to_le32(RPM_KEY_SWEN);
66 req.nbytes = cpu_to_le32(sizeof(u32));
67 req.value = cpu_to_le32(1);
Bjorn Anderssonda65e362015-08-17 11:43:59 -070068
69 ret = rpm_reg_write_active(vreg, &req, sizeof(req));
70 if (!ret)
71 vreg->is_enabled = 1;
72
73 return ret;
74}
75
76static int rpm_reg_is_enabled(struct regulator_dev *rdev)
77{
78 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
79
80 return vreg->is_enabled;
81}
82
83static int rpm_reg_disable(struct regulator_dev *rdev)
84{
85 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
86 struct rpm_regulator_req req;
87 int ret;
88
Stephen Boyd2c652a92015-09-02 15:46:51 -070089 req.key = cpu_to_le32(RPM_KEY_SWEN);
90 req.nbytes = cpu_to_le32(sizeof(u32));
Bjorn Anderssonda65e362015-08-17 11:43:59 -070091 req.value = 0;
92
93 ret = rpm_reg_write_active(vreg, &req, sizeof(req));
94 if (!ret)
95 vreg->is_enabled = 0;
96
97 return ret;
98}
99
100static int rpm_reg_get_voltage(struct regulator_dev *rdev)
101{
102 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
103
104 return vreg->uV;
105}
106
107static int rpm_reg_set_voltage(struct regulator_dev *rdev,
108 int min_uV,
109 int max_uV,
110 unsigned *selector)
111{
112 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
113 struct rpm_regulator_req req;
114 int ret = 0;
115
Stephen Boyd2c652a92015-09-02 15:46:51 -0700116 req.key = cpu_to_le32(RPM_KEY_UV);
117 req.nbytes = cpu_to_le32(sizeof(u32));
118 req.value = cpu_to_le32(min_uV);
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700119
120 ret = rpm_reg_write_active(vreg, &req, sizeof(req));
121 if (!ret)
122 vreg->uV = min_uV;
123
124 return ret;
125}
126
127static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
128{
129 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
130 struct rpm_regulator_req req;
131
Stephen Boyd2c652a92015-09-02 15:46:51 -0700132 req.key = cpu_to_le32(RPM_KEY_MA);
133 req.nbytes = cpu_to_le32(sizeof(u32));
Bjorn Anderssona3e123c2015-10-12 17:49:52 -0700134 req.value = cpu_to_le32(load_uA / 1000);
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700135
136 return rpm_reg_write_active(vreg, &req, sizeof(req));
137}
138
139static const struct regulator_ops rpm_smps_ldo_ops = {
140 .enable = rpm_reg_enable,
141 .disable = rpm_reg_disable,
142 .is_enabled = rpm_reg_is_enabled,
Srinivas Kandagatlaa8a47542016-06-02 11:23:15 +0100143 .list_voltage = regulator_list_voltage_linear_range,
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700144
145 .get_voltage = rpm_reg_get_voltage,
146 .set_voltage = rpm_reg_set_voltage,
147
148 .set_load = rpm_reg_set_load,
149};
150
Srinivas Kandagatlad1e44b62016-06-03 12:23:09 +0100151static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
152 .enable = rpm_reg_enable,
153 .disable = rpm_reg_disable,
154 .is_enabled = rpm_reg_is_enabled,
155
156 .get_voltage = rpm_reg_get_voltage,
157 .set_voltage = rpm_reg_set_voltage,
158
159 .set_load = rpm_reg_set_load,
160};
161
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700162static const struct regulator_ops rpm_switch_ops = {
163 .enable = rpm_reg_enable,
164 .disable = rpm_reg_disable,
165 .is_enabled = rpm_reg_is_enabled,
166};
167
Andy Grossee01d0c2015-12-14 23:30:45 -0600168static const struct regulator_desc pma8084_hfsmps = {
169 .linear_ranges = (struct regulator_linear_range[]) {
170 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
171 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
172 },
173 .n_linear_ranges = 2,
174 .n_voltages = 159,
175 .ops = &rpm_smps_ldo_ops,
176};
177
178static const struct regulator_desc pma8084_ftsmps = {
179 .linear_ranges = (struct regulator_linear_range[]) {
180 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
Stephen Boydc488f002016-07-11 14:50:08 -0700181 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
Andy Grossee01d0c2015-12-14 23:30:45 -0600182 },
183 .n_linear_ranges = 2,
Stephen Boydc488f002016-07-11 14:50:08 -0700184 .n_voltages = 262,
Andy Grossee01d0c2015-12-14 23:30:45 -0600185 .ops = &rpm_smps_ldo_ops,
186};
187
188static const struct regulator_desc pma8084_pldo = {
189 .linear_ranges = (struct regulator_linear_range[]) {
Stephen Boydc488f002016-07-11 14:50:08 -0700190 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
191 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
192 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
Andy Grossee01d0c2015-12-14 23:30:45 -0600193 },
Stephen Boydc488f002016-07-11 14:50:08 -0700194 .n_linear_ranges = 3,
195 .n_voltages = 164,
Andy Grossee01d0c2015-12-14 23:30:45 -0600196 .ops = &rpm_smps_ldo_ops,
197};
198
199static const struct regulator_desc pma8084_nldo = {
200 .linear_ranges = (struct regulator_linear_range[]) {
201 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
202 },
203 .n_linear_ranges = 1,
204 .n_voltages = 64,
205 .ops = &rpm_smps_ldo_ops,
206};
207
208static const struct regulator_desc pma8084_switch = {
209 .ops = &rpm_switch_ops,
210};
211
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700212static const struct regulator_desc pm8x41_hfsmps = {
213 .linear_ranges = (struct regulator_linear_range[]) {
214 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
Stephen Boydb7a85242016-07-11 14:50:09 -0700215 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700216 },
217 .n_linear_ranges = 2,
218 .n_voltages = 159,
219 .ops = &rpm_smps_ldo_ops,
220};
221
222static const struct regulator_desc pm8841_ftsmps = {
223 .linear_ranges = (struct regulator_linear_range[]) {
224 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
Stephen Boyd29028472016-07-11 14:50:07 -0700225 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700226 },
227 .n_linear_ranges = 2,
Stephen Boyd29028472016-07-11 14:50:07 -0700228 .n_voltages = 262,
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700229 .ops = &rpm_smps_ldo_ops,
230};
231
232static const struct regulator_desc pm8941_boost = {
233 .linear_ranges = (struct regulator_linear_range[]) {
Stephen Boyd29028472016-07-11 14:50:07 -0700234 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700235 },
236 .n_linear_ranges = 1,
Stephen Boyd29028472016-07-11 14:50:07 -0700237 .n_voltages = 31,
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700238 .ops = &rpm_smps_ldo_ops,
239};
240
241static const struct regulator_desc pm8941_pldo = {
242 .linear_ranges = (struct regulator_linear_range[]) {
Stephen Boyd29028472016-07-11 14:50:07 -0700243 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
244 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
245 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700246 },
Stephen Boyd29028472016-07-11 14:50:07 -0700247 .n_linear_ranges = 3,
248 .n_voltages = 164,
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700249 .ops = &rpm_smps_ldo_ops,
250};
251
252static const struct regulator_desc pm8941_nldo = {
253 .linear_ranges = (struct regulator_linear_range[]) {
254 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
255 },
256 .n_linear_ranges = 1,
257 .n_voltages = 64,
258 .ops = &rpm_smps_ldo_ops,
259};
260
261static const struct regulator_desc pm8941_lnldo = {
262 .fixed_uV = 1740000,
Axel Lin5a286aa2015-08-19 11:17:53 +0800263 .n_voltages = 1,
Srinivas Kandagatlad1e44b62016-06-03 12:23:09 +0100264 .ops = &rpm_smps_ldo_ops_fixed,
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700265};
266
267static const struct regulator_desc pm8941_switch = {
268 .ops = &rpm_switch_ops,
269};
270
Andy Gross57d65672015-12-14 23:30:44 -0600271static const struct regulator_desc pm8916_pldo = {
272 .linear_ranges = (struct regulator_linear_range[]) {
273 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
274 },
275 .n_linear_ranges = 1,
276 .n_voltages = 209,
277 .ops = &rpm_smps_ldo_ops,
278};
279
280static const struct regulator_desc pm8916_nldo = {
281 .linear_ranges = (struct regulator_linear_range[]) {
282 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
283 },
284 .n_linear_ranges = 1,
285 .n_voltages = 94,
286 .ops = &rpm_smps_ldo_ops,
287};
288
289static const struct regulator_desc pm8916_buck_lvo_smps = {
290 .linear_ranges = (struct regulator_linear_range[]) {
291 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
292 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
293 },
294 .n_linear_ranges = 2,
295 .n_voltages = 128,
296 .ops = &rpm_smps_ldo_ops,
297};
298
299static const struct regulator_desc pm8916_buck_hvo_smps = {
300 .linear_ranges = (struct regulator_linear_range[]) {
301 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
302 },
303 .n_linear_ranges = 1,
304 .n_voltages = 32,
305 .ops = &rpm_smps_ldo_ops,
306};
307
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700308struct rpm_regulator_data {
309 const char *name;
310 u32 type;
311 u32 id;
312 const struct regulator_desc *desc;
313 const char *supply;
314};
315
316static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
317 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
318 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
319 { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
320 { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
321 { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
322 { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
323 { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
324 { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
325 {}
326};
327
Andy Gross57d65672015-12-14 23:30:44 -0600328static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
329 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
330 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
331 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
332 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
333 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
334 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
335 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
336 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
337 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
338 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
339 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
340 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
341 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
342 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
343 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
344 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
345 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
346 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
347 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
348 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
349 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
350 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
351 {}
352};
353
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700354static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
355 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
356 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
357 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
358 { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
359
360 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
361 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
362 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
363 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
364 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
365 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
366 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
367 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
368 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
369 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
370 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
371 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
372 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
373 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
374 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
375 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
376 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
377 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
378 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
379 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
380 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
381 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
382 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
383 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
384
385 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
386 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
387 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
388
389 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
390 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
391
392 {}
393};
394
Andy Grossee01d0c2015-12-14 23:30:45 -0600395static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
396 { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
397 { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
398 { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
399 { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
400 { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
401 { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
402 { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
403 { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
404 { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
405 { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
406 { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
407 { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
408
409 { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
410 { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
411 { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
412 { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
413 { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
414 { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
415 { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
416 { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
417 { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
418 { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
419 { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
420 { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
421 { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
422 { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
423 { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
424 { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
425 { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
426 { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
427 { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
428 { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
429 { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
430 { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
431 { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
432 { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
433 { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
434 { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
435 { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
436
437 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
438 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
439 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
440 { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
441 { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
442
443 {}
444};
445
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700446static const struct of_device_id rpm_of_match[] = {
447 { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
Andy Gross57d65672015-12-14 23:30:44 -0600448 { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700449 { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
Andy Grossee01d0c2015-12-14 23:30:45 -0600450 { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
Bjorn Anderssonda65e362015-08-17 11:43:59 -0700451 {}
452};
453MODULE_DEVICE_TABLE(of, rpm_of_match);
454
455static int rpm_reg_probe(struct platform_device *pdev)
456{
457 const struct rpm_regulator_data *reg;
458 const struct of_device_id *match;
459 struct regulator_config config = { };
460 struct regulator_dev *rdev;
461 struct qcom_rpm_reg *vreg;
462 struct qcom_smd_rpm *rpm;
463
464 rpm = dev_get_drvdata(pdev->dev.parent);
465 if (!rpm) {
466 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
467 return -ENODEV;
468 }
469
470 match = of_match_device(rpm_of_match, &pdev->dev);
471 for (reg = match->data; reg->name; reg++) {
472 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
473 if (!vreg)
474 return -ENOMEM;
475
476 vreg->dev = &pdev->dev;
477 vreg->type = reg->type;
478 vreg->id = reg->id;
479 vreg->rpm = rpm;
480
481 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
482
483 vreg->desc.id = -1;
484 vreg->desc.owner = THIS_MODULE;
485 vreg->desc.type = REGULATOR_VOLTAGE;
486 vreg->desc.name = reg->name;
487 vreg->desc.supply_name = reg->supply;
488 vreg->desc.of_match = reg->name;
489
490 config.dev = &pdev->dev;
491 config.driver_data = vreg;
492 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
493 if (IS_ERR(rdev)) {
494 dev_err(&pdev->dev, "failed to register %s\n", reg->name);
495 return PTR_ERR(rdev);
496 }
497 }
498
499 return 0;
500}
501
502static struct platform_driver rpm_reg_driver = {
503 .probe = rpm_reg_probe,
504 .driver = {
505 .name = "qcom_rpm_smd_regulator",
506 .of_match_table = rpm_of_match,
507 },
508};
509
510static int __init rpm_reg_init(void)
511{
512 return platform_driver_register(&rpm_reg_driver);
513}
514subsys_initcall(rpm_reg_init);
515
516static void __exit rpm_reg_exit(void)
517{
518 platform_driver_unregister(&rpm_reg_driver);
519}
520module_exit(rpm_reg_exit)
521
522MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
523MODULE_LICENSE("GPL v2");