Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014 MediaTek Inc. |
| 3 | * Author: Joe.C <yingjoe.chen@mediatek.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/irq.h> |
Joel Porquet | 41a83e0 | 2015-07-07 17:11:46 -0400 | [diff] [blame] | 16 | #include <linux/irqchip.h> |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 17 | #include <linux/irqdomain.h> |
| 18 | #include <linux/of.h> |
| 19 | #include <linux/of_irq.h> |
| 20 | #include <linux/of_address.h> |
| 21 | #include <linux/io.h> |
| 22 | #include <linux/slab.h> |
| 23 | #include <linux/spinlock.h> |
| 24 | |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 25 | struct mtk_sysirq_chip_data { |
| 26 | spinlock_t lock; |
| 27 | void __iomem *intpol_base; |
| 28 | }; |
| 29 | |
| 30 | static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type) |
| 31 | { |
| 32 | irq_hw_number_t hwirq = data->hwirq; |
| 33 | struct mtk_sysirq_chip_data *chip_data = data->chip_data; |
| 34 | u32 offset, reg_index, value; |
| 35 | unsigned long flags; |
| 36 | int ret; |
| 37 | |
| 38 | offset = hwirq & 0x1f; |
| 39 | reg_index = hwirq >> 5; |
| 40 | |
| 41 | spin_lock_irqsave(&chip_data->lock, flags); |
| 42 | value = readl_relaxed(chip_data->intpol_base + reg_index * 4); |
| 43 | if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) { |
| 44 | if (type == IRQ_TYPE_LEVEL_LOW) |
| 45 | type = IRQ_TYPE_LEVEL_HIGH; |
| 46 | else |
| 47 | type = IRQ_TYPE_EDGE_RISING; |
| 48 | value |= (1 << offset); |
| 49 | } else { |
| 50 | value &= ~(1 << offset); |
| 51 | } |
| 52 | writel(value, chip_data->intpol_base + reg_index * 4); |
| 53 | |
| 54 | data = data->parent_data; |
| 55 | ret = data->chip->irq_set_type(data, type); |
| 56 | spin_unlock_irqrestore(&chip_data->lock, flags); |
| 57 | return ret; |
| 58 | } |
| 59 | |
| 60 | static struct irq_chip mtk_sysirq_chip = { |
| 61 | .name = "MT_SYSIRQ", |
| 62 | .irq_mask = irq_chip_mask_parent, |
| 63 | .irq_unmask = irq_chip_unmask_parent, |
| 64 | .irq_eoi = irq_chip_eoi_parent, |
| 65 | .irq_set_type = mtk_sysirq_set_type, |
| 66 | .irq_retrigger = irq_chip_retrigger_hierarchy, |
| 67 | .irq_set_affinity = irq_chip_set_affinity_parent, |
| 68 | }; |
| 69 | |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 70 | static int mtk_sysirq_domain_translate(struct irq_domain *d, |
| 71 | struct irq_fwspec *fwspec, |
| 72 | unsigned long *hwirq, |
| 73 | unsigned int *type) |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 74 | { |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 75 | if (is_of_node(fwspec->fwnode)) { |
| 76 | if (fwspec->param_count != 3) |
| 77 | return -EINVAL; |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 78 | |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 79 | /* No PPI should point to this domain */ |
| 80 | if (fwspec->param[0] != 0) |
| 81 | return -EINVAL; |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 82 | |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 83 | *hwirq = fwspec->param[1]; |
| 84 | *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; |
| 85 | return 0; |
| 86 | } |
| 87 | |
| 88 | return -EINVAL; |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 89 | } |
| 90 | |
| 91 | static int mtk_sysirq_domain_alloc(struct irq_domain *domain, unsigned int virq, |
| 92 | unsigned int nr_irqs, void *arg) |
| 93 | { |
| 94 | int i; |
| 95 | irq_hw_number_t hwirq; |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 96 | struct irq_fwspec *fwspec = arg; |
| 97 | struct irq_fwspec gic_fwspec = *fwspec; |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 98 | |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 99 | if (fwspec->param_count != 3) |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 100 | return -EINVAL; |
| 101 | |
| 102 | /* sysirq doesn't support PPI */ |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 103 | if (fwspec->param[0]) |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 104 | return -EINVAL; |
| 105 | |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 106 | hwirq = fwspec->param[1]; |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 107 | for (i = 0; i < nr_irqs; i++) |
| 108 | irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, |
| 109 | &mtk_sysirq_chip, |
| 110 | domain->host_data); |
| 111 | |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 112 | gic_fwspec.fwnode = domain->parent->fwnode; |
| 113 | return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_fwspec); |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 114 | } |
| 115 | |
Krzysztof Kozlowski | 9600973 | 2015-04-27 21:54:24 +0900 | [diff] [blame] | 116 | static const struct irq_domain_ops sysirq_domain_ops = { |
Marc Zyngier | f833f57 | 2015-10-13 12:51:33 +0100 | [diff] [blame] | 117 | .translate = mtk_sysirq_domain_translate, |
| 118 | .alloc = mtk_sysirq_domain_alloc, |
| 119 | .free = irq_domain_free_irqs_common, |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 120 | }; |
| 121 | |
| 122 | static int __init mtk_sysirq_of_init(struct device_node *node, |
| 123 | struct device_node *parent) |
| 124 | { |
| 125 | struct irq_domain *domain, *domain_parent; |
| 126 | struct mtk_sysirq_chip_data *chip_data; |
Yingjoe Chen | cdb647a | 2015-01-12 17:14:31 +0800 | [diff] [blame] | 127 | int ret, size, intpol_num; |
| 128 | struct resource res; |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 129 | |
| 130 | domain_parent = irq_find_host(parent); |
| 131 | if (!domain_parent) { |
| 132 | pr_err("mtk_sysirq: interrupt-parent not found\n"); |
| 133 | return -EINVAL; |
| 134 | } |
| 135 | |
Yingjoe Chen | cdb647a | 2015-01-12 17:14:31 +0800 | [diff] [blame] | 136 | ret = of_address_to_resource(node, 0, &res); |
| 137 | if (ret) |
| 138 | return ret; |
| 139 | |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 140 | chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL); |
| 141 | if (!chip_data) |
| 142 | return -ENOMEM; |
| 143 | |
Yingjoe Chen | cdb647a | 2015-01-12 17:14:31 +0800 | [diff] [blame] | 144 | size = resource_size(&res); |
| 145 | intpol_num = size * 8; |
| 146 | chip_data->intpol_base = ioremap(res.start, size); |
| 147 | if (!chip_data->intpol_base) { |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 148 | pr_err("mtk_sysirq: unable to map sysirq register\n"); |
Axel Lin | e1a96fb | 2015-05-21 22:57:34 +0800 | [diff] [blame] | 149 | ret = -ENXIO; |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 150 | goto out_free; |
| 151 | } |
| 152 | |
Yingjoe Chen | cdb647a | 2015-01-12 17:14:31 +0800 | [diff] [blame] | 153 | domain = irq_domain_add_hierarchy(domain_parent, 0, intpol_num, node, |
Yingjoe Chen | 5fe3bba | 2014-11-25 16:04:20 +0800 | [diff] [blame] | 154 | &sysirq_domain_ops, chip_data); |
| 155 | if (!domain) { |
| 156 | ret = -ENOMEM; |
| 157 | goto out_unmap; |
| 158 | } |
| 159 | spin_lock_init(&chip_data->lock); |
| 160 | |
| 161 | return 0; |
| 162 | |
| 163 | out_unmap: |
| 164 | iounmap(chip_data->intpol_base); |
| 165 | out_free: |
| 166 | kfree(chip_data); |
| 167 | return ret; |
| 168 | } |
| 169 | IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init); |