Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver |
| 3 | * |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 4 | * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
Pierre Ossman | 643f720 | 2006-09-30 23:27:52 -0700 | [diff] [blame] | 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or (at |
| 9 | * your option) any later version. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 10 | */ |
| 11 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 12 | #include <linux/delay.h> |
| 13 | #include <linux/highmem.h> |
| 14 | #include <linux/pci.h> |
| 15 | #include <linux/dma-mapping.h> |
| 16 | |
| 17 | #include <linux/mmc/host.h> |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 18 | |
| 19 | #include <asm/scatterlist.h> |
| 20 | |
| 21 | #include "sdhci.h" |
| 22 | |
| 23 | #define DRIVER_NAME "sdhci" |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 24 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 25 | #define DBG(f, x...) \ |
Russell King | c656317 | 2006-03-29 09:30:20 +0100 | [diff] [blame] | 26 | pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 27 | |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 28 | static unsigned int debug_nodma = 0; |
| 29 | static unsigned int debug_forcedma = 0; |
Pierre Ossman | df673b2 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 30 | static unsigned int debug_quirks = 0; |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 31 | |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 32 | #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) |
Pierre Ossman | 9860807 | 2006-06-30 02:22:34 -0700 | [diff] [blame] | 33 | #define SDHCI_QUIRK_FORCE_DMA (1<<1) |
Pierre Ossman | 8a4da14 | 2006-10-04 02:15:40 -0700 | [diff] [blame] | 34 | /* Controller doesn't like some resets when there is no card inserted. */ |
| 35 | #define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2) |
Darren Salt | 9e9dc5f | 2007-01-27 15:32:31 +0100 | [diff] [blame] | 36 | #define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3) |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 37 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 38 | static const struct pci_device_id pci_ids[] __devinitdata = { |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 39 | { |
| 40 | .vendor = PCI_VENDOR_ID_RICOH, |
| 41 | .device = PCI_DEVICE_ID_RICOH_R5C822, |
| 42 | .subvendor = PCI_VENDOR_ID_IBM, |
| 43 | .subdevice = PCI_ANY_ID, |
Pierre Ossman | 9860807 | 2006-06-30 02:22:34 -0700 | [diff] [blame] | 44 | .driver_data = SDHCI_QUIRK_CLOCK_BEFORE_RESET | |
| 45 | SDHCI_QUIRK_FORCE_DMA, |
| 46 | }, |
| 47 | |
| 48 | { |
| 49 | .vendor = PCI_VENDOR_ID_RICOH, |
| 50 | .device = PCI_DEVICE_ID_RICOH_R5C822, |
| 51 | .subvendor = PCI_ANY_ID, |
| 52 | .subdevice = PCI_ANY_ID, |
Pierre Ossman | 8a4da14 | 2006-10-04 02:15:40 -0700 | [diff] [blame] | 53 | .driver_data = SDHCI_QUIRK_FORCE_DMA | |
| 54 | SDHCI_QUIRK_NO_CARD_NO_RESET, |
Pierre Ossman | 9860807 | 2006-06-30 02:22:34 -0700 | [diff] [blame] | 55 | }, |
| 56 | |
| 57 | { |
| 58 | .vendor = PCI_VENDOR_ID_TI, |
| 59 | .device = PCI_DEVICE_ID_TI_XX21_XX11_SD, |
| 60 | .subvendor = PCI_ANY_ID, |
| 61 | .subdevice = PCI_ANY_ID, |
| 62 | .driver_data = SDHCI_QUIRK_FORCE_DMA, |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 63 | }, |
| 64 | |
Darren Salt | 9e9dc5f | 2007-01-27 15:32:31 +0100 | [diff] [blame] | 65 | { |
| 66 | .vendor = PCI_VENDOR_ID_ENE, |
| 67 | .device = PCI_DEVICE_ID_ENE_CB712_SD, |
| 68 | .subvendor = PCI_ANY_ID, |
| 69 | .subdevice = PCI_ANY_ID, |
| 70 | .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE, |
| 71 | }, |
| 72 | |
Milko Krachounov | 7de064e | 2007-05-19 01:18:03 +0200 | [diff] [blame] | 73 | { |
| 74 | .vendor = PCI_VENDOR_ID_ENE, |
| 75 | .device = PCI_DEVICE_ID_ENE_CB712_SD_2, |
| 76 | .subvendor = PCI_ANY_ID, |
| 77 | .subdevice = PCI_ANY_ID, |
| 78 | .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE, |
| 79 | }, |
| 80 | |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 81 | { /* Generic SD host controller */ |
| 82 | PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00) |
| 83 | }, |
| 84 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 85 | { /* end: all zeroes */ }, |
| 86 | }; |
| 87 | |
| 88 | MODULE_DEVICE_TABLE(pci, pci_ids); |
| 89 | |
| 90 | static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *); |
| 91 | static void sdhci_finish_data(struct sdhci_host *); |
| 92 | |
| 93 | static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); |
| 94 | static void sdhci_finish_command(struct sdhci_host *); |
| 95 | |
| 96 | static void sdhci_dumpregs(struct sdhci_host *host) |
| 97 | { |
| 98 | printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n"); |
| 99 | |
| 100 | printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", |
| 101 | readl(host->ioaddr + SDHCI_DMA_ADDRESS), |
| 102 | readw(host->ioaddr + SDHCI_HOST_VERSION)); |
| 103 | printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", |
| 104 | readw(host->ioaddr + SDHCI_BLOCK_SIZE), |
| 105 | readw(host->ioaddr + SDHCI_BLOCK_COUNT)); |
| 106 | printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", |
| 107 | readl(host->ioaddr + SDHCI_ARGUMENT), |
| 108 | readw(host->ioaddr + SDHCI_TRANSFER_MODE)); |
| 109 | printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", |
| 110 | readl(host->ioaddr + SDHCI_PRESENT_STATE), |
| 111 | readb(host->ioaddr + SDHCI_HOST_CONTROL)); |
| 112 | printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n", |
| 113 | readb(host->ioaddr + SDHCI_POWER_CONTROL), |
| 114 | readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL)); |
| 115 | printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", |
| 116 | readb(host->ioaddr + SDHCI_WALK_UP_CONTROL), |
| 117 | readw(host->ioaddr + SDHCI_CLOCK_CONTROL)); |
| 118 | printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", |
| 119 | readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL), |
| 120 | readl(host->ioaddr + SDHCI_INT_STATUS)); |
| 121 | printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", |
| 122 | readl(host->ioaddr + SDHCI_INT_ENABLE), |
| 123 | readl(host->ioaddr + SDHCI_SIGNAL_ENABLE)); |
| 124 | printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", |
| 125 | readw(host->ioaddr + SDHCI_ACMD12_ERR), |
| 126 | readw(host->ioaddr + SDHCI_SLOT_INT_STATUS)); |
| 127 | printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n", |
| 128 | readl(host->ioaddr + SDHCI_CAPABILITIES), |
| 129 | readl(host->ioaddr + SDHCI_MAX_CURRENT)); |
| 130 | |
| 131 | printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n"); |
| 132 | } |
| 133 | |
| 134 | /*****************************************************************************\ |
| 135 | * * |
| 136 | * Low level functions * |
| 137 | * * |
| 138 | \*****************************************************************************/ |
| 139 | |
| 140 | static void sdhci_reset(struct sdhci_host *host, u8 mask) |
| 141 | { |
Pierre Ossman | e16514d8 | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 142 | unsigned long timeout; |
| 143 | |
Pierre Ossman | 8a4da14 | 2006-10-04 02:15:40 -0700 | [diff] [blame] | 144 | if (host->chip->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { |
| 145 | if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & |
| 146 | SDHCI_CARD_PRESENT)) |
| 147 | return; |
| 148 | } |
| 149 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 150 | writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET); |
| 151 | |
Pierre Ossman | e16514d8 | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 152 | if (mask & SDHCI_RESET_ALL) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 153 | host->clock = 0; |
| 154 | |
Pierre Ossman | e16514d8 | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 155 | /* Wait max 100 ms */ |
| 156 | timeout = 100; |
| 157 | |
| 158 | /* hw clears the bit when it's done */ |
| 159 | while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) { |
| 160 | if (timeout == 0) { |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 161 | printk(KERN_ERR "%s: Reset 0x%x never completed.\n", |
Pierre Ossman | e16514d8 | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 162 | mmc_hostname(host->mmc), (int)mask); |
| 163 | sdhci_dumpregs(host); |
| 164 | return; |
| 165 | } |
| 166 | timeout--; |
| 167 | mdelay(1); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 168 | } |
| 169 | } |
| 170 | |
| 171 | static void sdhci_init(struct sdhci_host *host) |
| 172 | { |
| 173 | u32 intmask; |
| 174 | |
| 175 | sdhci_reset(host, SDHCI_RESET_ALL); |
| 176 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 177 | intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | |
| 178 | SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | |
| 179 | SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | |
| 180 | SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 181 | SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 182 | SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 183 | |
| 184 | writel(intmask, host->ioaddr + SDHCI_INT_ENABLE); |
| 185 | writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 186 | } |
| 187 | |
| 188 | static void sdhci_activate_led(struct sdhci_host *host) |
| 189 | { |
| 190 | u8 ctrl; |
| 191 | |
| 192 | ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); |
| 193 | ctrl |= SDHCI_CTRL_LED; |
| 194 | writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); |
| 195 | } |
| 196 | |
| 197 | static void sdhci_deactivate_led(struct sdhci_host *host) |
| 198 | { |
| 199 | u8 ctrl; |
| 200 | |
| 201 | ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); |
| 202 | ctrl &= ~SDHCI_CTRL_LED; |
| 203 | writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); |
| 204 | } |
| 205 | |
| 206 | /*****************************************************************************\ |
| 207 | * * |
| 208 | * Core functions * |
| 209 | * * |
| 210 | \*****************************************************************************/ |
| 211 | |
Pierre Ossman | 2a22b14 | 2007-02-02 18:27:42 +0100 | [diff] [blame] | 212 | static inline char* sdhci_sg_to_buffer(struct sdhci_host* host) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 213 | { |
Pierre Ossman | 2a22b14 | 2007-02-02 18:27:42 +0100 | [diff] [blame] | 214 | return page_address(host->cur_sg->page) + host->cur_sg->offset; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 215 | } |
| 216 | |
| 217 | static inline int sdhci_next_sg(struct sdhci_host* host) |
| 218 | { |
| 219 | /* |
| 220 | * Skip to next SG entry. |
| 221 | */ |
| 222 | host->cur_sg++; |
| 223 | host->num_sg--; |
| 224 | |
| 225 | /* |
| 226 | * Any entries left? |
| 227 | */ |
| 228 | if (host->num_sg > 0) { |
| 229 | host->offset = 0; |
| 230 | host->remain = host->cur_sg->length; |
| 231 | } |
| 232 | |
| 233 | return host->num_sg; |
| 234 | } |
| 235 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 236 | static void sdhci_read_block_pio(struct sdhci_host *host) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 237 | { |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 238 | int blksize, chunk_remain; |
| 239 | u32 data; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 240 | char *buffer; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 241 | int size; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 242 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 243 | DBG("PIO reading\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 244 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 245 | blksize = host->data->blksz; |
| 246 | chunk_remain = 0; |
| 247 | data = 0; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 248 | |
Pierre Ossman | 2a22b14 | 2007-02-02 18:27:42 +0100 | [diff] [blame] | 249 | buffer = sdhci_sg_to_buffer(host) + host->offset; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 250 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 251 | while (blksize) { |
| 252 | if (chunk_remain == 0) { |
| 253 | data = readl(host->ioaddr + SDHCI_BUFFER); |
| 254 | chunk_remain = min(blksize, 4); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 255 | } |
| 256 | |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 257 | size = min(host->remain, chunk_remain); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 258 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 259 | chunk_remain -= size; |
| 260 | blksize -= size; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 261 | host->offset += size; |
| 262 | host->remain -= size; |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 263 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 264 | while (size) { |
| 265 | *buffer = data & 0xFF; |
| 266 | buffer++; |
| 267 | data >>= 8; |
| 268 | size--; |
| 269 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 270 | |
| 271 | if (host->remain == 0) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 272 | if (sdhci_next_sg(host) == 0) { |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 273 | BUG_ON(blksize != 0); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 274 | return; |
| 275 | } |
Pierre Ossman | 2a22b14 | 2007-02-02 18:27:42 +0100 | [diff] [blame] | 276 | buffer = sdhci_sg_to_buffer(host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 277 | } |
| 278 | } |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 279 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 280 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 281 | static void sdhci_write_block_pio(struct sdhci_host *host) |
| 282 | { |
| 283 | int blksize, chunk_remain; |
| 284 | u32 data; |
| 285 | char *buffer; |
| 286 | int bytes, size; |
| 287 | |
| 288 | DBG("PIO writing\n"); |
| 289 | |
| 290 | blksize = host->data->blksz; |
| 291 | chunk_remain = 4; |
| 292 | data = 0; |
| 293 | |
| 294 | bytes = 0; |
Pierre Ossman | 2a22b14 | 2007-02-02 18:27:42 +0100 | [diff] [blame] | 295 | buffer = sdhci_sg_to_buffer(host) + host->offset; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 296 | |
| 297 | while (blksize) { |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 298 | size = min(host->remain, chunk_remain); |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 299 | |
| 300 | chunk_remain -= size; |
| 301 | blksize -= size; |
| 302 | host->offset += size; |
| 303 | host->remain -= size; |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 304 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 305 | while (size) { |
| 306 | data >>= 8; |
| 307 | data |= (u32)*buffer << 24; |
| 308 | buffer++; |
| 309 | size--; |
| 310 | } |
| 311 | |
| 312 | if (chunk_remain == 0) { |
| 313 | writel(data, host->ioaddr + SDHCI_BUFFER); |
| 314 | chunk_remain = min(blksize, 4); |
| 315 | } |
| 316 | |
| 317 | if (host->remain == 0) { |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 318 | if (sdhci_next_sg(host) == 0) { |
| 319 | BUG_ON(blksize != 0); |
| 320 | return; |
| 321 | } |
Pierre Ossman | 2a22b14 | 2007-02-02 18:27:42 +0100 | [diff] [blame] | 322 | buffer = sdhci_sg_to_buffer(host); |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 323 | } |
| 324 | } |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 325 | } |
| 326 | |
| 327 | static void sdhci_transfer_pio(struct sdhci_host *host) |
| 328 | { |
| 329 | u32 mask; |
| 330 | |
| 331 | BUG_ON(!host->data); |
| 332 | |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 333 | if (host->num_sg == 0) |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 334 | return; |
| 335 | |
| 336 | if (host->data->flags & MMC_DATA_READ) |
| 337 | mask = SDHCI_DATA_AVAILABLE; |
| 338 | else |
| 339 | mask = SDHCI_SPACE_AVAILABLE; |
| 340 | |
| 341 | while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) { |
| 342 | if (host->data->flags & MMC_DATA_READ) |
| 343 | sdhci_read_block_pio(host); |
| 344 | else |
| 345 | sdhci_write_block_pio(host); |
| 346 | |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 347 | if (host->num_sg == 0) |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 348 | break; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 349 | } |
| 350 | |
| 351 | DBG("PIO transfer complete.\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 352 | } |
| 353 | |
| 354 | static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) |
| 355 | { |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 356 | u8 count; |
| 357 | unsigned target_timeout, current_timeout; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 358 | |
| 359 | WARN_ON(host->data); |
| 360 | |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 361 | if (data == NULL) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 362 | return; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 363 | |
| 364 | DBG("blksz %04x blks %04x flags %08x\n", |
Russell King | a3fd4a1 | 2006-06-04 17:51:15 +0100 | [diff] [blame] | 365 | data->blksz, data->blocks, data->flags); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 366 | DBG("tsac %d ms nsac %d clk\n", |
| 367 | data->timeout_ns / 1000000, data->timeout_clks); |
| 368 | |
Pierre Ossman | bab7696 | 2006-07-02 16:51:35 +0100 | [diff] [blame] | 369 | /* Sanity checks */ |
| 370 | BUG_ON(data->blksz * data->blocks > 524288); |
Pierre Ossman | fe4a3c7 | 2006-11-21 17:54:23 +0100 | [diff] [blame] | 371 | BUG_ON(data->blksz > host->mmc->max_blk_size); |
Pierre Ossman | 1d676e0 | 2006-07-02 16:52:10 +0100 | [diff] [blame] | 372 | BUG_ON(data->blocks > 65535); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 373 | |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 374 | /* timeout in us */ |
| 375 | target_timeout = data->timeout_ns / 1000 + |
| 376 | data->timeout_clks / host->clock; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 377 | |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 378 | /* |
| 379 | * Figure out needed cycles. |
| 380 | * We do this in steps in order to fit inside a 32 bit int. |
| 381 | * The first step is the minimum timeout, which will have a |
| 382 | * minimum resolution of 6 bits: |
| 383 | * (1) 2^13*1000 > 2^22, |
| 384 | * (2) host->timeout_clk < 2^16 |
| 385 | * => |
| 386 | * (1) / (2) > 2^6 |
| 387 | */ |
| 388 | count = 0; |
| 389 | current_timeout = (1 << 13) * 1000 / host->timeout_clk; |
| 390 | while (current_timeout < target_timeout) { |
| 391 | count++; |
| 392 | current_timeout <<= 1; |
| 393 | if (count >= 0xF) |
| 394 | break; |
| 395 | } |
| 396 | |
| 397 | if (count >= 0xF) { |
| 398 | printk(KERN_WARNING "%s: Too large timeout requested!\n", |
| 399 | mmc_hostname(host->mmc)); |
| 400 | count = 0xE; |
| 401 | } |
| 402 | |
| 403 | writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 404 | |
| 405 | if (host->flags & SDHCI_USE_DMA) { |
| 406 | int count; |
| 407 | |
| 408 | count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len, |
| 409 | (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE); |
| 410 | BUG_ON(count != 1); |
| 411 | |
| 412 | writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS); |
| 413 | } else { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 414 | host->cur_sg = data->sg; |
| 415 | host->num_sg = data->sg_len; |
| 416 | |
| 417 | host->offset = 0; |
| 418 | host->remain = host->cur_sg->length; |
| 419 | } |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 420 | |
Pierre Ossman | bab7696 | 2006-07-02 16:51:35 +0100 | [diff] [blame] | 421 | /* We do not handle DMA boundaries, so set it to max (512 KiB) */ |
| 422 | writew(SDHCI_MAKE_BLKSZ(7, data->blksz), |
| 423 | host->ioaddr + SDHCI_BLOCK_SIZE); |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 424 | writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT); |
| 425 | } |
| 426 | |
| 427 | static void sdhci_set_transfer_mode(struct sdhci_host *host, |
| 428 | struct mmc_data *data) |
| 429 | { |
| 430 | u16 mode; |
| 431 | |
| 432 | WARN_ON(host->data); |
| 433 | |
| 434 | if (data == NULL) |
| 435 | return; |
| 436 | |
| 437 | mode = SDHCI_TRNS_BLK_CNT_EN; |
| 438 | if (data->blocks > 1) |
| 439 | mode |= SDHCI_TRNS_MULTI; |
| 440 | if (data->flags & MMC_DATA_READ) |
| 441 | mode |= SDHCI_TRNS_READ; |
| 442 | if (host->flags & SDHCI_USE_DMA) |
| 443 | mode |= SDHCI_TRNS_DMA; |
| 444 | |
| 445 | writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 446 | } |
| 447 | |
| 448 | static void sdhci_finish_data(struct sdhci_host *host) |
| 449 | { |
| 450 | struct mmc_data *data; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 451 | u16 blocks; |
| 452 | |
| 453 | BUG_ON(!host->data); |
| 454 | |
| 455 | data = host->data; |
| 456 | host->data = NULL; |
| 457 | |
| 458 | if (host->flags & SDHCI_USE_DMA) { |
| 459 | pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len, |
| 460 | (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 461 | } |
| 462 | |
| 463 | /* |
| 464 | * Controller doesn't count down when in single block mode. |
| 465 | */ |
| 466 | if ((data->blocks == 1) && (data->error == MMC_ERR_NONE)) |
| 467 | blocks = 0; |
| 468 | else |
| 469 | blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT); |
Russell King | a3fd4a1 | 2006-06-04 17:51:15 +0100 | [diff] [blame] | 470 | data->bytes_xfered = data->blksz * (data->blocks - blocks); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 471 | |
| 472 | if ((data->error == MMC_ERR_NONE) && blocks) { |
| 473 | printk(KERN_ERR "%s: Controller signalled completion even " |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 474 | "though there were blocks left.\n", |
| 475 | mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 476 | data->error = MMC_ERR_FAILED; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 477 | } |
| 478 | |
| 479 | DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered); |
| 480 | |
| 481 | if (data->stop) { |
| 482 | /* |
| 483 | * The controller needs a reset of internal state machines |
| 484 | * upon error conditions. |
| 485 | */ |
| 486 | if (data->error != MMC_ERR_NONE) { |
| 487 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 488 | sdhci_reset(host, SDHCI_RESET_DATA); |
| 489 | } |
| 490 | |
| 491 | sdhci_send_command(host, data->stop); |
| 492 | } else |
| 493 | tasklet_schedule(&host->finish_tasklet); |
| 494 | } |
| 495 | |
| 496 | static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) |
| 497 | { |
| 498 | int flags; |
Pierre Ossman | fd2208d | 2006-06-30 02:22:28 -0700 | [diff] [blame] | 499 | u32 mask; |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 500 | unsigned long timeout; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 501 | |
| 502 | WARN_ON(host->cmd); |
| 503 | |
| 504 | DBG("Sending cmd (%x)\n", cmd->opcode); |
| 505 | |
| 506 | /* Wait max 10 ms */ |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 507 | timeout = 10; |
Pierre Ossman | fd2208d | 2006-06-30 02:22:28 -0700 | [diff] [blame] | 508 | |
| 509 | mask = SDHCI_CMD_INHIBIT; |
| 510 | if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) |
| 511 | mask |= SDHCI_DATA_INHIBIT; |
| 512 | |
| 513 | /* We shouldn't wait for data inihibit for stop commands, even |
| 514 | though they might use busy signaling */ |
| 515 | if (host->mrq->data && (cmd == host->mrq->data->stop)) |
| 516 | mask &= ~SDHCI_DATA_INHIBIT; |
| 517 | |
| 518 | while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) { |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 519 | if (timeout == 0) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 520 | printk(KERN_ERR "%s: Controller never released " |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 521 | "inhibit bit(s).\n", mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 522 | sdhci_dumpregs(host); |
| 523 | cmd->error = MMC_ERR_FAILED; |
| 524 | tasklet_schedule(&host->finish_tasklet); |
| 525 | return; |
| 526 | } |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 527 | timeout--; |
| 528 | mdelay(1); |
| 529 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 530 | |
| 531 | mod_timer(&host->timer, jiffies + 10 * HZ); |
| 532 | |
| 533 | host->cmd = cmd; |
| 534 | |
| 535 | sdhci_prepare_data(host, cmd->data); |
| 536 | |
| 537 | writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT); |
| 538 | |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 539 | sdhci_set_transfer_mode(host, cmd->data); |
| 540 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 541 | if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 542 | printk(KERN_ERR "%s: Unsupported response type!\n", |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 543 | mmc_hostname(host->mmc)); |
| 544 | cmd->error = MMC_ERR_INVALID; |
| 545 | tasklet_schedule(&host->finish_tasklet); |
| 546 | return; |
| 547 | } |
| 548 | |
| 549 | if (!(cmd->flags & MMC_RSP_PRESENT)) |
| 550 | flags = SDHCI_CMD_RESP_NONE; |
| 551 | else if (cmd->flags & MMC_RSP_136) |
| 552 | flags = SDHCI_CMD_RESP_LONG; |
| 553 | else if (cmd->flags & MMC_RSP_BUSY) |
| 554 | flags = SDHCI_CMD_RESP_SHORT_BUSY; |
| 555 | else |
| 556 | flags = SDHCI_CMD_RESP_SHORT; |
| 557 | |
| 558 | if (cmd->flags & MMC_RSP_CRC) |
| 559 | flags |= SDHCI_CMD_CRC; |
| 560 | if (cmd->flags & MMC_RSP_OPCODE) |
| 561 | flags |= SDHCI_CMD_INDEX; |
| 562 | if (cmd->data) |
| 563 | flags |= SDHCI_CMD_DATA; |
| 564 | |
Pierre Ossman | fb61e28 | 2006-07-11 21:06:48 +0200 | [diff] [blame] | 565 | writew(SDHCI_MAKE_CMD(cmd->opcode, flags), |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 566 | host->ioaddr + SDHCI_COMMAND); |
| 567 | } |
| 568 | |
| 569 | static void sdhci_finish_command(struct sdhci_host *host) |
| 570 | { |
| 571 | int i; |
| 572 | |
| 573 | BUG_ON(host->cmd == NULL); |
| 574 | |
| 575 | if (host->cmd->flags & MMC_RSP_PRESENT) { |
| 576 | if (host->cmd->flags & MMC_RSP_136) { |
| 577 | /* CRC is stripped so we need to do some shifting. */ |
| 578 | for (i = 0;i < 4;i++) { |
| 579 | host->cmd->resp[i] = readl(host->ioaddr + |
| 580 | SDHCI_RESPONSE + (3-i)*4) << 8; |
| 581 | if (i != 3) |
| 582 | host->cmd->resp[i] |= |
| 583 | readb(host->ioaddr + |
| 584 | SDHCI_RESPONSE + (3-i)*4-1); |
| 585 | } |
| 586 | } else { |
| 587 | host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE); |
| 588 | } |
| 589 | } |
| 590 | |
| 591 | host->cmd->error = MMC_ERR_NONE; |
| 592 | |
| 593 | DBG("Ending cmd (%x)\n", host->cmd->opcode); |
| 594 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 595 | if (host->cmd->data) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 596 | host->data = host->cmd->data; |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 597 | else |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 598 | tasklet_schedule(&host->finish_tasklet); |
| 599 | |
| 600 | host->cmd = NULL; |
| 601 | } |
| 602 | |
| 603 | static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) |
| 604 | { |
| 605 | int div; |
| 606 | u16 clk; |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 607 | unsigned long timeout; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 608 | |
| 609 | if (clock == host->clock) |
| 610 | return; |
| 611 | |
| 612 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| 613 | |
| 614 | if (clock == 0) |
| 615 | goto out; |
| 616 | |
| 617 | for (div = 1;div < 256;div *= 2) { |
| 618 | if ((host->max_clk / div) <= clock) |
| 619 | break; |
| 620 | } |
| 621 | div >>= 1; |
| 622 | |
| 623 | clk = div << SDHCI_DIVIDER_SHIFT; |
| 624 | clk |= SDHCI_CLOCK_INT_EN; |
| 625 | writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| 626 | |
| 627 | /* Wait max 10 ms */ |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 628 | timeout = 10; |
| 629 | while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL)) |
| 630 | & SDHCI_CLOCK_INT_STABLE)) { |
| 631 | if (timeout == 0) { |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 632 | printk(KERN_ERR "%s: Internal clock never " |
| 633 | "stabilised.\n", mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 634 | sdhci_dumpregs(host); |
| 635 | return; |
| 636 | } |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 637 | timeout--; |
| 638 | mdelay(1); |
| 639 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 640 | |
| 641 | clk |= SDHCI_CLOCK_CARD_EN; |
| 642 | writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| 643 | |
| 644 | out: |
| 645 | host->clock = clock; |
| 646 | } |
| 647 | |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 648 | static void sdhci_set_power(struct sdhci_host *host, unsigned short power) |
| 649 | { |
| 650 | u8 pwr; |
| 651 | |
| 652 | if (host->power == power) |
| 653 | return; |
| 654 | |
Darren Salt | 9e9dc5f | 2007-01-27 15:32:31 +0100 | [diff] [blame] | 655 | if (power == (unsigned short)-1) { |
| 656 | writeb(0, host->ioaddr + SDHCI_POWER_CONTROL); |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 657 | goto out; |
Darren Salt | 9e9dc5f | 2007-01-27 15:32:31 +0100 | [diff] [blame] | 658 | } |
| 659 | |
| 660 | /* |
| 661 | * Spec says that we should clear the power reg before setting |
| 662 | * a new value. Some controllers don't seem to like this though. |
| 663 | */ |
| 664 | if (!(host->chip->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) |
| 665 | writeb(0, host->ioaddr + SDHCI_POWER_CONTROL); |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 666 | |
| 667 | pwr = SDHCI_POWER_ON; |
| 668 | |
Philip Langdale | 4be34c9 | 2007-03-11 17:15:15 -0700 | [diff] [blame] | 669 | switch (1 << power) { |
Philip Langdale | 55556da | 2007-03-16 19:39:00 -0700 | [diff] [blame] | 670 | case MMC_VDD_165_195: |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 671 | pwr |= SDHCI_POWER_180; |
| 672 | break; |
Philip Langdale | 4be34c9 | 2007-03-11 17:15:15 -0700 | [diff] [blame] | 673 | case MMC_VDD_29_30: |
| 674 | case MMC_VDD_30_31: |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 675 | pwr |= SDHCI_POWER_300; |
| 676 | break; |
Philip Langdale | 4be34c9 | 2007-03-11 17:15:15 -0700 | [diff] [blame] | 677 | case MMC_VDD_32_33: |
| 678 | case MMC_VDD_33_34: |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 679 | pwr |= SDHCI_POWER_330; |
| 680 | break; |
| 681 | default: |
| 682 | BUG(); |
| 683 | } |
| 684 | |
| 685 | writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL); |
| 686 | |
| 687 | out: |
| 688 | host->power = power; |
| 689 | } |
| 690 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 691 | /*****************************************************************************\ |
| 692 | * * |
| 693 | * MMC callbacks * |
| 694 | * * |
| 695 | \*****************************************************************************/ |
| 696 | |
| 697 | static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 698 | { |
| 699 | struct sdhci_host *host; |
| 700 | unsigned long flags; |
| 701 | |
| 702 | host = mmc_priv(mmc); |
| 703 | |
| 704 | spin_lock_irqsave(&host->lock, flags); |
| 705 | |
| 706 | WARN_ON(host->mrq != NULL); |
| 707 | |
| 708 | sdhci_activate_led(host); |
| 709 | |
| 710 | host->mrq = mrq; |
| 711 | |
| 712 | if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { |
| 713 | host->mrq->cmd->error = MMC_ERR_TIMEOUT; |
| 714 | tasklet_schedule(&host->finish_tasklet); |
| 715 | } else |
| 716 | sdhci_send_command(host, mrq->cmd); |
| 717 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 718 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 719 | spin_unlock_irqrestore(&host->lock, flags); |
| 720 | } |
| 721 | |
| 722 | static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 723 | { |
| 724 | struct sdhci_host *host; |
| 725 | unsigned long flags; |
| 726 | u8 ctrl; |
| 727 | |
| 728 | host = mmc_priv(mmc); |
| 729 | |
| 730 | spin_lock_irqsave(&host->lock, flags); |
| 731 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 732 | /* |
| 733 | * Reset the chip on each power off. |
| 734 | * Should clear out any weird states. |
| 735 | */ |
| 736 | if (ios->power_mode == MMC_POWER_OFF) { |
| 737 | writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 738 | sdhci_init(host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 739 | } |
| 740 | |
| 741 | sdhci_set_clock(host, ios->clock); |
| 742 | |
| 743 | if (ios->power_mode == MMC_POWER_OFF) |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 744 | sdhci_set_power(host, -1); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 745 | else |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 746 | sdhci_set_power(host, ios->vdd); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 747 | |
| 748 | ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); |
Pierre Ossman | cd9277c | 2007-02-18 12:07:47 +0100 | [diff] [blame] | 749 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 750 | if (ios->bus_width == MMC_BUS_WIDTH_4) |
| 751 | ctrl |= SDHCI_CTRL_4BITBUS; |
| 752 | else |
| 753 | ctrl &= ~SDHCI_CTRL_4BITBUS; |
Pierre Ossman | cd9277c | 2007-02-18 12:07:47 +0100 | [diff] [blame] | 754 | |
| 755 | if (ios->timing == MMC_TIMING_SD_HS) |
| 756 | ctrl |= SDHCI_CTRL_HISPD; |
| 757 | else |
| 758 | ctrl &= ~SDHCI_CTRL_HISPD; |
| 759 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 760 | writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); |
| 761 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 762 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 763 | spin_unlock_irqrestore(&host->lock, flags); |
| 764 | } |
| 765 | |
| 766 | static int sdhci_get_ro(struct mmc_host *mmc) |
| 767 | { |
| 768 | struct sdhci_host *host; |
| 769 | unsigned long flags; |
| 770 | int present; |
| 771 | |
| 772 | host = mmc_priv(mmc); |
| 773 | |
| 774 | spin_lock_irqsave(&host->lock, flags); |
| 775 | |
| 776 | present = readl(host->ioaddr + SDHCI_PRESENT_STATE); |
| 777 | |
| 778 | spin_unlock_irqrestore(&host->lock, flags); |
| 779 | |
| 780 | return !(present & SDHCI_WRITE_PROTECT); |
| 781 | } |
| 782 | |
David Brownell | ab7aefd | 2006-11-12 17:55:30 -0800 | [diff] [blame] | 783 | static const struct mmc_host_ops sdhci_ops = { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 784 | .request = sdhci_request, |
| 785 | .set_ios = sdhci_set_ios, |
| 786 | .get_ro = sdhci_get_ro, |
| 787 | }; |
| 788 | |
| 789 | /*****************************************************************************\ |
| 790 | * * |
| 791 | * Tasklets * |
| 792 | * * |
| 793 | \*****************************************************************************/ |
| 794 | |
| 795 | static void sdhci_tasklet_card(unsigned long param) |
| 796 | { |
| 797 | struct sdhci_host *host; |
| 798 | unsigned long flags; |
| 799 | |
| 800 | host = (struct sdhci_host*)param; |
| 801 | |
| 802 | spin_lock_irqsave(&host->lock, flags); |
| 803 | |
| 804 | if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { |
| 805 | if (host->mrq) { |
| 806 | printk(KERN_ERR "%s: Card removed during transfer!\n", |
| 807 | mmc_hostname(host->mmc)); |
| 808 | printk(KERN_ERR "%s: Resetting controller.\n", |
| 809 | mmc_hostname(host->mmc)); |
| 810 | |
| 811 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 812 | sdhci_reset(host, SDHCI_RESET_DATA); |
| 813 | |
| 814 | host->mrq->cmd->error = MMC_ERR_FAILED; |
| 815 | tasklet_schedule(&host->finish_tasklet); |
| 816 | } |
| 817 | } |
| 818 | |
| 819 | spin_unlock_irqrestore(&host->lock, flags); |
| 820 | |
| 821 | mmc_detect_change(host->mmc, msecs_to_jiffies(500)); |
| 822 | } |
| 823 | |
| 824 | static void sdhci_tasklet_finish(unsigned long param) |
| 825 | { |
| 826 | struct sdhci_host *host; |
| 827 | unsigned long flags; |
| 828 | struct mmc_request *mrq; |
| 829 | |
| 830 | host = (struct sdhci_host*)param; |
| 831 | |
| 832 | spin_lock_irqsave(&host->lock, flags); |
| 833 | |
| 834 | del_timer(&host->timer); |
| 835 | |
| 836 | mrq = host->mrq; |
| 837 | |
| 838 | DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode); |
| 839 | |
| 840 | /* |
| 841 | * The controller needs a reset of internal state machines |
| 842 | * upon error conditions. |
| 843 | */ |
| 844 | if ((mrq->cmd->error != MMC_ERR_NONE) || |
| 845 | (mrq->data && ((mrq->data->error != MMC_ERR_NONE) || |
| 846 | (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) { |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 847 | |
| 848 | /* Some controllers need this kick or reset won't work here */ |
| 849 | if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { |
| 850 | unsigned int clock; |
| 851 | |
| 852 | /* This is to force an update */ |
| 853 | clock = host->clock; |
| 854 | host->clock = 0; |
| 855 | sdhci_set_clock(host, clock); |
| 856 | } |
| 857 | |
| 858 | /* Spec says we should do both at the same time, but Ricoh |
| 859 | controllers do not like that. */ |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 860 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 861 | sdhci_reset(host, SDHCI_RESET_DATA); |
| 862 | } |
| 863 | |
| 864 | host->mrq = NULL; |
| 865 | host->cmd = NULL; |
| 866 | host->data = NULL; |
| 867 | |
| 868 | sdhci_deactivate_led(host); |
| 869 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 870 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 871 | spin_unlock_irqrestore(&host->lock, flags); |
| 872 | |
| 873 | mmc_request_done(host->mmc, mrq); |
| 874 | } |
| 875 | |
| 876 | static void sdhci_timeout_timer(unsigned long data) |
| 877 | { |
| 878 | struct sdhci_host *host; |
| 879 | unsigned long flags; |
| 880 | |
| 881 | host = (struct sdhci_host*)data; |
| 882 | |
| 883 | spin_lock_irqsave(&host->lock, flags); |
| 884 | |
| 885 | if (host->mrq) { |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 886 | printk(KERN_ERR "%s: Timeout waiting for hardware " |
| 887 | "interrupt.\n", mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 888 | sdhci_dumpregs(host); |
| 889 | |
| 890 | if (host->data) { |
| 891 | host->data->error = MMC_ERR_TIMEOUT; |
| 892 | sdhci_finish_data(host); |
| 893 | } else { |
| 894 | if (host->cmd) |
| 895 | host->cmd->error = MMC_ERR_TIMEOUT; |
| 896 | else |
| 897 | host->mrq->cmd->error = MMC_ERR_TIMEOUT; |
| 898 | |
| 899 | tasklet_schedule(&host->finish_tasklet); |
| 900 | } |
| 901 | } |
| 902 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 903 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 904 | spin_unlock_irqrestore(&host->lock, flags); |
| 905 | } |
| 906 | |
| 907 | /*****************************************************************************\ |
| 908 | * * |
| 909 | * Interrupt handling * |
| 910 | * * |
| 911 | \*****************************************************************************/ |
| 912 | |
| 913 | static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) |
| 914 | { |
| 915 | BUG_ON(intmask == 0); |
| 916 | |
| 917 | if (!host->cmd) { |
| 918 | printk(KERN_ERR "%s: Got command interrupt even though no " |
| 919 | "command operation was in progress.\n", |
| 920 | mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 921 | sdhci_dumpregs(host); |
| 922 | return; |
| 923 | } |
| 924 | |
Pierre Ossman | 43b58b3 | 2007-07-25 23:15:27 +0200 | [diff] [blame^] | 925 | if (intmask & SDHCI_INT_TIMEOUT) |
| 926 | host->cmd->error = MMC_ERR_TIMEOUT; |
| 927 | else if (intmask & SDHCI_INT_CRC) |
| 928 | host->cmd->error = MMC_ERR_BADCRC; |
| 929 | else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX)) |
| 930 | host->cmd->error = MMC_ERR_FAILED; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 931 | |
Pierre Ossman | 43b58b3 | 2007-07-25 23:15:27 +0200 | [diff] [blame^] | 932 | if (host->cmd->error != MMC_ERR_NONE) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 933 | tasklet_schedule(&host->finish_tasklet); |
Pierre Ossman | 43b58b3 | 2007-07-25 23:15:27 +0200 | [diff] [blame^] | 934 | else if (intmask & SDHCI_INT_RESPONSE) |
| 935 | sdhci_finish_command(host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 936 | } |
| 937 | |
| 938 | static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) |
| 939 | { |
| 940 | BUG_ON(intmask == 0); |
| 941 | |
| 942 | if (!host->data) { |
| 943 | /* |
| 944 | * A data end interrupt is sent together with the response |
| 945 | * for the stop command. |
| 946 | */ |
| 947 | if (intmask & SDHCI_INT_DATA_END) |
| 948 | return; |
| 949 | |
| 950 | printk(KERN_ERR "%s: Got data interrupt even though no " |
| 951 | "data operation was in progress.\n", |
| 952 | mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 953 | sdhci_dumpregs(host); |
| 954 | |
| 955 | return; |
| 956 | } |
| 957 | |
| 958 | if (intmask & SDHCI_INT_DATA_TIMEOUT) |
| 959 | host->data->error = MMC_ERR_TIMEOUT; |
| 960 | else if (intmask & SDHCI_INT_DATA_CRC) |
| 961 | host->data->error = MMC_ERR_BADCRC; |
| 962 | else if (intmask & SDHCI_INT_DATA_END_BIT) |
| 963 | host->data->error = MMC_ERR_FAILED; |
| 964 | |
| 965 | if (host->data->error != MMC_ERR_NONE) |
| 966 | sdhci_finish_data(host); |
| 967 | else { |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 968 | if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 969 | sdhci_transfer_pio(host); |
| 970 | |
Pierre Ossman | 6ba736a | 2007-05-13 22:39:23 +0200 | [diff] [blame] | 971 | /* |
| 972 | * We currently don't do anything fancy with DMA |
| 973 | * boundaries, but as we can't disable the feature |
| 974 | * we need to at least restart the transfer. |
| 975 | */ |
| 976 | if (intmask & SDHCI_INT_DMA_END) |
| 977 | writel(readl(host->ioaddr + SDHCI_DMA_ADDRESS), |
| 978 | host->ioaddr + SDHCI_DMA_ADDRESS); |
| 979 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 980 | if (intmask & SDHCI_INT_DATA_END) |
| 981 | sdhci_finish_data(host); |
| 982 | } |
| 983 | } |
| 984 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 985 | static irqreturn_t sdhci_irq(int irq, void *dev_id) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 986 | { |
| 987 | irqreturn_t result; |
| 988 | struct sdhci_host* host = dev_id; |
| 989 | u32 intmask; |
| 990 | |
| 991 | spin_lock(&host->lock); |
| 992 | |
| 993 | intmask = readl(host->ioaddr + SDHCI_INT_STATUS); |
| 994 | |
Mark Lord | 62df67a5 | 2007-03-06 13:30:13 +0100 | [diff] [blame] | 995 | if (!intmask || intmask == 0xffffffff) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 996 | result = IRQ_NONE; |
| 997 | goto out; |
| 998 | } |
| 999 | |
| 1000 | DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask); |
| 1001 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1002 | if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { |
| 1003 | writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE), |
| 1004 | host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1005 | tasklet_schedule(&host->card_tasklet); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1006 | } |
| 1007 | |
| 1008 | intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1009 | |
| 1010 | if (intmask & SDHCI_INT_CMD_MASK) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1011 | writel(intmask & SDHCI_INT_CMD_MASK, |
| 1012 | host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1013 | sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1014 | } |
| 1015 | |
| 1016 | if (intmask & SDHCI_INT_DATA_MASK) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1017 | writel(intmask & SDHCI_INT_DATA_MASK, |
| 1018 | host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1019 | sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1020 | } |
| 1021 | |
| 1022 | intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); |
| 1023 | |
Pierre Ossman | 964f9ce | 2007-07-20 18:20:36 +0200 | [diff] [blame] | 1024 | intmask &= ~SDHCI_INT_ERROR; |
| 1025 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1026 | if (intmask & SDHCI_INT_BUS_POWER) { |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1027 | printk(KERN_ERR "%s: Card is consuming too much power!\n", |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1028 | mmc_hostname(host->mmc)); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1029 | writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1030 | } |
| 1031 | |
Rolf Eike Beer | 9d26a5d | 2007-06-26 13:31:16 +0200 | [diff] [blame] | 1032 | intmask &= ~SDHCI_INT_BUS_POWER; |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1033 | |
| 1034 | if (intmask) { |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 1035 | printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n", |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1036 | mmc_hostname(host->mmc), intmask); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1037 | sdhci_dumpregs(host); |
| 1038 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1039 | writel(intmask, host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 1040 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1041 | |
| 1042 | result = IRQ_HANDLED; |
| 1043 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 1044 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1045 | out: |
| 1046 | spin_unlock(&host->lock); |
| 1047 | |
| 1048 | return result; |
| 1049 | } |
| 1050 | |
| 1051 | /*****************************************************************************\ |
| 1052 | * * |
| 1053 | * Suspend/resume * |
| 1054 | * * |
| 1055 | \*****************************************************************************/ |
| 1056 | |
| 1057 | #ifdef CONFIG_PM |
| 1058 | |
| 1059 | static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state) |
| 1060 | { |
| 1061 | struct sdhci_chip *chip; |
| 1062 | int i, ret; |
| 1063 | |
| 1064 | chip = pci_get_drvdata(pdev); |
| 1065 | if (!chip) |
| 1066 | return 0; |
| 1067 | |
| 1068 | DBG("Suspending...\n"); |
| 1069 | |
| 1070 | for (i = 0;i < chip->num_slots;i++) { |
| 1071 | if (!chip->hosts[i]) |
| 1072 | continue; |
| 1073 | ret = mmc_suspend_host(chip->hosts[i]->mmc, state); |
| 1074 | if (ret) { |
| 1075 | for (i--;i >= 0;i--) |
| 1076 | mmc_resume_host(chip->hosts[i]->mmc); |
| 1077 | return ret; |
| 1078 | } |
| 1079 | } |
| 1080 | |
| 1081 | pci_save_state(pdev); |
| 1082 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); |
Pierre Ossman | a715dfc | 2007-03-06 13:38:49 +0100 | [diff] [blame] | 1083 | |
| 1084 | for (i = 0;i < chip->num_slots;i++) { |
| 1085 | if (!chip->hosts[i]) |
| 1086 | continue; |
| 1087 | free_irq(chip->hosts[i]->irq, chip->hosts[i]); |
| 1088 | } |
| 1089 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1090 | pci_disable_device(pdev); |
| 1091 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
| 1092 | |
| 1093 | return 0; |
| 1094 | } |
| 1095 | |
| 1096 | static int sdhci_resume (struct pci_dev *pdev) |
| 1097 | { |
| 1098 | struct sdhci_chip *chip; |
| 1099 | int i, ret; |
| 1100 | |
| 1101 | chip = pci_get_drvdata(pdev); |
| 1102 | if (!chip) |
| 1103 | return 0; |
| 1104 | |
| 1105 | DBG("Resuming...\n"); |
| 1106 | |
| 1107 | pci_set_power_state(pdev, PCI_D0); |
| 1108 | pci_restore_state(pdev); |
Pierre Ossman | df1c4b7 | 2007-01-30 07:55:15 +0100 | [diff] [blame] | 1109 | ret = pci_enable_device(pdev); |
| 1110 | if (ret) |
| 1111 | return ret; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1112 | |
| 1113 | for (i = 0;i < chip->num_slots;i++) { |
| 1114 | if (!chip->hosts[i]) |
| 1115 | continue; |
| 1116 | if (chip->hosts[i]->flags & SDHCI_USE_DMA) |
| 1117 | pci_set_master(pdev); |
Pierre Ossman | a715dfc | 2007-03-06 13:38:49 +0100 | [diff] [blame] | 1118 | ret = request_irq(chip->hosts[i]->irq, sdhci_irq, |
| 1119 | IRQF_SHARED, chip->hosts[i]->slot_descr, |
| 1120 | chip->hosts[i]); |
| 1121 | if (ret) |
| 1122 | return ret; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1123 | sdhci_init(chip->hosts[i]); |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 1124 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1125 | ret = mmc_resume_host(chip->hosts[i]->mmc); |
| 1126 | if (ret) |
| 1127 | return ret; |
| 1128 | } |
| 1129 | |
| 1130 | return 0; |
| 1131 | } |
| 1132 | |
| 1133 | #else /* CONFIG_PM */ |
| 1134 | |
| 1135 | #define sdhci_suspend NULL |
| 1136 | #define sdhci_resume NULL |
| 1137 | |
| 1138 | #endif /* CONFIG_PM */ |
| 1139 | |
| 1140 | /*****************************************************************************\ |
| 1141 | * * |
| 1142 | * Device probing/removal * |
| 1143 | * * |
| 1144 | \*****************************************************************************/ |
| 1145 | |
| 1146 | static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot) |
| 1147 | { |
| 1148 | int ret; |
Pierre Ossman | 4a96550 | 2006-06-30 02:22:29 -0700 | [diff] [blame] | 1149 | unsigned int version; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1150 | struct sdhci_chip *chip; |
| 1151 | struct mmc_host *mmc; |
| 1152 | struct sdhci_host *host; |
| 1153 | |
| 1154 | u8 first_bar; |
| 1155 | unsigned int caps; |
| 1156 | |
| 1157 | chip = pci_get_drvdata(pdev); |
| 1158 | BUG_ON(!chip); |
| 1159 | |
| 1160 | ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); |
| 1161 | if (ret) |
| 1162 | return ret; |
| 1163 | |
| 1164 | first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; |
| 1165 | |
| 1166 | if (first_bar > 5) { |
| 1167 | printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n"); |
| 1168 | return -ENODEV; |
| 1169 | } |
| 1170 | |
| 1171 | if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) { |
| 1172 | printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n"); |
| 1173 | return -ENODEV; |
| 1174 | } |
| 1175 | |
| 1176 | if (pci_resource_len(pdev, first_bar + slot) != 0x100) { |
Pierre Ossman | a98087c | 2006-12-07 19:17:20 +0100 | [diff] [blame] | 1177 | printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. " |
| 1178 | "You may experience problems.\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1179 | } |
| 1180 | |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1181 | if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { |
| 1182 | printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n"); |
| 1183 | return -ENODEV; |
| 1184 | } |
| 1185 | |
| 1186 | if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) { |
| 1187 | printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n"); |
| 1188 | return -ENODEV; |
| 1189 | } |
| 1190 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1191 | mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev); |
| 1192 | if (!mmc) |
| 1193 | return -ENOMEM; |
| 1194 | |
| 1195 | host = mmc_priv(mmc); |
| 1196 | host->mmc = mmc; |
| 1197 | |
Pierre Ossman | 8a4da14 | 2006-10-04 02:15:40 -0700 | [diff] [blame] | 1198 | host->chip = chip; |
| 1199 | chip->hosts[slot] = host; |
| 1200 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1201 | host->bar = first_bar + slot; |
| 1202 | |
| 1203 | host->addr = pci_resource_start(pdev, host->bar); |
| 1204 | host->irq = pdev->irq; |
| 1205 | |
| 1206 | DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq); |
| 1207 | |
| 1208 | snprintf(host->slot_descr, 20, "sdhci:slot%d", slot); |
| 1209 | |
| 1210 | ret = pci_request_region(pdev, host->bar, host->slot_descr); |
| 1211 | if (ret) |
| 1212 | goto free; |
| 1213 | |
| 1214 | host->ioaddr = ioremap_nocache(host->addr, |
| 1215 | pci_resource_len(pdev, host->bar)); |
| 1216 | if (!host->ioaddr) { |
| 1217 | ret = -ENOMEM; |
| 1218 | goto release; |
| 1219 | } |
| 1220 | |
Pierre Ossman | d96649e | 2006-06-30 02:22:30 -0700 | [diff] [blame] | 1221 | sdhci_reset(host, SDHCI_RESET_ALL); |
| 1222 | |
Pierre Ossman | 4a96550 | 2006-06-30 02:22:29 -0700 | [diff] [blame] | 1223 | version = readw(host->ioaddr + SDHCI_HOST_VERSION); |
| 1224 | version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; |
| 1225 | if (version != 0) { |
| 1226 | printk(KERN_ERR "%s: Unknown controller version (%d). " |
Pierre Ossman | 8b1b218 | 2006-07-11 21:07:10 +0200 | [diff] [blame] | 1227 | "You may experience problems.\n", host->slot_descr, |
Pierre Ossman | 4a96550 | 2006-06-30 02:22:29 -0700 | [diff] [blame] | 1228 | version); |
Pierre Ossman | 4a96550 | 2006-06-30 02:22:29 -0700 | [diff] [blame] | 1229 | } |
| 1230 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1231 | caps = readl(host->ioaddr + SDHCI_CAPABILITIES); |
| 1232 | |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1233 | if (debug_nodma) |
| 1234 | DBG("DMA forced off\n"); |
| 1235 | else if (debug_forcedma) { |
| 1236 | DBG("DMA forced on\n"); |
| 1237 | host->flags |= SDHCI_USE_DMA; |
Pierre Ossman | 9860807 | 2006-06-30 02:22:34 -0700 | [diff] [blame] | 1238 | } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA) |
| 1239 | host->flags |= SDHCI_USE_DMA; |
| 1240 | else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1241 | DBG("Controller doesn't have DMA interface\n"); |
| 1242 | else if (!(caps & SDHCI_CAN_DO_DMA)) |
| 1243 | DBG("Controller doesn't have DMA capability\n"); |
| 1244 | else |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1245 | host->flags |= SDHCI_USE_DMA; |
| 1246 | |
| 1247 | if (host->flags & SDHCI_USE_DMA) { |
| 1248 | if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { |
| 1249 | printk(KERN_WARNING "%s: No suitable DMA available. " |
| 1250 | "Falling back to PIO.\n", host->slot_descr); |
| 1251 | host->flags &= ~SDHCI_USE_DMA; |
| 1252 | } |
| 1253 | } |
| 1254 | |
| 1255 | if (host->flags & SDHCI_USE_DMA) |
| 1256 | pci_set_master(pdev); |
| 1257 | else /* XXX: Hack to get MMC layer to avoid highmem */ |
| 1258 | pdev->dma_mask = 0; |
| 1259 | |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 1260 | host->max_clk = |
| 1261 | (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; |
| 1262 | if (host->max_clk == 0) { |
| 1263 | printk(KERN_ERR "%s: Hardware doesn't specify base clock " |
| 1264 | "frequency.\n", host->slot_descr); |
| 1265 | ret = -ENODEV; |
| 1266 | goto unmap; |
| 1267 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1268 | host->max_clk *= 1000000; |
| 1269 | |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 1270 | host->timeout_clk = |
| 1271 | (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; |
| 1272 | if (host->timeout_clk == 0) { |
| 1273 | printk(KERN_ERR "%s: Hardware doesn't specify timeout clock " |
| 1274 | "frequency.\n", host->slot_descr); |
| 1275 | ret = -ENODEV; |
| 1276 | goto unmap; |
| 1277 | } |
| 1278 | if (caps & SDHCI_TIMEOUT_CLK_UNIT) |
| 1279 | host->timeout_clk *= 1000; |
| 1280 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1281 | /* |
| 1282 | * Set host parameters. |
| 1283 | */ |
| 1284 | mmc->ops = &sdhci_ops; |
| 1285 | mmc->f_min = host->max_clk / 256; |
| 1286 | mmc->f_max = host->max_clk; |
Russell King | 42431ac | 2006-09-24 10:44:09 +0100 | [diff] [blame] | 1287 | mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1288 | |
Pierre Ossman | cd9277c | 2007-02-18 12:07:47 +0100 | [diff] [blame] | 1289 | if (caps & SDHCI_CAN_DO_HISPD) |
| 1290 | mmc->caps |= MMC_CAP_SD_HIGHSPEED; |
| 1291 | |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1292 | mmc->ocr_avail = 0; |
| 1293 | if (caps & SDHCI_CAN_VDD_330) |
| 1294 | mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34; |
Pierre Ossman | c70840e | 2007-02-02 22:41:41 +0100 | [diff] [blame] | 1295 | if (caps & SDHCI_CAN_VDD_300) |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1296 | mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31; |
Pierre Ossman | c70840e | 2007-02-02 22:41:41 +0100 | [diff] [blame] | 1297 | if (caps & SDHCI_CAN_VDD_180) |
Philip Langdale | 55556da | 2007-03-16 19:39:00 -0700 | [diff] [blame] | 1298 | mmc->ocr_avail |= MMC_VDD_165_195; |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1299 | |
| 1300 | if (mmc->ocr_avail == 0) { |
| 1301 | printk(KERN_ERR "%s: Hardware doesn't report any " |
| 1302 | "support voltages.\n", host->slot_descr); |
| 1303 | ret = -ENODEV; |
| 1304 | goto unmap; |
| 1305 | } |
| 1306 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1307 | spin_lock_init(&host->lock); |
| 1308 | |
| 1309 | /* |
| 1310 | * Maximum number of segments. Hardware cannot do scatter lists. |
| 1311 | */ |
| 1312 | if (host->flags & SDHCI_USE_DMA) |
| 1313 | mmc->max_hw_segs = 1; |
| 1314 | else |
| 1315 | mmc->max_hw_segs = 16; |
| 1316 | mmc->max_phys_segs = 16; |
| 1317 | |
| 1318 | /* |
Pierre Ossman | bab7696 | 2006-07-02 16:51:35 +0100 | [diff] [blame] | 1319 | * Maximum number of sectors in one transfer. Limited by DMA boundary |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 1320 | * size (512KiB). |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1321 | */ |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 1322 | mmc->max_req_size = 524288; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1323 | |
| 1324 | /* |
| 1325 | * Maximum segment size. Could be one segment with the maximum number |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 1326 | * of bytes. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1327 | */ |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 1328 | mmc->max_seg_size = mmc->max_req_size; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1329 | |
| 1330 | /* |
Pierre Ossman | fe4a3c7 | 2006-11-21 17:54:23 +0100 | [diff] [blame] | 1331 | * Maximum block size. This varies from controller to controller and |
| 1332 | * is specified in the capabilities register. |
| 1333 | */ |
| 1334 | mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT; |
| 1335 | if (mmc->max_blk_size >= 3) { |
| 1336 | printk(KERN_ERR "%s: Invalid maximum block size.\n", |
| 1337 | host->slot_descr); |
| 1338 | ret = -ENODEV; |
| 1339 | goto unmap; |
| 1340 | } |
| 1341 | mmc->max_blk_size = 512 << mmc->max_blk_size; |
| 1342 | |
| 1343 | /* |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 1344 | * Maximum block count. |
| 1345 | */ |
| 1346 | mmc->max_blk_count = 65535; |
| 1347 | |
| 1348 | /* |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1349 | * Init tasklets. |
| 1350 | */ |
| 1351 | tasklet_init(&host->card_tasklet, |
| 1352 | sdhci_tasklet_card, (unsigned long)host); |
| 1353 | tasklet_init(&host->finish_tasklet, |
| 1354 | sdhci_tasklet_finish, (unsigned long)host); |
| 1355 | |
Al Viro | e4cad1b | 2006-10-10 22:47:07 +0100 | [diff] [blame] | 1356 | setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1357 | |
Thomas Gleixner | dace145 | 2006-07-01 19:29:38 -0700 | [diff] [blame] | 1358 | ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1359 | host->slot_descr, host); |
| 1360 | if (ret) |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 1361 | goto untasklet; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1362 | |
| 1363 | sdhci_init(host); |
| 1364 | |
| 1365 | #ifdef CONFIG_MMC_DEBUG |
| 1366 | sdhci_dumpregs(host); |
| 1367 | #endif |
| 1368 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 1369 | mmiowb(); |
| 1370 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1371 | mmc_add_host(mmc); |
| 1372 | |
| 1373 | printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc), |
| 1374 | host->addr, host->irq, |
| 1375 | (host->flags & SDHCI_USE_DMA)?"DMA":"PIO"); |
| 1376 | |
| 1377 | return 0; |
| 1378 | |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 1379 | untasklet: |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1380 | tasklet_kill(&host->card_tasklet); |
| 1381 | tasklet_kill(&host->finish_tasklet); |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 1382 | unmap: |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1383 | iounmap(host->ioaddr); |
| 1384 | release: |
| 1385 | pci_release_region(pdev, host->bar); |
| 1386 | free: |
| 1387 | mmc_free_host(mmc); |
| 1388 | |
| 1389 | return ret; |
| 1390 | } |
| 1391 | |
| 1392 | static void sdhci_remove_slot(struct pci_dev *pdev, int slot) |
| 1393 | { |
| 1394 | struct sdhci_chip *chip; |
| 1395 | struct mmc_host *mmc; |
| 1396 | struct sdhci_host *host; |
| 1397 | |
| 1398 | chip = pci_get_drvdata(pdev); |
| 1399 | host = chip->hosts[slot]; |
| 1400 | mmc = host->mmc; |
| 1401 | |
| 1402 | chip->hosts[slot] = NULL; |
| 1403 | |
| 1404 | mmc_remove_host(mmc); |
| 1405 | |
| 1406 | sdhci_reset(host, SDHCI_RESET_ALL); |
| 1407 | |
| 1408 | free_irq(host->irq, host); |
| 1409 | |
| 1410 | del_timer_sync(&host->timer); |
| 1411 | |
| 1412 | tasklet_kill(&host->card_tasklet); |
| 1413 | tasklet_kill(&host->finish_tasklet); |
| 1414 | |
| 1415 | iounmap(host->ioaddr); |
| 1416 | |
| 1417 | pci_release_region(pdev, host->bar); |
| 1418 | |
| 1419 | mmc_free_host(mmc); |
| 1420 | } |
| 1421 | |
| 1422 | static int __devinit sdhci_probe(struct pci_dev *pdev, |
| 1423 | const struct pci_device_id *ent) |
| 1424 | { |
| 1425 | int ret, i; |
Pierre Ossman | 51f82bc | 2006-06-30 02:22:22 -0700 | [diff] [blame] | 1426 | u8 slots, rev; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1427 | struct sdhci_chip *chip; |
| 1428 | |
| 1429 | BUG_ON(pdev == NULL); |
| 1430 | BUG_ON(ent == NULL); |
| 1431 | |
Pierre Ossman | 51f82bc | 2006-06-30 02:22:22 -0700 | [diff] [blame] | 1432 | pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev); |
| 1433 | |
| 1434 | printk(KERN_INFO DRIVER_NAME |
| 1435 | ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n", |
| 1436 | pci_name(pdev), (int)pdev->vendor, (int)pdev->device, |
| 1437 | (int)rev); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1438 | |
| 1439 | ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); |
| 1440 | if (ret) |
| 1441 | return ret; |
| 1442 | |
| 1443 | slots = PCI_SLOT_INFO_SLOTS(slots) + 1; |
| 1444 | DBG("found %d slot(s)\n", slots); |
| 1445 | if (slots == 0) |
| 1446 | return -ENODEV; |
| 1447 | |
| 1448 | ret = pci_enable_device(pdev); |
| 1449 | if (ret) |
| 1450 | return ret; |
| 1451 | |
| 1452 | chip = kzalloc(sizeof(struct sdhci_chip) + |
| 1453 | sizeof(struct sdhci_host*) * slots, GFP_KERNEL); |
| 1454 | if (!chip) { |
| 1455 | ret = -ENOMEM; |
| 1456 | goto err; |
| 1457 | } |
| 1458 | |
| 1459 | chip->pdev = pdev; |
Pierre Ossman | df673b2 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1460 | chip->quirks = ent->driver_data; |
| 1461 | |
| 1462 | if (debug_quirks) |
| 1463 | chip->quirks = debug_quirks; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1464 | |
| 1465 | chip->num_slots = slots; |
| 1466 | pci_set_drvdata(pdev, chip); |
| 1467 | |
| 1468 | for (i = 0;i < slots;i++) { |
| 1469 | ret = sdhci_probe_slot(pdev, i); |
| 1470 | if (ret) { |
| 1471 | for (i--;i >= 0;i--) |
| 1472 | sdhci_remove_slot(pdev, i); |
| 1473 | goto free; |
| 1474 | } |
| 1475 | } |
| 1476 | |
| 1477 | return 0; |
| 1478 | |
| 1479 | free: |
| 1480 | pci_set_drvdata(pdev, NULL); |
| 1481 | kfree(chip); |
| 1482 | |
| 1483 | err: |
| 1484 | pci_disable_device(pdev); |
| 1485 | return ret; |
| 1486 | } |
| 1487 | |
| 1488 | static void __devexit sdhci_remove(struct pci_dev *pdev) |
| 1489 | { |
| 1490 | int i; |
| 1491 | struct sdhci_chip *chip; |
| 1492 | |
| 1493 | chip = pci_get_drvdata(pdev); |
| 1494 | |
| 1495 | if (chip) { |
| 1496 | for (i = 0;i < chip->num_slots;i++) |
| 1497 | sdhci_remove_slot(pdev, i); |
| 1498 | |
| 1499 | pci_set_drvdata(pdev, NULL); |
| 1500 | |
| 1501 | kfree(chip); |
| 1502 | } |
| 1503 | |
| 1504 | pci_disable_device(pdev); |
| 1505 | } |
| 1506 | |
| 1507 | static struct pci_driver sdhci_driver = { |
| 1508 | .name = DRIVER_NAME, |
| 1509 | .id_table = pci_ids, |
| 1510 | .probe = sdhci_probe, |
| 1511 | .remove = __devexit_p(sdhci_remove), |
| 1512 | .suspend = sdhci_suspend, |
| 1513 | .resume = sdhci_resume, |
| 1514 | }; |
| 1515 | |
| 1516 | /*****************************************************************************\ |
| 1517 | * * |
| 1518 | * Driver init/exit * |
| 1519 | * * |
| 1520 | \*****************************************************************************/ |
| 1521 | |
| 1522 | static int __init sdhci_drv_init(void) |
| 1523 | { |
| 1524 | printk(KERN_INFO DRIVER_NAME |
Pierre Ossman | 52fbf9c | 2007-02-09 08:23:41 +0100 | [diff] [blame] | 1525 | ": Secure Digital Host Controller Interface driver\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1526 | printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); |
| 1527 | |
| 1528 | return pci_register_driver(&sdhci_driver); |
| 1529 | } |
| 1530 | |
| 1531 | static void __exit sdhci_drv_exit(void) |
| 1532 | { |
| 1533 | DBG("Exiting\n"); |
| 1534 | |
| 1535 | pci_unregister_driver(&sdhci_driver); |
| 1536 | } |
| 1537 | |
| 1538 | module_init(sdhci_drv_init); |
| 1539 | module_exit(sdhci_drv_exit); |
| 1540 | |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1541 | module_param(debug_nodma, uint, 0444); |
| 1542 | module_param(debug_forcedma, uint, 0444); |
Pierre Ossman | df673b2 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1543 | module_param(debug_quirks, uint, 0444); |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1544 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1545 | MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); |
| 1546 | MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1547 | MODULE_LICENSE("GPL"); |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1548 | |
| 1549 | MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)"); |
| 1550 | MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)"); |
Pierre Ossman | df673b2 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 1551 | MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); |