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Aneesh V7ec94452012-04-27 17:54:05 +05301#
2# Memory devices
3#
4
5menuconfig MEMORY
6 bool "Memory Controller drivers"
7
8if MEMORY
9
Alexandre Bellonie81b6ab2014-07-08 18:21:12 +020010config ATMEL_SDRAMC
11 bool "Atmel (Multi-port DDR-)SDRAM Controller"
12 default y
13 depends on ARCH_AT91 && OF
14 help
15 This driver is for Atmel SDRAM Controller or Atmel Multi-port
16 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
17 Starting with the at91sam9g45, this controller supports SDR, DDR and
18 LP-DDR memories.
19
Ivan Khoronzhuk5a7c8152014-02-24 19:26:11 +020020config TI_AEMIF
21 tristate "Texas Instruments AEMIF driver"
22 depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
23 help
24 This driver is for the AEMIF module available in Texas Instruments
25 SoCs. AEMIF stands for Asynchronous External Memory Interface and
26 is intended to provide a glue-less interface to a variety of
27 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
28 of 256M bytes of any of these memories can be accessed at a given
29 time via four chip selects with 64M byte access per chip select.
30
Aneesh V7ec94452012-04-27 17:54:05 +053031config TI_EMIF
32 tristate "Texas Instruments EMIF driver"
Santosh Shilimkar18e9a972012-05-04 11:38:11 +053033 depends on ARCH_OMAP2PLUS
Aneesh V7ec94452012-04-27 17:54:05 +053034 select DDR
35 help
36 This driver is for the EMIF module available in Texas Instruments
37 SoCs. EMIF is an SDRAM controller that, based on its revision,
38 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
39 This driver takes care of only LPDDR2 memories presently. The
40 functions of the driver includes re-configuring AC timing
41 parameters and other settings during frequency, voltage and
42 temperature changes
43
Tony Lindgren18640192014-11-20 09:13:42 -080044config OMAP_GPMC
45 bool
46 help
47 This driver is for the General Purpose Memory Controller (GPMC)
48 present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
49 interfacing to a variety of asynchronous as well as synchronous
50 memory drives like NOR, NAND, OneNAND, SRAM.
51
Ezequiel Garcia3edad322013-04-23 16:21:26 -030052config MVEBU_DEVBUS
53 bool "Marvell EBU Device Bus Controller"
54 default y
55 depends on PLAT_ORION && OF
56 help
57 This driver is for the Device Bus controller available in some
58 Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
59 Armada 370 and Armada XP. This controller allows to handle flash
60 devices such as NOR, NAND, SRAM, and FPGA.
61
Hiroshi DOYUc542fb72012-05-10 10:42:30 +030062config TEGRA20_MC
Hiroshi DOYUf0e33f92012-05-11 09:56:24 +030063 bool "Tegra20 Memory Controller(MC) driver"
64 default y
Hiroshi DOYUc542fb72012-05-10 10:42:30 +030065 depends on ARCH_TEGRA_2x_SOC
Hiroshi DOYUf0e33f92012-05-11 09:56:24 +030066 help
67 This driver is for the Memory Controller(MC) module available
68 in Tegra20 SoCs, mainly for a address translation fault
69 analysis, especially for IOMMU/GART(Graphics Address
70 Relocation Table) module.
Hiroshi DOYUc542fb72012-05-10 10:42:30 +030071
Scott Wood54afbec2014-07-02 18:52:11 -050072config FSL_CORENET_CF
73 tristate "Freescale CoreNet Error Reporting"
74 depends on FSL_SOC_BOOKE
75 help
76 Say Y for reporting of errors from the Freescale CoreNet
77 Coherency Fabric. Errors reported include accesses to
78 physical addresses that mapped by no local access window
79 (LAW) or an invalid LAW, as well as bad cache state that
80 represents a coherency violation.
81
Paul Gortmaker42d87b12014-02-19 17:46:40 -050082config FSL_IFC
83 bool
84 depends on FSL_SOC
85
Thierry Reding89184652014-04-16 09:24:44 +020086source "drivers/memory/tegra/Kconfig"
87
Aneesh V7ec94452012-04-27 17:54:05 +053088endif