| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: arch/blackfin/lib/ins.S |
| 3 | * Based on: |
| 4 | * Author: Bas Vermeulen <bas@buyways.nl> |
| 5 | * |
| 6 | * Created: Tue Mar 22 15:27:24 CEST 2005 |
| 7 | * Description: Implementation of ins{bwl} for BlackFin processors using zero overhead loops. |
| 8 | * |
| 9 | * Modified: |
| 10 | * Copyright 2004-2006 Analog Devices Inc. |
| 11 | * Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl> |
| 12 | * |
| 13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2 of the License, or |
| 18 | * (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, see the file COPYING, or write |
| 27 | * to the Free Software Foundation, Inc., |
| 28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 29 | */ |
| 30 | |
| 31 | #include <linux/linkage.h> |
| Michael Hennerich | 8af10b7 | 2007-05-21 18:09:09 +0800 | [diff] [blame] | 32 | #include <asm/blackfin.h> |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 33 | |
| 34 | .align 2 |
| 35 | |
| 36 | ENTRY(_insl) |
| 37 | P0 = R0; /* P0 = port */ |
| 38 | cli R3; |
| 39 | P1 = R1; /* P1 = address */ |
| 40 | P2 = R2; /* P2 = count */ |
| 41 | SSYNC; |
| 42 | LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; |
| Michael Hennerich | 8af10b7 | 2007-05-21 18:09:09 +0800 | [diff] [blame] | 43 | .Llong_loop_s: R0 = [P0]; |
| 44 | [P1++] = R0; |
| 45 | NOP; |
| 46 | .Llong_loop_e: NOP; |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 47 | sti R3; |
| 48 | RTS; |
| Mike Frysinger | 51be24c | 2007-06-11 15:31:30 +0800 | [diff] [blame] | 49 | ENDPROC(_insl) |
| Michael Hennerich | 8af10b7 | 2007-05-21 18:09:09 +0800 | [diff] [blame] | 50 | |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 51 | ENTRY(_insw) |
| 52 | P0 = R0; /* P0 = port */ |
| 53 | cli R3; |
| 54 | P1 = R1; /* P1 = address */ |
| 55 | P2 = R2; /* P2 = count */ |
| 56 | SSYNC; |
| 57 | LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; |
| Michael Hennerich | 8af10b7 | 2007-05-21 18:09:09 +0800 | [diff] [blame] | 58 | .Lword_loop_s: R0 = W[P0]; |
| 59 | W[P1++] = R0; |
| 60 | NOP; |
| 61 | .Lword_loop_e: NOP; |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 62 | sti R3; |
| 63 | RTS; |
| Mike Frysinger | 51be24c | 2007-06-11 15:31:30 +0800 | [diff] [blame] | 64 | ENDPROC(_insw) |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 65 | |
| 66 | ENTRY(_insb) |
| 67 | P0 = R0; /* P0 = port */ |
| 68 | cli R3; |
| 69 | P1 = R1; /* P1 = address */ |
| 70 | P2 = R2; /* P2 = count */ |
| 71 | SSYNC; |
| 72 | LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; |
| Michael Hennerich | 8af10b7 | 2007-05-21 18:09:09 +0800 | [diff] [blame] | 73 | .Lbyte_loop_s: R0 = B[P0]; |
| 74 | B[P1++] = R0; |
| 75 | NOP; |
| 76 | .Lbyte_loop_e: NOP; |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 77 | sti R3; |
| 78 | RTS; |
| Mike Frysinger | 51be24c | 2007-06-11 15:31:30 +0800 | [diff] [blame] | 79 | ENDPROC(_insb) |