Blame - drivers/edac/Kconfig - kernel/msm-4.9

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Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	1	#
				2	# EDAC Kconfig
				3	# Copyright (c) 2003 Linux Networx
				4	# Licensed and distributed under the GPL
				5	#
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	6
Jan Engelhardt	751cb5e	2007-07-15 23:39:27 -0700	[diff] [blame]	7	menuconfig EDAC
Douglas Thompson	b113a3f	2007-07-19 01:50:15 -0700	[diff] [blame]	8	bool "EDAC - error detection and reporting (EXPERIMENTAL)"
Martin Schwidefsky	e25df12	2007-05-10 15:45:57 +0200	[diff] [blame]	9	depends on HAS_IOMEM
Douglas Thompson	b113a3f	2007-07-19 01:50:15 -0700	[diff] [blame]	10	depends on EXPERIMENTAL
Andrew Morton	4c6a1c1	2007-07-26 10:41:10 -0700	[diff] [blame]	11	depends on X86 \|\| PPC
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	12	help
				13	EDAC is designed to report errors in the core system.
				14	These are low-level errors that are reported in the CPU or
Douglas Thompson	8cb2a39	2007-07-19 01:50:12 -0700	[diff] [blame]	15	supporting chipset or other subsystems:
				16	memory errors, cache errors, PCI errors, thermal throttling, etc..
				17	If unsure, select 'Y'.
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	18
Tim Small	57c432b	2006-03-09 17:33:50 -0800	[diff] [blame]	19	If this code is reporting problems on your system, please
				20	see the EDAC project web pages for more information at:
				21
				22	<http://bluesmoke.sourceforge.net/>
				23
				24	and:
				25
				26	<http://buttersideup.com/edacwiki>
				27
				28	There is also a mailing list for the EDAC project, which can
				29	be found via the sourceforge page.
				30
Jan Engelhardt	751cb5e	2007-07-15 23:39:27 -0700	[diff] [blame]	31	if EDAC
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	32
				33	comment "Reporting subsystems"
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	34
				35	config EDAC_DEBUG
				36	bool "Debugging"
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	37	help
				38	This turns on debugging information for the entire EDAC
				39	sub-system. You can insert module with "debug_level=x", current
				40	there're four debug levels (x=0,1,2,3 from low to high).
				41	Usually you should select 'N'.
				42
Hitoshi Mitake	cc18e3c	2009-04-02 16:58:43 -0700	[diff] [blame^]	43	config EDAC_DEBUG_VERBOSE
				44	bool "More verbose debugging"
				45	depends on EDAC_DEBUG
				46	help
				47	This option makes debugging information more verbose.
				48	Source file name and line number where debugging message
				49	printed will be added to debugging message.
				50
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	51	config EDAC_MM_EDAC
				52	tristate "Main Memory EDAC (Error Detection And Correction) reporting"
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	53	default y
				54	help
				55	Some systems are able to detect and correct errors in main
				56	memory. EDAC can report statistics on memory error
				57	detection and correction (EDAC - or commonly referred to ECC
				58	errors). EDAC will also try to decode where these errors
				59	occurred so that a particular failing memory module can be
				60	replaced. If unsure, select 'Y'.
				61
				62
				63	config EDAC_AMD76X
				64	tristate "AMD 76x (760, 762, 768)"
Dave Jones	90cbc45	2006-02-03 03:04:11 -0800	[diff] [blame]	65	depends on EDAC_MM_EDAC && PCI && X86_32
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	66	help
				67	Support for error detection and correction on the AMD 76x
				68	series of chipsets used with the Athlon processor.
				69
				70	config EDAC_E7XXX
				71	tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
Dave Peterson	39f1d8d	2006-03-26 01:38:50 -0800	[diff] [blame]	72	depends on EDAC_MM_EDAC && PCI && X86_32
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	73	help
				74	Support for error detection and correction on the Intel
				75	E7205, E7500, E7501 and E7505 server chipsets.
				76
				77	config EDAC_E752X
Andrei Konovalov	5135b79	2008-04-29 01:03:13 -0700	[diff] [blame]	78	tristate "Intel e752x (e7520, e7525, e7320) and 3100"
Randy Dunlap	da960a6	2006-03-31 02:30:34 -0800	[diff] [blame]	79	depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	80	help
				81	Support for error detection and correction on the Intel
				82	E7520, E7525, E7320 server chipsets.
				83
Tim Small	5a2c675	2007-07-19 01:49:42 -0700	[diff] [blame]	84	config EDAC_I82443BXGX
				85	tristate "Intel 82443BX/GX (440BX/GX)"
				86	depends on EDAC_MM_EDAC && PCI && X86_32
Andrew Morton	28f96eea	2007-07-19 01:49:45 -0700	[diff] [blame]	87	depends on BROKEN
Tim Small	5a2c675	2007-07-19 01:49:42 -0700	[diff] [blame]	88	help
				89	Support for error detection and correction on the Intel
				90	82443BX/GX memory controllers (440BX/GX chipsets).
				91
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	92	config EDAC_I82875P
				93	tristate "Intel 82875p (D82875P, E7210)"
Dave Peterson	39f1d8d	2006-03-26 01:38:50 -0800	[diff] [blame]	94	depends on EDAC_MM_EDAC && PCI && X86_32
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	95	help
				96	Support for error detection and correction on the Intel
				97	DP82785P and E7210 server chipsets.
				98
Ranganathan Desikan	420390f	2007-07-19 01:50:31 -0700	[diff] [blame]	99	config EDAC_I82975X
				100	tristate "Intel 82975x (D82975x)"
				101	depends on EDAC_MM_EDAC && PCI && X86
				102	help
				103	Support for error detection and correction on the Intel
				104	DP82975x server chipsets.
				105
Jason Uhlenkott	535c6a5	2007-07-19 01:49:48 -0700	[diff] [blame]	106	config EDAC_I3000
				107	tristate "Intel 3000/3010"
Jason Uhlenkott	f5c0454	2008-02-07 00:15:01 -0800	[diff] [blame]	108	depends on EDAC_MM_EDAC && PCI && X86
Jason Uhlenkott	535c6a5	2007-07-19 01:49:48 -0700	[diff] [blame]	109	help
				110	Support for error detection and correction on the Intel
				111	3000 and 3010 server chipsets.
				112
Hitoshi Mitake	df8bc08c	2008-10-29 14:00:50 -0700	[diff] [blame]	113	config EDAC_X38
				114	tristate "Intel X38"
				115	depends on EDAC_MM_EDAC && PCI && X86
				116	help
				117	Support for error detection and correction on the Intel
				118	X38 server chipsets.
				119
Mauro Carvalho Chehab	920c8df	2009-01-06 14:43:00 -0800	[diff] [blame]	120	config EDAC_I5400
				121	tristate "Intel 5400 (Seaburg) chipsets"
				122	depends on EDAC_MM_EDAC && PCI && X86
				123	help
				124	Support for error detection and correction the Intel
				125	i5400 MCH chipset (Seaburg).
				126
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	127	config EDAC_I82860
				128	tristate "Intel 82860"
Dave Peterson	39f1d8d	2006-03-26 01:38:50 -0800	[diff] [blame]	129	depends on EDAC_MM_EDAC && PCI && X86_32
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	130	help
				131	Support for error detection and correction on the Intel
				132	82860 chipset.
				133
				134	config EDAC_R82600
				135	tristate "Radisys 82600 embedded chipset"
Dave Peterson	39f1d8d	2006-03-26 01:38:50 -0800	[diff] [blame]	136	depends on EDAC_MM_EDAC && PCI && X86_32
Alan Cox	da9bb1d	2006-01-18 17:44:13 -0800	[diff] [blame]	137	help
				138	Support for error detection and correction on the Radisys
				139	82600 embedded chipset.
				140
Eric Wollesen	eb60705	2007-07-19 01:49:39 -0700	[diff] [blame]	141	config EDAC_I5000
				142	tristate "Intel Greencreek/Blackford chipset"
				143	depends on EDAC_MM_EDAC && X86 && PCI
				144	help
				145	Support for error detection and correction the Intel
				146	Greekcreek/Blackford chipsets.
				147
Arthur Jones	8f421c59	2008-07-25 01:49:04 -0700	[diff] [blame]	148	config EDAC_I5100
				149	tristate "Intel San Clemente MCH"
				150	depends on EDAC_MM_EDAC && X86 && PCI
				151	help
				152	Support for error detection and correction the Intel
				153	San Clemente MCH.
				154
Dave Jiang	a9a753d	2008-02-07 00:14:55 -0800	[diff] [blame]	155	config EDAC_MPC85XX
				156	tristate "Freescale MPC85xx"
				157	depends on EDAC_MM_EDAC && FSL_SOC && MPC85xx
				158	help
				159	Support for error detection and correction on the Freescale
				160	MPC8560, MPC8540, MPC8548
				161
Dave Jiang	4f4aeea	2008-02-07 00:14:56 -0800	[diff] [blame]	162	config EDAC_MV64X60
				163	tristate "Marvell MV64x60"
				164	depends on EDAC_MM_EDAC && MV64X60
				165	help
				166	Support for error detection and correction on the Marvell
				167	MV64360 and MV64460 chipsets.
				168
Egor Martovetsky	7d8536f	2007-07-19 01:50:24 -0700	[diff] [blame]	169	config EDAC_PASEMI
				170	tristate "PA Semi PWRficient"
				171	depends on EDAC_MM_EDAC && PCI
Doug Thompson	ddcc305	2007-07-26 10:41:16 -0700	[diff] [blame]	172	depends on PPC_PASEMI
Egor Martovetsky	7d8536f	2007-07-19 01:50:24 -0700	[diff] [blame]	173	help
				174	Support for error detection and correction on PA Semi
				175	PWRficient.
				176
Benjamin Herrenschmidt	48764e4	2008-02-07 00:14:53 -0800	[diff] [blame]	177	config EDAC_CELL
				178	tristate "Cell Broadband Engine memory controller"
Benjamin Krill	def434c	2008-11-27 16:15:44 +0100	[diff] [blame]	179	depends on EDAC_MM_EDAC && PPC_CELL_COMMON
Benjamin Herrenschmidt	48764e4	2008-02-07 00:14:53 -0800	[diff] [blame]	180	help
				181	Support for error detection and correction on the
				182	Cell Broadband Engine internal memory controller
				183	on platform without a hypervisor
Egor Martovetsky	7d8536f	2007-07-19 01:50:24 -0700	[diff] [blame]	184
Jan Engelhardt	751cb5e	2007-07-15 23:39:27 -0700	[diff] [blame]	185	endif # EDAC