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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_PROCESSOR_H
2#define _ASM_X86_PROCESSOR_H
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +01003
Glauber de Oliveira Costa053de042008-01-30 13:31:27 +01004#include <asm/processor-flags.h>
5
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +01006/* Forward declaration, a strange C thing */
7struct task_struct;
8struct mm_struct;
9
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010010#include <asm/vm86.h>
11#include <asm/math_emu.h>
12#include <asm/segment.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010013#include <asm/types.h>
14#include <asm/sigcontext.h>
15#include <asm/current.h>
16#include <asm/cpufeature.h>
17#include <asm/system.h>
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +010018#include <asm/page.h>
Jeremy Fitzhardinge54321d92009-02-11 10:20:05 -080019#include <asm/pgtable_types.h>
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +010020#include <asm/percpu.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010021#include <asm/msr.h>
22#include <asm/desc_defs.h>
Andi Kleenbd616432008-01-30 13:32:38 +010023#include <asm/nops.h>
Markus Metzger93fa7632008-04-08 11:01:58 +020024#include <asm/ds.h>
Ingo Molnar4d46a892008-02-21 04:24:40 +010025
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010026#include <linux/personality.h>
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010027#include <linux/cpumask.h>
28#include <linux/cache.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010029#include <linux/threads.h>
Peter Zijlstra5cbc19a2009-09-02 11:49:52 +020030#include <linux/math64.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010031#include <linux/init.h>
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +010032
K.Prasadb332828c2009-06-01 23:43:10 +053033#define HBP_NUM 4
Glauber de Oliveira Costa0ccb8ac2008-01-30 13:31:27 +010034/*
35 * Default implementation of macro that returns current
36 * instruction pointer ("program counter").
37 */
38static inline void *current_text_addr(void)
39{
40 void *pc;
Ingo Molnar4d46a892008-02-21 04:24:40 +010041
42 asm volatile("mov $1f, %0; 1:":"=r" (pc));
43
Glauber de Oliveira Costa0ccb8ac2008-01-30 13:31:27 +010044 return pc;
45}
46
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010047#ifdef CONFIG_X86_VSMP
Ingo Molnar4d46a892008-02-21 04:24:40 +010048# define ARCH_MIN_TASKALIGN (1 << INTERNODE_CACHE_SHIFT)
49# define ARCH_MIN_MMSTRUCT_ALIGN (1 << INTERNODE_CACHE_SHIFT)
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010050#else
Ingo Molnar4d46a892008-02-21 04:24:40 +010051# define ARCH_MIN_TASKALIGN 16
52# define ARCH_MIN_MMSTRUCT_ALIGN 0
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010053#endif
54
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010055/*
56 * CPU type and hardware bug flags. Kept separately for each CPU.
57 * Members of this structure are referenced in head.S, so think twice
58 * before touching them. [mj]
59 */
60
61struct cpuinfo_x86 {
Ingo Molnar4d46a892008-02-21 04:24:40 +010062 __u8 x86; /* CPU family */
63 __u8 x86_vendor; /* CPU vendor */
64 __u8 x86_model;
65 __u8 x86_mask;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010066#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +010067 char wp_works_ok; /* It doesn't on 386's */
68
69 /* Problems on some 486Dx4's and old 386's: */
70 char hlt_works_ok;
71 char hard_math;
72 char rfu;
73 char fdiv_bug;
74 char f00f_bug;
75 char coma_bug;
76 char pad0;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010077#else
Ingo Molnar4d46a892008-02-21 04:24:40 +010078 /* Number of 4K pages in DTLB/ITLB combined(in pages): */
H. Peter Anvinb1882e62009-01-23 17:18:52 -080079 int x86_tlbsize;
Jan Beulich13c6c532009-03-12 12:37:34 +000080#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +010081 __u8 x86_virt_bits;
82 __u8 x86_phys_bits;
83 /* CPUID returned core id bits: */
84 __u8 x86_coreid_bits;
85 /* Max extended CPUID function supported: */
86 __u32 extended_cpuid_level;
Ingo Molnar4d46a892008-02-21 04:24:40 +010087 /* Maximum supported CPUID level, -1=no CPUID: */
88 int cpuid_level;
89 __u32 x86_capability[NCAPINTS];
90 char x86_vendor_id[16];
91 char x86_model_id[64];
92 /* in KB - valid for CPUS which support this call: */
93 int x86_cache_size;
94 int x86_cache_alignment; /* In bytes */
95 int x86_power;
96 unsigned long loops_per_jiffy;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010097#ifdef CONFIG_SMP
Ingo Molnar4d46a892008-02-21 04:24:40 +010098 /* cpus sharing the last level cache: */
Rusty Russell155dd722009-03-13 14:49:53 +103099 cpumask_var_t llc_shared_map;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100100#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +0100101 /* cpuid returned max cores value: */
102 u16 x86_max_cores;
103 u16 apicid;
Yinghai Lu01aaea12008-03-06 13:46:39 -0800104 u16 initial_apicid;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100105 u16 x86_clflush_size;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100106#ifdef CONFIG_SMP
Ingo Molnar4d46a892008-02-21 04:24:40 +0100107 /* number of cores as seen by the OS: */
108 u16 booted_cores;
109 /* Physical processor id: */
110 u16 phys_proc_id;
111 /* Core id: */
112 u16 cpu_core_id;
113 /* Index into per_cpu list: */
114 u16 cpu_index;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100115#endif
Alok Kataria88b094f2008-10-27 10:41:46 -0700116 unsigned int x86_hyper_vendor;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100117} __attribute__((__aligned__(SMP_CACHE_BYTES)));
118
Ingo Molnar4d46a892008-02-21 04:24:40 +0100119#define X86_VENDOR_INTEL 0
120#define X86_VENDOR_CYRIX 1
121#define X86_VENDOR_AMD 2
122#define X86_VENDOR_UMC 3
Ingo Molnar4d46a892008-02-21 04:24:40 +0100123#define X86_VENDOR_CENTAUR 5
124#define X86_VENDOR_TRANSMETA 7
125#define X86_VENDOR_NSC 8
126#define X86_VENDOR_NUM 9
127
128#define X86_VENDOR_UNKNOWN 0xff
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100129
Alok Kataria88b094f2008-10-27 10:41:46 -0700130#define X86_HYPER_VENDOR_NONE 0
131#define X86_HYPER_VENDOR_VMWARE 1
132
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100133/*
134 * capabilities of CPUs
135 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100136extern struct cpuinfo_x86 boot_cpu_data;
137extern struct cpuinfo_x86 new_cpu_data;
138
139extern struct tss_struct doublefault_tss;
Yinghai Lu3e0c3732009-05-09 23:47:42 -0700140extern __u32 cpu_caps_cleared[NCAPINTS];
141extern __u32 cpu_caps_set[NCAPINTS];
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100142
143#ifdef CONFIG_SMP
David Howells9b8de742009-04-21 23:00:24 +0100144DECLARE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100145#define cpu_data(cpu) per_cpu(cpu_info, cpu)
Mike Travis94a1e862008-07-18 18:11:31 -0700146#define current_cpu_data __get_cpu_var(cpu_info)
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100147#else
148#define cpu_data(cpu) boot_cpu_data
149#define current_cpu_data boot_cpu_data
150#endif
151
Jaswinder Singh1c6c7272008-07-21 22:40:37 +0530152extern const struct seq_operations cpuinfo_op;
153
Glauber Costa3d3f4872008-03-03 14:12:48 -0300154static inline int hlt_works(int cpu)
155{
156#ifdef CONFIG_X86_32
157 return cpu_data(cpu).hlt_works_ok;
158#else
159 return 1;
160#endif
161}
162
Ingo Molnar4d46a892008-02-21 04:24:40 +0100163#define cache_line_size() (boot_cpu_data.x86_cache_alignment)
164
165extern void cpu_detect(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100166
Jaswinder Singh8fd329a2008-07-21 22:54:56 +0530167extern struct pt_regs *idle_regs(struct pt_regs *);
168
Yinghai Luf5803662008-06-21 03:24:19 -0700169extern void early_cpu_init(void);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100170extern void identify_boot_cpu(void);
171extern void identify_secondary_cpu(struct cpuinfo_x86 *);
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100172extern void print_cpu_info(struct cpuinfo_x86 *);
173extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
174extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
175extern unsigned short num_cache_leaves;
176
Suresh Siddhabbb65d22008-08-23 17:47:10 +0200177extern void detect_extended_topology(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100178extern void detect_ht(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100179
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100180static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
Ingo Molnar4d46a892008-02-21 04:24:40 +0100181 unsigned int *ecx, unsigned int *edx)
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100182{
183 /* ecx is often an input as well as an output. */
Suresh Siddha45a94d72009-12-16 16:25:42 -0800184 asm volatile("cpuid"
Joe Perchescca2e6f2008-03-23 01:03:15 -0700185 : "=a" (*eax),
186 "=b" (*ebx),
187 "=c" (*ecx),
188 "=d" (*edx)
189 : "0" (*eax), "2" (*ecx));
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100190}
191
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +0100192static inline void load_cr3(pgd_t *pgdir)
193{
194 write_cr3(__pa(pgdir));
195}
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100196
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200197#ifdef CONFIG_X86_32
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100198/* This is the TSS defined by the hardware. */
199struct x86_hw_tss {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100200 unsigned short back_link, __blh;
201 unsigned long sp0;
202 unsigned short ss0, __ss0h;
203 unsigned long sp1;
204 /* ss1 caches MSR_IA32_SYSENTER_CS: */
205 unsigned short ss1, __ss1h;
206 unsigned long sp2;
207 unsigned short ss2, __ss2h;
208 unsigned long __cr3;
209 unsigned long ip;
210 unsigned long flags;
211 unsigned long ax;
212 unsigned long cx;
213 unsigned long dx;
214 unsigned long bx;
215 unsigned long sp;
216 unsigned long bp;
217 unsigned long si;
218 unsigned long di;
219 unsigned short es, __esh;
220 unsigned short cs, __csh;
221 unsigned short ss, __ssh;
222 unsigned short ds, __dsh;
223 unsigned short fs, __fsh;
224 unsigned short gs, __gsh;
225 unsigned short ldt, __ldth;
226 unsigned short trace;
227 unsigned short io_bitmap_base;
228
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100229} __attribute__((packed));
230#else
231struct x86_hw_tss {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100232 u32 reserved1;
233 u64 sp0;
234 u64 sp1;
235 u64 sp2;
236 u64 reserved2;
237 u64 ist[7];
238 u32 reserved3;
239 u32 reserved4;
240 u16 reserved5;
241 u16 io_bitmap_base;
242
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100243} __attribute__((packed)) ____cacheline_aligned;
244#endif
245
246/*
Ingo Molnar4d46a892008-02-21 04:24:40 +0100247 * IO-bitmap sizes:
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100248 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100249#define IO_BITMAP_BITS 65536
250#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
251#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
252#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)
253#define INVALID_IO_BITMAP_OFFSET 0x8000
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100254
255struct tss_struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100256 /*
257 * The hardware state:
258 */
259 struct x86_hw_tss x86_tss;
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100260
261 /*
262 * The extra 1 is there because the CPU will access an
263 * additional byte beyond the end of the IO permission
264 * bitmap. The extra byte must be all 1 bits, and must
265 * be within the limit.
266 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100267 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
Ingo Molnar4d46a892008-02-21 04:24:40 +0100268
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100269 /*
Ingo Molnar4d46a892008-02-21 04:24:40 +0100270 * .. and then another 0x100 bytes for the emergency kernel stack:
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100271 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100272 unsigned long stack[64];
273
Richard Kennedy84e65b02008-07-04 13:56:16 +0100274} ____cacheline_aligned;
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100275
David Howells9b8de742009-04-21 23:00:24 +0100276DECLARE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss);
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100277
Ingo Molnar4d46a892008-02-21 04:24:40 +0100278/*
279 * Save the original ist values for checking stack pointers during debugging
280 */
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100281struct orig_ist {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100282 unsigned long ist[7];
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100283};
284
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100285#define MXCSR_DEFAULT 0x1f80
286
Glauber de Oliveira Costa46265df2008-01-30 13:31:41 +0100287struct i387_fsave_struct {
Ingo Molnarca9cda22008-03-05 15:15:42 +0100288 u32 cwd; /* FPU Control Word */
289 u32 swd; /* FPU Status Word */
290 u32 twd; /* FPU Tag Word */
291 u32 fip; /* FPU IP Offset */
292 u32 fcs; /* FPU IP Selector */
293 u32 foo; /* FPU Operand Pointer Offset */
294 u32 fos; /* FPU Operand Pointer Selector */
295
296 /* 8*10 bytes for each FP-reg = 80 bytes: */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100297 u32 st_space[20];
Ingo Molnarca9cda22008-03-05 15:15:42 +0100298
299 /* Software status information [not touched by FSAVE ]: */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100300 u32 status;
Glauber de Oliveira Costa46265df2008-01-30 13:31:41 +0100301};
302
303struct i387_fxsave_struct {
Ingo Molnarca9cda22008-03-05 15:15:42 +0100304 u16 cwd; /* Control Word */
305 u16 swd; /* Status Word */
306 u16 twd; /* Tag Word */
307 u16 fop; /* Last Instruction Opcode */
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100308 union {
309 struct {
Ingo Molnarca9cda22008-03-05 15:15:42 +0100310 u64 rip; /* Instruction Pointer */
311 u64 rdp; /* Data Pointer */
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100312 };
313 struct {
Ingo Molnarca9cda22008-03-05 15:15:42 +0100314 u32 fip; /* FPU IP Offset */
315 u32 fcs; /* FPU IP Selector */
316 u32 foo; /* FPU Operand Offset */
317 u32 fos; /* FPU Operand Selector */
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100318 };
319 };
Ingo Molnarca9cda22008-03-05 15:15:42 +0100320 u32 mxcsr; /* MXCSR Register State */
321 u32 mxcsr_mask; /* MXCSR Mask */
322
323 /* 8*16 bytes for each FP-reg = 128 bytes: */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100324 u32 st_space[32];
Ingo Molnarca9cda22008-03-05 15:15:42 +0100325
326 /* 16*16 bytes for each XMM-reg = 256 bytes: */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100327 u32 xmm_space[64];
Ingo Molnarca9cda22008-03-05 15:15:42 +0100328
Suresh Siddhabdd8cab2008-07-29 10:29:24 -0700329 u32 padding[12];
330
331 union {
332 u32 padding1[12];
333 u32 sw_reserved[12];
334 };
Ingo Molnar4d46a892008-02-21 04:24:40 +0100335
Glauber de Oliveira Costa46265df2008-01-30 13:31:41 +0100336} __attribute__((aligned(16)));
337
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100338struct i387_soft_struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100339 u32 cwd;
340 u32 swd;
341 u32 twd;
342 u32 fip;
343 u32 fcs;
344 u32 foo;
345 u32 fos;
346 /* 8*10 bytes for each FP-reg = 80 bytes: */
347 u32 st_space[20];
348 u8 ftop;
349 u8 changed;
350 u8 lookahead;
351 u8 no_update;
352 u8 rm;
353 u8 alimit;
Tejun Heoae6af412009-02-09 22:17:39 +0900354 struct math_emu_info *info;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100355 u32 entry_eip;
Glauber de Oliveira Costa46265df2008-01-30 13:31:41 +0100356};
357
Suresh Siddhaa30469e2009-04-10 15:21:24 -0700358struct ymmh_struct {
359 /* 16 * 16 bytes for each YMMH-reg = 256 bytes */
360 u32 ymmh_space[64];
361};
362
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700363struct xsave_hdr_struct {
364 u64 xstate_bv;
365 u64 reserved1[2];
366 u64 reserved2[5];
367} __attribute__((packed));
368
369struct xsave_struct {
370 struct i387_fxsave_struct i387;
371 struct xsave_hdr_struct xsave_hdr;
Suresh Siddhaa30469e2009-04-10 15:21:24 -0700372 struct ymmh_struct ymmh;
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700373 /* new processor state extensions will go here */
374} __attribute__ ((packed, aligned (64)));
375
Suresh Siddha61c46282008-03-10 15:28:04 -0700376union thread_xstate {
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100377 struct i387_fsave_struct fsave;
378 struct i387_fxsave_struct fxsave;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100379 struct i387_soft_struct soft;
Suresh Siddhab359e8a2008-07-29 10:29:20 -0700380 struct xsave_struct xsave;
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100381};
382
Glauber Costafe676202008-03-03 14:12:56 -0300383#ifdef CONFIG_X86_64
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100384DECLARE_PER_CPU(struct orig_ist, orig_ist);
Brian Gerst26f80bd2009-01-19 00:38:58 +0900385
Brian Gerst947e76c2009-01-19 12:21:28 +0900386union irq_stack_union {
387 char irq_stack[IRQ_STACK_SIZE];
388 /*
389 * GCC hardcodes the stack canary as %gs:40. Since the
390 * irq_stack is the object at %gs:0, we reserve the bottom
391 * 48 bytes of the irq stack for the canary.
392 */
393 struct {
394 char gs_base[40];
395 unsigned long stack_canary;
396 };
397};
398
David Howells9b8de742009-04-21 23:00:24 +0100399DECLARE_PER_CPU_FIRST(union irq_stack_union, irq_stack_union);
Brian Gerst2add8e22009-02-08 09:58:39 -0500400DECLARE_INIT_PER_CPU(irq_stack_union);
401
Brian Gerst26f80bd2009-01-19 00:38:58 +0900402DECLARE_PER_CPU(char *, irq_stack_ptr);
Jaswinder Singh Rajput9766cdb2009-03-14 11:19:49 +0530403DECLARE_PER_CPU(unsigned int, irq_count);
404extern unsigned long kernel_eflags;
405extern asmlinkage void ignore_sysret(void);
Tejun Heo60a53172009-02-09 22:17:40 +0900406#else /* X86_64 */
407#ifdef CONFIG_CC_STACKPROTECTOR
Jeremy Fitzhardinge1ea0d142009-09-03 12:27:15 -0700408/*
409 * Make sure stack canary segment base is cached-aligned:
410 * "For Intel Atom processors, avoid non zero segment base address
411 * that is not aligned to cache line boundary at all cost."
412 * (Optim Ref Manual Assembly/Compiler Coding Rule 15.)
413 */
414struct stack_canary {
415 char __pad[20]; /* canary at %gs:20 */
416 unsigned long canary;
417};
Jeremy Fitzhardinge53f82452009-09-03 14:31:44 -0700418DECLARE_PER_CPU_ALIGNED(struct stack_canary, stack_canary);
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200419#endif
Tejun Heo60a53172009-02-09 22:17:40 +0900420#endif /* X86_64 */
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100421
Suresh Siddha61c46282008-03-10 15:28:04 -0700422extern unsigned int xstate_size;
Suresh Siddhaaa283f42008-03-10 15:28:05 -0700423extern void free_thread_xstate(struct task_struct *);
424extern struct kmem_cache *task_xstate_cachep;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100425
Frederic Weisbecker24f1e32c2009-09-09 19:22:48 +0200426struct perf_event;
427
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100428struct thread_struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100429 /* Cached TLS descriptors: */
430 struct desc_struct tls_array[GDT_ENTRY_TLS_ENTRIES];
431 unsigned long sp0;
432 unsigned long sp;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100433#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100434 unsigned long sysenter_cs;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100435#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100436 unsigned long usersp; /* Copy from PDA */
437 unsigned short es;
438 unsigned short ds;
439 unsigned short fsindex;
440 unsigned short gsindex;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100441#endif
Alexey Dobriyan0c235902009-05-04 03:30:15 +0400442#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100443 unsigned long ip;
Alexey Dobriyan0c235902009-05-04 03:30:15 +0400444#endif
Alexey Dobriyand756f4ad2009-05-04 03:29:52 +0400445#ifdef CONFIG_X86_64
Ingo Molnar4d46a892008-02-21 04:24:40 +0100446 unsigned long fs;
Alexey Dobriyand756f4ad2009-05-04 03:29:52 +0400447#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +0100448 unsigned long gs;
Frederic Weisbecker24f1e32c2009-09-09 19:22:48 +0200449 /* Save middle states of ptrace breakpoints */
450 struct perf_event *ptrace_bps[HBP_NUM];
451 /* Debug status used for traps, single steps, etc... */
452 unsigned long debugreg6;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100453 /* Fault info: */
454 unsigned long cr2;
455 unsigned long trap_no;
456 unsigned long error_code;
Suresh Siddha61c46282008-03-10 15:28:04 -0700457 /* floating point and extended processor state */
458 union thread_xstate *xstate;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100459#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100460 /* Virtual 86 mode info */
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100461 struct vm86_struct __user *vm86_info;
462 unsigned long screen_bitmap;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100463 unsigned long v86flags;
464 unsigned long v86mask;
465 unsigned long saved_sp0;
466 unsigned int saved_fs;
467 unsigned int saved_gs;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100468#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +0100469 /* IO permissions: */
470 unsigned long *io_bitmap_ptr;
471 unsigned long iopl;
472 /* Max allowed port in the bitmap, in bytes: */
473 unsigned io_bitmap_max;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100474/* MSR_IA32_DEBUGCTLMSR value to switch in if TIF_DEBUGCTLMSR is set. */
475 unsigned long debugctlmsr;
Markus Metzger2311f0d2009-04-03 16:43:46 +0200476 /* Debug Store context; see asm/ds.h */
Markus Metzger93fa7632008-04-08 11:01:58 +0200477 struct ds_context *ds_ctx;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100478};
479
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100480static inline unsigned long native_get_debugreg(int regno)
481{
Ingo Molnar4d46a892008-02-21 04:24:40 +0100482 unsigned long val = 0; /* Damn you, gcc! */
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100483
484 switch (regno) {
485 case 0:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700486 asm("mov %%db0, %0" :"=r" (val));
487 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100488 case 1:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700489 asm("mov %%db1, %0" :"=r" (val));
490 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100491 case 2:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700492 asm("mov %%db2, %0" :"=r" (val));
493 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100494 case 3:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700495 asm("mov %%db3, %0" :"=r" (val));
496 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100497 case 6:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700498 asm("mov %%db6, %0" :"=r" (val));
499 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100500 case 7:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700501 asm("mov %%db7, %0" :"=r" (val));
502 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100503 default:
504 BUG();
505 }
506 return val;
507}
508
509static inline void native_set_debugreg(int regno, unsigned long value)
510{
511 switch (regno) {
512 case 0:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100513 asm("mov %0, %%db0" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100514 break;
515 case 1:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100516 asm("mov %0, %%db1" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100517 break;
518 case 2:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100519 asm("mov %0, %%db2" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100520 break;
521 case 3:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100522 asm("mov %0, %%db3" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100523 break;
524 case 6:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100525 asm("mov %0, %%db6" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100526 break;
527 case 7:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100528 asm("mov %0, %%db7" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100529 break;
530 default:
531 BUG();
532 }
533}
534
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100535/*
536 * Set IOPL bits in EFLAGS from given mask
537 */
538static inline void native_set_iopl_mask(unsigned mask)
539{
540#ifdef CONFIG_X86_32
541 unsigned int reg;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100542
Joe Perchescca2e6f2008-03-23 01:03:15 -0700543 asm volatile ("pushfl;"
544 "popl %0;"
545 "andl %1, %0;"
546 "orl %2, %0;"
547 "pushl %0;"
548 "popfl"
549 : "=&r" (reg)
550 : "i" (~X86_EFLAGS_IOPL), "r" (mask));
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100551#endif
552}
553
Ingo Molnar4d46a892008-02-21 04:24:40 +0100554static inline void
555native_load_sp0(struct tss_struct *tss, struct thread_struct *thread)
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100556{
557 tss->x86_tss.sp0 = thread->sp0;
558#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100559 /* Only happens when SEP is enabled, no need to test "SEP"arately: */
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100560 if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
561 tss->x86_tss.ss1 = thread->sysenter_cs;
562 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
563 }
564#endif
565}
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100566
Glauber de Oliveira Costae801f862008-01-30 13:32:08 +0100567static inline void native_swapgs(void)
568{
569#ifdef CONFIG_X86_64
570 asm volatile("swapgs" ::: "memory");
571#endif
572}
573
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100574#ifdef CONFIG_PARAVIRT
575#include <asm/paravirt.h>
576#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100577#define __cpuid native_cpuid
578#define paravirt_enabled() 0
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100579
580/*
581 * These special macros can be used to get or set a debugging register
582 */
583#define get_debugreg(var, register) \
584 (var) = native_get_debugreg(register)
585#define set_debugreg(value, register) \
586 native_set_debugreg(register, value)
587
Joe Perchescca2e6f2008-03-23 01:03:15 -0700588static inline void load_sp0(struct tss_struct *tss,
589 struct thread_struct *thread)
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100590{
591 native_load_sp0(tss, thread);
592}
593
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100594#define set_iopl_mask native_set_iopl_mask
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100595#endif /* CONFIG_PARAVIRT */
596
597/*
598 * Save the cr4 feature set we're using (ie
599 * Pentium 4MB enable and PPro Global page
600 * enable), so that any CPU's that boot up
601 * after us can get the correct flags.
602 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100603extern unsigned long mmu_cr4_features;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100604
605static inline void set_in_cr4(unsigned long mask)
606{
607 unsigned cr4;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100608
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100609 mmu_cr4_features |= mask;
610 cr4 = read_cr4();
611 cr4 |= mask;
612 write_cr4(cr4);
613}
614
615static inline void clear_in_cr4(unsigned long mask)
616{
617 unsigned cr4;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100618
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100619 mmu_cr4_features &= ~mask;
620 cr4 = read_cr4();
621 cr4 &= ~mask;
622 write_cr4(cr4);
623}
624
Glauber de Oliveira Costafc87e902008-01-30 13:31:38 +0100625typedef struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100626 unsigned long seg;
Glauber de Oliveira Costafc87e902008-01-30 13:31:38 +0100627} mm_segment_t;
628
629
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100630/*
631 * create a kernel thread without removing it from tasklists
632 */
633extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
634
635/* Free all resources held by a thread. */
636extern void release_thread(struct task_struct *);
637
Ingo Molnar4d46a892008-02-21 04:24:40 +0100638/* Prepare to copy thread state - unlazy all lazy state */
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100639extern void prepare_to_copy(struct task_struct *tsk);
640
641unsigned long get_wchan(struct task_struct *p);
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100642
643/*
644 * Generic CPUID function
645 * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
646 * resulting in stale register contents being returned.
647 */
648static inline void cpuid(unsigned int op,
649 unsigned int *eax, unsigned int *ebx,
650 unsigned int *ecx, unsigned int *edx)
651{
652 *eax = op;
653 *ecx = 0;
654 __cpuid(eax, ebx, ecx, edx);
655}
656
657/* Some CPUID calls want 'count' to be placed in ecx */
658static inline void cpuid_count(unsigned int op, int count,
659 unsigned int *eax, unsigned int *ebx,
660 unsigned int *ecx, unsigned int *edx)
661{
662 *eax = op;
663 *ecx = count;
664 __cpuid(eax, ebx, ecx, edx);
665}
666
667/*
668 * CPUID functions returning a single datum
669 */
670static inline unsigned int cpuid_eax(unsigned int op)
671{
672 unsigned int eax, ebx, ecx, edx;
673
674 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100675
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100676 return eax;
677}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100678
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100679static inline unsigned int cpuid_ebx(unsigned int op)
680{
681 unsigned int eax, ebx, ecx, edx;
682
683 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100684
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100685 return ebx;
686}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100687
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100688static inline unsigned int cpuid_ecx(unsigned int op)
689{
690 unsigned int eax, ebx, ecx, edx;
691
692 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100693
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100694 return ecx;
695}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100696
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100697static inline unsigned int cpuid_edx(unsigned int op)
698{
699 unsigned int eax, ebx, ecx, edx;
700
701 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100702
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100703 return edx;
704}
705
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100706/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
707static inline void rep_nop(void)
708{
Joe Perchescca2e6f2008-03-23 01:03:15 -0700709 asm volatile("rep; nop" ::: "memory");
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100710}
711
Ingo Molnar4d46a892008-02-21 04:24:40 +0100712static inline void cpu_relax(void)
713{
714 rep_nop();
715}
716
Ben Hutchings5367b6882009-09-10 02:53:50 +0100717/* Stop speculative execution and prefetching of modified code. */
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100718static inline void sync_core(void)
719{
720 int tmp;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100721
Ben Hutchings5367b6882009-09-10 02:53:50 +0100722#if defined(CONFIG_M386) || defined(CONFIG_M486)
723 if (boot_cpu_data.x86 < 5)
724 /* There is no speculative execution.
725 * jmp is a barrier to prefetching. */
726 asm volatile("jmp 1f\n1:\n" ::: "memory");
727 else
728#endif
729 /* cpuid is a barrier to speculative execution.
730 * Prefetched instructions are automatically
731 * invalidated when modified. */
732 asm volatile("cpuid" : "=a" (tmp) : "0" (1)
733 : "ebx", "ecx", "edx", "memory");
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100734}
735
Joe Perchescca2e6f2008-03-23 01:03:15 -0700736static inline void __monitor(const void *eax, unsigned long ecx,
737 unsigned long edx)
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100738{
Ingo Molnar4d46a892008-02-21 04:24:40 +0100739 /* "monitor %eax, %ecx, %edx;" */
Joe Perchescca2e6f2008-03-23 01:03:15 -0700740 asm volatile(".byte 0x0f, 0x01, 0xc8;"
741 :: "a" (eax), "c" (ecx), "d"(edx));
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100742}
743
744static inline void __mwait(unsigned long eax, unsigned long ecx)
745{
Ingo Molnar4d46a892008-02-21 04:24:40 +0100746 /* "mwait %eax, %ecx;" */
Joe Perchescca2e6f2008-03-23 01:03:15 -0700747 asm volatile(".byte 0x0f, 0x01, 0xc9;"
748 :: "a" (eax), "c" (ecx));
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100749}
750
751static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
752{
Peter Zijlstra7f424a82008-04-25 17:39:01 +0200753 trace_hardirqs_on();
Ingo Molnar4d46a892008-02-21 04:24:40 +0100754 /* "mwait %eax, %ecx;" */
Joe Perchescca2e6f2008-03-23 01:03:15 -0700755 asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"
756 :: "a" (eax), "c" (ecx));
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100757}
758
759extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
760
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100761extern void select_idle_routine(const struct cpuinfo_x86 *c);
Rusty Russell30e1e6d2009-03-17 14:50:34 +1030762extern void init_c1e_mask(void);
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100763
Ingo Molnar4d46a892008-02-21 04:24:40 +0100764extern unsigned long boot_option_idle_override;
Zhao Yakuic1e3b372008-06-24 17:58:53 +0800765extern unsigned long idle_halt;
Zhao Yakuida5e09a2008-06-24 18:01:09 +0800766extern unsigned long idle_nomwait;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100767
Mark Langsdorf394a1502008-08-14 09:11:26 -0500768/*
769 * on systems with caches, caches must be flashed as the absolute
770 * last instruction before going into a suspended halt. Otherwise,
771 * dirty data can linger in the cache and become stale on resume,
772 * leading to strange errors.
773 *
774 * perform a variety of operations to guarantee that the compiler
775 * will not reorder instructions. wbinvd itself is serializing
776 * so the processor will not reorder.
777 *
778 * Systems without cache can just go into halt.
779 */
780static inline void wbinvd_halt(void)
781{
782 mb();
783 /* check for clflush to determine if wbinvd is legal */
784 if (cpu_has_clflush)
785 asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
786 else
787 while (1)
788 halt();
789}
790
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100791extern void enable_sep_cpu(void);
792extern int sysenter_setup(void);
793
794/* Defined in head.S */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100795extern struct desc_ptr early_gdt_descr;
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100796
797extern void cpu_set_gdt(int);
Brian Gerst552be872009-01-30 17:47:53 +0900798extern void switch_to_new_gdt(int);
Jeremy Fitzhardinge11e3a842009-01-30 17:47:54 +0900799extern void load_percpu_segment(int);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100800extern void cpu_init(void);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100801
Markus Metzgerc2724772008-12-11 13:49:59 +0100802static inline unsigned long get_debugctlmsr(void)
803{
804 unsigned long debugctlmsr = 0;
805
806#ifndef CONFIG_X86_DEBUGCTLMSR
807 if (boot_cpu_data.x86 < 6)
808 return 0;
809#endif
810 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
811
812 return debugctlmsr;
813}
814
Markus Metzger35bb7602009-04-03 16:43:39 +0200815static inline unsigned long get_debugctlmsr_on_cpu(int cpu)
816{
817 u64 debugctlmsr = 0;
818 u32 val1, val2;
819
820#ifndef CONFIG_X86_DEBUGCTLMSR
821 if (boot_cpu_data.x86 < 6)
822 return 0;
823#endif
824 rdmsr_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, &val1, &val2);
825 debugctlmsr = val1 | ((u64)val2 << 32);
826
827 return debugctlmsr;
828}
829
Jan Beulich5b0e5082008-03-10 13:11:17 +0000830static inline void update_debugctlmsr(unsigned long debugctlmsr)
831{
832#ifndef CONFIG_X86_DEBUGCTLMSR
833 if (boot_cpu_data.x86 < 6)
834 return;
835#endif
836 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
837}
838
Markus Metzger35bb7602009-04-03 16:43:39 +0200839static inline void update_debugctlmsr_on_cpu(int cpu,
840 unsigned long debugctlmsr)
841{
842#ifndef CONFIG_X86_DEBUGCTLMSR
843 if (boot_cpu_data.x86 < 6)
844 return;
845#endif
846 wrmsr_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR,
847 (u32)((u64)debugctlmsr),
848 (u32)((u64)debugctlmsr >> 32));
849}
850
Ingo Molnar4d46a892008-02-21 04:24:40 +0100851/*
852 * from system description table in BIOS. Mostly for MCA use, but
853 * others may find it useful:
854 */
855extern unsigned int machine_id;
856extern unsigned int machine_submodel_id;
857extern unsigned int BIOS_revision;
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100858
Ingo Molnar4d46a892008-02-21 04:24:40 +0100859/* Boot loader type from the setup header: */
860extern int bootloader_type;
H. Peter Anvin50312962009-05-07 16:54:11 -0700861extern int bootloader_version;
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100862
Ingo Molnar4d46a892008-02-21 04:24:40 +0100863extern char ignore_fpu_irq;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100864
865#define HAVE_ARCH_PICK_MMAP_LAYOUT 1
866#define ARCH_HAS_PREFETCHW
867#define ARCH_HAS_SPINLOCK_PREFETCH
868
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100869#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100870# define BASE_PREFETCH ASM_NOP4
871# define ARCH_HAS_PREFETCH
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100872#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100873# define BASE_PREFETCH "prefetcht0 (%1)"
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100874#endif
875
Ingo Molnar4d46a892008-02-21 04:24:40 +0100876/*
877 * Prefetch instructions for Pentium III (+) and AMD Athlon (+)
878 *
879 * It's not worth to care about 3dnow prefetches for the K6
880 * because they are microcoded there and very slow.
881 */
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100882static inline void prefetch(const void *x)
883{
884 alternative_input(BASE_PREFETCH,
885 "prefetchnta (%1)",
886 X86_FEATURE_XMM,
887 "r" (x));
888}
889
Ingo Molnar4d46a892008-02-21 04:24:40 +0100890/*
891 * 3dnow prefetch to get an exclusive cache line.
892 * Useful for spinlocks to avoid one state transition in the
893 * cache coherency protocol:
894 */
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100895static inline void prefetchw(const void *x)
896{
897 alternative_input(BASE_PREFETCH,
898 "prefetchw (%1)",
899 X86_FEATURE_3DNOW,
900 "r" (x));
901}
902
Ingo Molnar4d46a892008-02-21 04:24:40 +0100903static inline void spin_lock_prefetch(const void *x)
904{
905 prefetchw(x);
906}
907
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100908#ifdef CONFIG_X86_32
909/*
910 * User space process size: 3GB (default).
911 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100912#define TASK_SIZE PAGE_OFFSET
Ingo Molnard9517342009-02-20 23:32:28 +0100913#define TASK_SIZE_MAX TASK_SIZE
Ingo Molnar4d46a892008-02-21 04:24:40 +0100914#define STACK_TOP TASK_SIZE
915#define STACK_TOP_MAX STACK_TOP
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100916
Ingo Molnar4d46a892008-02-21 04:24:40 +0100917#define INIT_THREAD { \
918 .sp0 = sizeof(init_stack) + (long)&init_stack, \
919 .vm86_info = NULL, \
920 .sysenter_cs = __KERNEL_CS, \
921 .io_bitmap_ptr = NULL, \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100922}
923
924/*
925 * Note that the .io_bitmap member must be extra-big. This is because
926 * the CPU will access an additional byte beyond the end of the IO
927 * permission bitmap. The extra byte must be all 1 bits, and must
928 * be within the limit.
929 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100930#define INIT_TSS { \
931 .x86_tss = { \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100932 .sp0 = sizeof(init_stack) + (long)&init_stack, \
Ingo Molnar4d46a892008-02-21 04:24:40 +0100933 .ss0 = __KERNEL_DS, \
934 .ss1 = __KERNEL_CS, \
935 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \
936 }, \
937 .io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 }, \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100938}
939
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100940extern unsigned long thread_saved_pc(struct task_struct *tsk);
941
942#define THREAD_SIZE_LONGS (THREAD_SIZE/sizeof(unsigned long))
943#define KSTK_TOP(info) \
944({ \
945 unsigned long *__ptr = (unsigned long *)(info); \
946 (unsigned long)(&__ptr[THREAD_SIZE_LONGS]); \
947})
948
949/*
950 * The below -8 is to reserve 8 bytes on top of the ring0 stack.
951 * This is necessary to guarantee that the entire "struct pt_regs"
952 * is accessable even if the CPU haven't stored the SS/ESP registers
953 * on the stack (interrupt gate does not save these registers
954 * when switching to the same priv ring).
955 * Therefore beware: accessing the ss/esp fields of the
956 * "struct pt_regs" is possible, but they may contain the
957 * completely wrong values.
958 */
959#define task_pt_regs(task) \
960({ \
961 struct pt_regs *__regs__; \
962 __regs__ = (struct pt_regs *)(KSTK_TOP(task_stack_page(task))-8); \
963 __regs__ - 1; \
964})
965
Ingo Molnar4d46a892008-02-21 04:24:40 +0100966#define KSTK_ESP(task) (task_pt_regs(task)->sp)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100967
968#else
969/*
970 * User space process size. 47bits minus one guard page.
971 */
Ingo Molnard9517342009-02-20 23:32:28 +0100972#define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100973
974/* This decides where the kernel will search for a free chunk of vm
975 * space during mmap's.
976 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100977#define IA32_PAGE_OFFSET ((current->personality & ADDR_LIMIT_3GB) ? \
978 0xc0000000 : 0xFFFFe000)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100979
Ingo Molnar4d46a892008-02-21 04:24:40 +0100980#define TASK_SIZE (test_thread_flag(TIF_IA32) ? \
Ingo Molnard9517342009-02-20 23:32:28 +0100981 IA32_PAGE_OFFSET : TASK_SIZE_MAX)
Ingo Molnar4d46a892008-02-21 04:24:40 +0100982#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \
Ingo Molnard9517342009-02-20 23:32:28 +0100983 IA32_PAGE_OFFSET : TASK_SIZE_MAX)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100984
David Howells922a70d2008-02-08 04:19:26 -0800985#define STACK_TOP TASK_SIZE
Ingo Molnard9517342009-02-20 23:32:28 +0100986#define STACK_TOP_MAX TASK_SIZE_MAX
David Howells922a70d2008-02-08 04:19:26 -0800987
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100988#define INIT_THREAD { \
989 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
990}
991
992#define INIT_TSS { \
993 .x86_tss.sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
994}
995
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100996/*
997 * Return saved PC of a blocked thread.
998 * What is this good for? it will be always the scheduler or ret_from_fork.
999 */
Ingo Molnar4d46a892008-02-21 04:24:40 +01001000#define thread_saved_pc(t) (*(unsigned long *)((t)->thread.sp - 8))
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +01001001
Ingo Molnar4d46a892008-02-21 04:24:40 +01001002#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1)
Stefani Seibold89240ba2009-11-03 10:22:40 +01001003extern unsigned long KSTK_ESP(struct task_struct *task);
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +01001004#endif /* CONFIG_X86_64 */
1005
Ingo Molnar513ad842008-02-21 05:18:40 +01001006extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
1007 unsigned long new_sp);
1008
Ingo Molnar4d46a892008-02-21 04:24:40 +01001009/*
1010 * This decides where the kernel will search for a free chunk of vm
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +01001011 * space during mmap's.
1012 */
1013#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
1014
Ingo Molnar4d46a892008-02-21 04:24:40 +01001015#define KSTK_EIP(task) (task_pt_regs(task)->ip)
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +01001016
Erik Bosman529e25f2008-04-14 00:24:18 +02001017/* Get/set a process' ability to use the timestamp counter instruction */
1018#define GET_TSC_CTL(adr) get_tsc_mode((adr))
1019#define SET_TSC_CTL(val) set_tsc_mode((val))
1020
1021extern int get_tsc_mode(unsigned long adr);
1022extern int set_tsc_mode(unsigned int val);
1023
Andreas Herrmann6a812692009-09-16 11:33:40 +02001024extern int amd_get_nb_id(int cpu);
1025
Peter Zijlstra5cbc19a2009-09-02 11:49:52 +02001026struct aperfmperf {
1027 u64 aperf, mperf;
1028};
1029
1030static inline void get_aperfmperf(struct aperfmperf *am)
1031{
1032 WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_APERFMPERF));
1033
1034 rdmsrl(MSR_IA32_APERF, am->aperf);
1035 rdmsrl(MSR_IA32_MPERF, am->mperf);
1036}
1037
1038#define APERFMPERF_SHIFT 10
1039
1040static inline
1041unsigned long calc_aperfmperf_ratio(struct aperfmperf *old,
1042 struct aperfmperf *new)
1043{
1044 u64 aperf = new->aperf - old->aperf;
1045 u64 mperf = new->mperf - old->mperf;
1046 unsigned long ratio = aperf;
1047
1048 mperf >>= APERFMPERF_SHIFT;
1049 if (mperf)
1050 ratio = div64_u64(aperf, mperf);
1051
1052 return ratio;
1053}
1054
H. Peter Anvin1965aae2008-10-22 22:26:29 -07001055#endif /* _ASM_X86_PROCESSOR_H */