Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/mfd/mcp-sa11x0.c |
| 3 | * |
| 4 | * Copyright (C) 2001-2005 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License. |
| 9 | * |
| 10 | * SA11x0 MCP (Multimedia Communications Port) driver. |
| 11 | * |
| 12 | * MCP read/write timeouts from Jordi Colomer, rehacked by rmk. |
| 13 | */ |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/init.h> |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 16 | #include <linux/io.h> |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 17 | #include <linux/errno.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/delay.h> |
| 20 | #include <linux/spinlock.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 21 | #include <linux/platform_device.h> |
Thomas Kunze | c8602ed | 2009-02-10 14:54:57 +0100 | [diff] [blame] | 22 | #include <linux/mfd/mcp.h> |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 23 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 24 | #include <mach/hardware.h> |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 25 | #include <asm/mach-types.h> |
| 26 | #include <asm/system.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 27 | #include <mach/mcp.h> |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 28 | |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 29 | #include <mach/assabet.h> |
| 30 | |
Russell King | c4592ce | 2012-01-20 22:30:15 +0000 | [diff] [blame] | 31 | #define DRIVER_NAME "sa11x0-mcp" |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 32 | |
| 33 | struct mcp_sa11x0 { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 34 | void __iomem *base0; |
| 35 | void __iomem *base1; |
| 36 | u32 mccr0; |
| 37 | u32 mccr1; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 38 | }; |
| 39 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 40 | /* Register offsets */ |
| 41 | #define MCCR0(m) ((m)->base0 + 0x00) |
| 42 | #define MCDR0(m) ((m)->base0 + 0x08) |
| 43 | #define MCDR1(m) ((m)->base0 + 0x0c) |
| 44 | #define MCDR2(m) ((m)->base0 + 0x10) |
| 45 | #define MCSR(m) ((m)->base0 + 0x18) |
| 46 | #define MCCR1(m) ((m)->base1 + 0x00) |
| 47 | |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 48 | #define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp)) |
| 49 | |
| 50 | static void |
| 51 | mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor) |
| 52 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 53 | struct mcp_sa11x0 *m = priv(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 54 | |
| 55 | divisor /= 32; |
| 56 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 57 | m->mccr0 &= ~0x00007f00; |
| 58 | m->mccr0 |= divisor << 8; |
| 59 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 60 | } |
| 61 | |
| 62 | static void |
| 63 | mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor) |
| 64 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 65 | struct mcp_sa11x0 *m = priv(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 66 | |
| 67 | divisor /= 32; |
| 68 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 69 | m->mccr0 &= ~0x0000007f; |
| 70 | m->mccr0 |= divisor; |
| 71 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 72 | } |
| 73 | |
| 74 | /* |
| 75 | * Write data to the device. The bit should be set after 3 subframe |
| 76 | * times (each frame is 64 clocks). We wait a maximum of 6 subframes. |
| 77 | * We really should try doing something more productive while we |
| 78 | * wait. |
| 79 | */ |
| 80 | static void |
| 81 | mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val) |
| 82 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 83 | struct mcp_sa11x0 *m = priv(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 84 | int ret = -ETIME; |
| 85 | int i; |
| 86 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 87 | writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 88 | |
| 89 | for (i = 0; i < 2; i++) { |
| 90 | udelay(mcp->rw_timeout); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 91 | if (readl_relaxed(MCSR(m)) & MCSR_CWC) { |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 92 | ret = 0; |
| 93 | break; |
| 94 | } |
| 95 | } |
| 96 | |
| 97 | if (ret < 0) |
| 98 | printk(KERN_WARNING "mcp: write timed out\n"); |
| 99 | } |
| 100 | |
| 101 | /* |
| 102 | * Read data from the device. The bit should be set after 3 subframe |
| 103 | * times (each frame is 64 clocks). We wait a maximum of 6 subframes. |
| 104 | * We really should try doing something more productive while we |
| 105 | * wait. |
| 106 | */ |
| 107 | static unsigned int |
| 108 | mcp_sa11x0_read(struct mcp *mcp, unsigned int reg) |
| 109 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 110 | struct mcp_sa11x0 *m = priv(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 111 | int ret = -ETIME; |
| 112 | int i; |
| 113 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 114 | writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 115 | |
| 116 | for (i = 0; i < 2; i++) { |
| 117 | udelay(mcp->rw_timeout); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 118 | if (readl_relaxed(MCSR(m)) & MCSR_CRC) { |
| 119 | ret = readl_relaxed(MCDR2(m)) & 0xffff; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 120 | break; |
| 121 | } |
| 122 | } |
| 123 | |
| 124 | if (ret < 0) |
| 125 | printk(KERN_WARNING "mcp: read timed out\n"); |
| 126 | |
| 127 | return ret; |
| 128 | } |
| 129 | |
| 130 | static void mcp_sa11x0_enable(struct mcp *mcp) |
| 131 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 132 | struct mcp_sa11x0 *m = priv(mcp); |
| 133 | |
| 134 | writel(-1, MCSR(m)); |
| 135 | m->mccr0 |= MCCR0_MCE; |
| 136 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 137 | } |
| 138 | |
| 139 | static void mcp_sa11x0_disable(struct mcp *mcp) |
| 140 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 141 | struct mcp_sa11x0 *m = priv(mcp); |
| 142 | |
| 143 | m->mccr0 &= ~MCCR0_MCE; |
| 144 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | /* |
| 148 | * Our methods. |
| 149 | */ |
| 150 | static struct mcp_ops mcp_sa11x0 = { |
| 151 | .set_telecom_divisor = mcp_sa11x0_set_telecom_divisor, |
| 152 | .set_audio_divisor = mcp_sa11x0_set_audio_divisor, |
| 153 | .reg_write = mcp_sa11x0_write, |
| 154 | .reg_read = mcp_sa11x0_read, |
| 155 | .enable = mcp_sa11x0_enable, |
| 156 | .disable = mcp_sa11x0_disable, |
| 157 | }; |
| 158 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 159 | static int mcp_sa11x0_probe(struct platform_device *dev) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 160 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 161 | struct mcp_plat_data *data = dev->dev.platform_data; |
| 162 | struct resource *mem0, *mem1; |
| 163 | struct mcp_sa11x0 *m; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 164 | struct mcp *mcp; |
| 165 | int ret; |
| 166 | |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 167 | if (!data) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 168 | return -ENODEV; |
| 169 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 170 | mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0); |
| 171 | mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1); |
| 172 | if (!mem0 || !mem1) |
| 173 | return -ENXIO; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 174 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 175 | if (!request_mem_region(mem0->start, resource_size(mem0), |
| 176 | DRIVER_NAME)) { |
| 177 | ret = -EBUSY; |
| 178 | goto err_mem0; |
| 179 | } |
| 180 | |
| 181 | if (!request_mem_region(mem1->start, resource_size(mem1), |
| 182 | DRIVER_NAME)) { |
| 183 | ret = -EBUSY; |
| 184 | goto err_mem1; |
| 185 | } |
| 186 | |
| 187 | mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 188 | if (!mcp) { |
| 189 | ret = -ENOMEM; |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 190 | goto err_alloc; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | mcp->owner = THIS_MODULE; |
| 194 | mcp->ops = &mcp_sa11x0; |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 195 | mcp->sclk_rate = data->sclk_rate; |
Russell King | 65f2e75 | 2012-01-20 17:38:58 +0000 | [diff] [blame] | 196 | mcp->gpio_base = data->gpio_base; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 197 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 198 | m = priv(mcp); |
| 199 | m->mccr0 = data->mccr0 | 0x7f7f; |
| 200 | m->mccr1 = data->mccr1; |
| 201 | |
| 202 | m->base0 = ioremap(mem0->start, resource_size(mem0)); |
| 203 | m->base1 = ioremap(mem1->start, resource_size(mem1)); |
| 204 | if (!m->base0 || !m->base1) { |
| 205 | ret = -ENOMEM; |
| 206 | goto err_ioremap; |
| 207 | } |
| 208 | |
| 209 | platform_set_drvdata(dev, mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 210 | |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 211 | if (machine_is_assabet()) { |
| 212 | ASSABET_BCR_set(ASSABET_BCR_CODEC_RST); |
| 213 | } |
| 214 | |
| 215 | /* |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 216 | * Initialise device. Note that we initially |
| 217 | * set the sampling rate to minimum. |
| 218 | */ |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 219 | writel_relaxed(-1, MCSR(m)); |
| 220 | writel_relaxed(m->mccr1, MCCR1(m)); |
| 221 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 222 | |
| 223 | /* |
| 224 | * Calculate the read/write timeout (us) from the bit clock |
| 225 | * rate. This is the period for 3 64-bit frames. Always |
| 226 | * round this time up. |
| 227 | */ |
| 228 | mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) / |
| 229 | mcp->sclk_rate; |
| 230 | |
Russell King | 30816ac | 2012-01-20 22:51:07 +0000 | [diff] [blame] | 231 | ret = mcp_host_add(mcp); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 232 | if (ret == 0) |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 233 | return 0; |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 234 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 235 | platform_set_drvdata(dev, NULL); |
| 236 | |
| 237 | err_ioremap: |
| 238 | iounmap(m->base1); |
| 239 | iounmap(m->base0); |
Russell King | 30816ac | 2012-01-20 22:51:07 +0000 | [diff] [blame] | 240 | mcp_host_free(mcp); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 241 | err_alloc: |
| 242 | release_mem_region(mem1->start, resource_size(mem1)); |
| 243 | err_mem1: |
| 244 | release_mem_region(mem0->start, resource_size(mem0)); |
| 245 | err_mem0: |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 246 | return ret; |
| 247 | } |
| 248 | |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 249 | static int mcp_sa11x0_remove(struct platform_device *dev) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 250 | { |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 251 | struct mcp *mcp = platform_get_drvdata(dev); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 252 | struct mcp_sa11x0 *m = priv(mcp); |
| 253 | struct resource *mem0, *mem1; |
| 254 | |
| 255 | mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0); |
| 256 | mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 257 | |
Russell King | 216f63c | 2012-01-20 17:37:21 +0000 | [diff] [blame] | 258 | platform_set_drvdata(dev, NULL); |
Russell King | 30816ac | 2012-01-20 22:51:07 +0000 | [diff] [blame] | 259 | mcp_host_del(mcp); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 260 | iounmap(m->base1); |
| 261 | iounmap(m->base0); |
Russell King | 30816ac | 2012-01-20 22:51:07 +0000 | [diff] [blame] | 262 | mcp_host_free(mcp); |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 263 | release_mem_region(mem1->start, resource_size(mem1)); |
| 264 | release_mem_region(mem0->start, resource_size(mem0)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 265 | |
| 266 | return 0; |
| 267 | } |
| 268 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 269 | static int mcp_sa11x0_suspend(struct platform_device *dev, pm_message_t state) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 270 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 271 | struct mcp_sa11x0 *m = priv(platform_get_drvdata(dev)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 272 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 273 | writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m)); |
Russell King | 9480e30 | 2005-10-28 09:52:56 -0700 | [diff] [blame] | 274 | |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 275 | return 0; |
| 276 | } |
| 277 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 278 | static int mcp_sa11x0_resume(struct platform_device *dev) |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 279 | { |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 280 | struct mcp_sa11x0 *m = priv(platform_get_drvdata(dev)); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 281 | |
Russell King | 45c7f75 | 2012-01-20 23:09:42 +0000 | [diff] [blame^] | 282 | writel_relaxed(m->mccr1, MCCR1(m)); |
| 283 | writel_relaxed(m->mccr0, MCCR0(m)); |
Russell King | 9480e30 | 2005-10-28 09:52:56 -0700 | [diff] [blame] | 284 | |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 285 | return 0; |
| 286 | } |
| 287 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 288 | static struct platform_driver mcp_sa11x0_driver = { |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 289 | .probe = mcp_sa11x0_probe, |
| 290 | .remove = mcp_sa11x0_remove, |
| 291 | .suspend = mcp_sa11x0_suspend, |
| 292 | .resume = mcp_sa11x0_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 293 | .driver = { |
Russell King | c4592ce | 2012-01-20 22:30:15 +0000 | [diff] [blame] | 294 | .name = DRIVER_NAME, |
| 295 | .owner = THIS_MODULE, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 296 | }, |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 297 | }; |
| 298 | |
| 299 | /* |
| 300 | * This needs re-working |
| 301 | */ |
Mark Brown | 65349d6 | 2011-11-23 22:58:34 +0000 | [diff] [blame] | 302 | module_platform_driver(mcp_sa11x0_driver); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 303 | |
Russell King | c4592ce | 2012-01-20 22:30:15 +0000 | [diff] [blame] | 304 | MODULE_ALIAS("platform:" DRIVER_NAME); |
Russell King | 5e742ad | 2005-08-18 10:08:15 +0100 | [diff] [blame] | 305 | MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); |
| 306 | MODULE_DESCRIPTION("SA11x0 multimedia communications port driver"); |
| 307 | MODULE_LICENSE("GPL"); |