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Santosh Shilimkard5e9fe82013-06-10 11:33:31 -04001/*
2 * Copyright 2013 Texas Instruments, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
Santosh Shilimkareb788f42013-08-05 13:13:07 -04009#include <dt-bindings/interrupt-controller/arm-gic.h>
Grygorii Strashko970c2252014-02-10 18:41:18 +020010#include <dt-bindings/gpio/gpio.h>
Santosh Shilimkareb788f42013-08-05 13:13:07 -040011
Santosh Shilimkar226d1c52013-08-05 13:17:15 -040012#include "skeleton.dtsi"
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040013
14/ {
Nishanth Menon91dca0f2015-10-03 17:02:56 -070015 compatible = "ti,keystone";
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040016 model = "Texas Instruments Keystone 2 SoC";
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040017 #address-cells = <2>;
18 #size-cells = <2>;
19 interrupt-parent = <&gic>;
20
21 aliases {
22 serial0 = &uart0;
Vignesh R72f7e952016-04-13 08:53:56 -070023 spi0 = &spi0;
24 spi1 = &spi1;
25 spi2 = &spi2;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040026 };
27
28 memory {
29 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
30 };
31
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040032 gic: interrupt-controller {
33 compatible = "arm,cortex-a15-gic";
34 #interrupt-cells = <3>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040035 interrupt-controller;
36 reg = <0x0 0x02561000 0x0 0x1000>,
Santosh Shilimkara18b4aa2013-11-09 14:33:13 -050037 <0x0 0x02562000 0x0 0x2000>,
38 <0x0 0x02564000 0x0 0x1000>,
39 <0x0 0x02566000 0x0 0x2000>;
Santosh Shilimkar0ee15442013-11-09 14:36:00 -050040 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
41 IRQ_TYPE_LEVEL_HIGH)>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040042 };
43
44 timer {
45 compatible = "arm,armv7-timer";
Santosh Shilimkareb788f42013-08-05 13:13:07 -040046 interrupts =
47 <GIC_PPI 13
48 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
49 <GIC_PPI 14
50 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
51 <GIC_PPI 11
52 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
53 <GIC_PPI 10
54 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040055 };
56
57 pmu {
58 compatible = "arm,cortex-a15-pmu";
Santosh Shilimkareb788f42013-08-05 13:13:07 -040059 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
60 <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
61 <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
62 <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040063 };
64
Vitaly Andrianov14de48a2016-04-13 08:55:17 -070065 psci {
66 compatible = "arm,psci";
67 method = "smc";
68 cpu_suspend = <0x84000001>;
69 cpu_off = <0x84000002>;
70 cpu_on = <0x84000003>;
71 };
72
Vitaly Andrianov51d5d122016-08-02 14:06:07 -070073 psci {
74 compatible = "arm,psci";
75 method = "smc";
76 cpu_suspend = <0x84000001>;
77 cpu_off = <0x84000002>;
78 cpu_on = <0x84000003>;
79 };
80
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040081 soc {
82 #address-cells = <1>;
83 #size-cells = <1>;
84 compatible = "ti,keystone","simple-bus";
85 interrupt-parent = <&gic>;
86 ranges = <0x0 0x0 0x0 0xc0000000>;
Grygorii Strashko4d465962014-02-12 19:20:16 +020087 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040088
Ivan Khoronzhukded79be2014-05-23 16:34:55 -040089 pllctrl: pll-controller@02310000 {
90 compatible = "ti,keystone-pllctrl", "syscon";
91 reg = <0x02310000 0x200>;
92 };
93
94 devctrl: device-state-control@02620000 {
95 compatible = "ti,keystone-devctrl", "syscon";
96 reg = <0x02620000 0x1000>;
97 };
98
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040099 rstctrl: reset-controller {
100 compatible = "ti,keystone-reset";
Ivan Khoronzhukded79be2014-05-23 16:34:55 -0400101 ti,syscon-pll = <&pllctrl 0xe4>;
102 ti,syscon-dev = <&devctrl 0x328>;
103 ti,wdt-list = <0>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -0400104 };
105
Santosh Shilimkarfeeea8f2013-07-09 12:51:51 -0400106 /include/ "keystone-clocks.dtsi"
107
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -0400108 uart0: serial@02530c00 {
109 compatible = "ns16550a";
110 current-speed = <115200>;
111 reg-shift = <2>;
112 reg-io-width = <4>;
113 reg = <0x02530c00 0x100>;
Santosh Shilimkarf023bd12013-07-19 19:11:39 -0400114 clocks = <&clkuart0>;
Santosh Shilimkareb788f42013-08-05 13:13:07 -0400115 interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -0400116 };
117
118 uart1: serial@02531000 {
119 compatible = "ns16550a";
120 current-speed = <115200>;
121 reg-shift = <2>;
122 reg-io-width = <4>;
123 reg = <0x02531000 0x100>;
Santosh Shilimkarf023bd12013-07-19 19:11:39 -0400124 clocks = <&clkuart1>;
Santosh Shilimkareb788f42013-08-05 13:13:07 -0400125 interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -0400126 };
127
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400128 i2c0: i2c@2530000 {
129 compatible = "ti,davinci-i2c";
130 reg = <0x02530000 0x400>;
131 clock-frequency = <100000>;
132 clocks = <&clki2c>;
133 interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
134 #address-cells = <1>;
135 #size-cells = <0>;
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400136 };
137
138 i2c1: i2c@2530400 {
139 compatible = "ti,davinci-i2c";
140 reg = <0x02530400 0x400>;
141 clock-frequency = <100000>;
142 clocks = <&clki2c>;
143 interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
Grygorii Strashko39535052014-04-08 14:46:06 +0300144 #address-cells = <1>;
145 #size-cells = <0>;
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400146 };
147
148 i2c2: i2c@2530800 {
149 compatible = "ti,davinci-i2c";
150 reg = <0x02530800 0x400>;
151 clock-frequency = <100000>;
152 clocks = <&clki2c>;
153 interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
Grygorii Strashko39535052014-04-08 14:46:06 +0300154 #address-cells = <1>;
155 #size-cells = <0>;
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400156 };
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400157
158 spi0: spi@21000400 {
Franklin S Cooper Jr1a344e92015-09-17 09:03:52 -0700159 compatible = "ti,keystone-spi", "ti,dm6441-spi";
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400160 reg = <0x21000400 0x200>;
161 num-cs = <4>;
162 ti,davinci-spi-intr-line = <0>;
163 interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
164 clocks = <&clkspi>;
Grygorii Strashko509046a2014-04-28 15:20:22 +0300165 #address-cells = <1>;
166 #size-cells = <0>;
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400167 };
168
169 spi1: spi@21000600 {
Franklin S Cooper Jr1a344e92015-09-17 09:03:52 -0700170 compatible = "ti,keystone-spi", "ti,dm6441-spi";
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400171 reg = <0x21000600 0x200>;
172 num-cs = <4>;
173 ti,davinci-spi-intr-line = <0>;
174 interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
175 clocks = <&clkspi>;
Grygorii Strashko509046a2014-04-28 15:20:22 +0300176 #address-cells = <1>;
177 #size-cells = <0>;
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400178 };
179
180 spi2: spi@21000800 {
Franklin S Cooper Jr1a344e92015-09-17 09:03:52 -0700181 compatible = "ti,keystone-spi", "ti,dm6441-spi";
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400182 reg = <0x21000800 0x200>;
183 num-cs = <4>;
184 ti,davinci-spi-intr-line = <0>;
185 interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
186 clocks = <&clkspi>;
Grygorii Strashko509046a2014-04-28 15:20:22 +0300187 #address-cells = <1>;
188 #size-cells = <0>;
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400189 };
WingMan Kwok08c36762013-12-09 14:43:23 -0500190
191 usb_phy: usb_phy@2620738 {
192 compatible = "ti,keystone-usbphy";
193 #address-cells = <1>;
194 #size-cells = <1>;
Grygorii Strashkocfb198c2014-10-01 09:58:25 -0400195 reg = <0x2620738 24>;
WingMan Kwok08c36762013-12-09 14:43:23 -0500196 status = "disabled";
197 };
WingMan Kwok73207952013-12-09 17:25:12 -0500198
199 usb: usb@2680000 {
200 compatible = "ti,keystone-dwc3";
201 #address-cells = <1>;
202 #size-cells = <1>;
203 reg = <0x2680000 0x10000>;
204 clocks = <&clkusb>;
205 clock-names = "usb";
206 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
207 ranges;
Santosh Shilimkar86156972014-02-24 16:42:19 -0500208 dma-coherent;
209 dma-ranges;
WingMan Kwok73207952013-12-09 17:25:12 -0500210 status = "disabled";
211
212 dwc3@2690000 {
213 compatible = "synopsys,dwc3";
214 reg = <0x2690000 0x70000>;
215 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
216 usb-phy = <&usb_phy>, <&usb_phy>;
217 };
218 };
Ivan Khoronzhuk20d89312013-10-16 23:15:32 +0300219
220 wdt: wdt@022f0080 {
221 compatible = "ti,keystone-wdt","ti,davinci-wdt";
222 reg = <0x022f0080 0x80>;
223 clocks = <&clkwdtimer0>;
224 };
Ivan Khoronzhuk2b4f76b2013-11-28 21:23:56 +0200225
226 clock_event: timer@22f0000 {
227 compatible = "ti,keystone-timer";
228 reg = <0x022f0000 0x80>;
229 interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
230 clocks = <&clktimer15>;
231 };
Grygorii Strashko970c2252014-02-10 18:41:18 +0200232
233 gpio0: gpio@260bf00 {
234 compatible = "ti,keystone-gpio";
235 reg = <0x0260bf00 0x100>;
236 gpio-controller;
237 #gpio-cells = <2>;
238 /* HW Interrupts mapped to GPIO pins */
239 interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
240 <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
241 <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
242 <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
243 <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
244 <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
245 <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
246 <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
247 <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
248 <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
249 <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
250 <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
251 <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
252 <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
253 <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
254 <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
255 <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
256 <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
257 <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
258 <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
259 <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
260 <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
261 <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
262 <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
263 <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
264 <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
265 <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
266 <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
267 <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
268 <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
269 <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
270 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
271 clocks = <&clkgpio>;
272 clock-names = "gpio";
273 ti,ngpio = <32>;
274 ti,davinci-gpio-unbanked = <32>;
275 };
Ivan Khoronzhuk82c04f72014-02-28 21:05:24 -0500276
277 aemif: aemif@21000A00 {
278 compatible = "ti,keystone-aemif", "ti,davinci-aemif";
279 #address-cells = <2>;
280 #size-cells = <1>;
281 clocks = <&clkaemif>;
282 clock-names = "aemif";
283 clock-ranges;
284
285 reg = <0x21000A00 0x00000100>;
286 ranges = <0 0 0x30000000 0x10000000
287 1 0 0x21000A00 0x00000100>;
288 };
Grygorii Strashko979c36c2014-07-17 17:58:07 +0300289
Grygorii Strashkoa392d422014-09-22 15:19:27 -0400290 kirq0: keystone_irq@26202a0 {
291 compatible = "ti,keystone-irq";
292 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
293 interrupt-controller;
294 #interrupt-cells = <1>;
295 ti,syscon-dev = <&devctrl 0x2a0>;
296 };
Murali Karicheribed80502014-10-29 16:28:16 -0400297
Murali Karicheri8b4769c2015-07-16 18:13:03 -0400298 pcie0: pcie@21800000 {
Murali Karicheribed80502014-10-29 16:28:16 -0400299 compatible = "ti,keystone-pcie", "snps,dw-pcie";
300 clocks = <&clkpcie>;
301 clock-names = "pcie";
302 #address-cells = <3>;
303 #size-cells = <2>;
304 reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>;
Murali Karicheri59e13aa2016-06-08 16:06:43 -0700305 ranges = <0x82000000 0 0x50000000 0x50000000
306 0 0x10000000>;
Murali Karicheribed80502014-10-29 16:28:16 -0400307
Murali Karicheri9dd4f282015-07-16 18:12:57 -0400308 status = "disabled";
Murali Karicheribed80502014-10-29 16:28:16 -0400309 device_type = "pci";
310 num-lanes = <2>;
Murali Karicheri59e13aa2016-06-08 16:06:43 -0700311 bus-range = <0x00 0xff>;
Murali Karicheribed80502014-10-29 16:28:16 -0400312
Murali Karicheria9e5b202016-06-08 16:06:43 -0700313 /* error interrupt */
314 interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
Murali Karicheribed80502014-10-29 16:28:16 -0400315 #interrupt-cells = <1>;
316 interrupt-map-mask = <0 0 0 7>;
317 interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */
318 <0 0 0 2 &pcie_intc0 1>, /* INT B */
319 <0 0 0 3 &pcie_intc0 2>, /* INT C */
320 <0 0 0 4 &pcie_intc0 3>; /* INT D */
321
322 pcie_msi_intc0: msi-interrupt-controller {
323 interrupt-controller;
324 #interrupt-cells = <1>;
325 interrupt-parent = <&gic>;
326 interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
327 <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>,
328 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
329 <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
330 <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
331 <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
332 <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
333 <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
334 };
335
336 pcie_intc0: legacy-interrupt-controller {
337 interrupt-controller;
338 #interrupt-cells = <1>;
339 interrupt-parent = <&gic>;
340 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>,
341 <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>,
342 <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
343 <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
344 };
345 };
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -0400346 };
347};